- r -
- R_A_MISR0_ADRSIG0() : chip::fmu::FMU
- R_A_MISR1_ADRSIG1() : chip::fmu::FMU
- R_ABORT_LOOP_ABORT_LOOP() : chip::fmu::FMU
- R_ADR_CTRL_GRPSEL() : chip::fmu::FMU
- R_ADR_CTRL_PROG_ATTR() : chip::fmu::FMU
- R_ADR_CTRL_XADR() : chip::fmu::FMU
- R_ADR_CTRL_YADR() : chip::fmu::FMU
- R_ADR_QUERY_XADRFAIL() : chip::fmu::FMU
- R_ADR_QUERY_YADRFAIL() : chip::fmu::FMU
- R_C_MISR0_CTRLSIG0() : chip::fmu::FMU
- R_C_MISR1_CTRLSIG1() : chip::fmu::FMU
- R_CNT_LOOP_CTRL_LOOPCNT() : chip::fmu::FMU
- R_CNT_LOOP_CTRL_LOOPDLY() : chip::fmu::FMU
- R_CNT_LOOP_CTRL_LOOPOPT() : chip::fmu::FMU
- R_CNT_LOOP_CTRL_LOOPUNIT() : chip::fmu::FMU
- R_D_MISR0_DATASIG0() : chip::fmu::FMU
- R_D_MISR1_DATASIG1() : chip::fmu::FMU
- R_DATA_CTRL0_DATA0() : chip::fmu::FMU
- R_DATA_CTRL0_EX_DATA0X() : chip::fmu::FMU
- R_DATA_CTRL1_DATA1() : chip::fmu::FMU
- R_DATA_CTRL1_EX_DATA1X() : chip::fmu::FMU
- R_DATA_CTRL2_DATA2() : chip::fmu::FMU
- R_DATA_CTRL2_EX_DATA2X() : chip::fmu::FMU
- R_DATA_CTRL3_DATA3() : chip::fmu::FMU
- R_DATA_CTRL3_EX_DATA3X() : chip::fmu::FMU
- R_DFT_CTRL_CMP_MASK() : chip::fmu::FMU
- R_DFT_CTRL_DFT_DATA() : chip::fmu::FMU
- R_DFT_CTRL_DFT_DATA_SRC() : chip::fmu::FMU
- R_DFT_CTRL_DFT_XADR() : chip::fmu::FMU
- R_DFT_CTRL_DFT_YADR() : chip::fmu::FMU
- R_DOUT_QUERY0_DOUTFAIL() : chip::fmu::FMU
- R_DOUT_QUERY1_DOUT() : chip::fmu::FMU
- R_IP_CONFIG_BIST_CDIVL() : chip::fmu::FMU
- R_IP_CONFIG_BIST_CLK_SEL() : chip::fmu::FMU
- R_IP_CONFIG_BIST_TVFY() : chip::fmu::FMU
- R_IP_CONFIG_CDIVS() : chip::fmu::FMU
- R_IP_CONFIG_DBGCTL() : chip::fmu::FMU
- R_IP_CONFIG_ECCEN() : chip::fmu::FMU
- R_IP_CONFIG_IPSEL0() : chip::fmu::FMU
- R_IP_CONFIG_IPSEL1() : chip::fmu::FMU
- R_IP_CONFIG_SMWTST() : chip::fmu::FMU
- R_IP_CONFIG_TSTCTL() : chip::fmu::FMU
- R_PIN_CTRL_ERASE() : chip::fmu::FMU
- R_PIN_CTRL_EV() : chip::fmu::FMU
- R_PIN_CTRL_HEM() : chip::fmu::FMU
- R_PIN_CTRL_IFREN() : chip::fmu::FMU
- R_PIN_CTRL_IFREN1() : chip::fmu::FMU
- R_PIN_CTRL_LVE() : chip::fmu::FMU
- R_PIN_CTRL_MAS1() : chip::fmu::FMU
- R_PIN_CTRL_NVSTR() : chip::fmu::FMU
- R_PIN_CTRL_PROG() : chip::fmu::FMU
- R_PIN_CTRL_PV() : chip::fmu::FMU
- R_PIN_CTRL_RECALL() : chip::fmu::FMU
- R_PIN_CTRL_REDEN() : chip::fmu::FMU
- R_PIN_CTRL_SE() : chip::fmu::FMU
- R_PIN_CTRL_SLM() : chip::fmu::FMU
- R_PIN_CTRL_WHV() : chip::fmu::FMU
- R_PIN_CTRL_WIPGM() : chip::fmu::FMU
- R_PIN_CTRL_WMV() : chip::fmu::FMU
- R_PIN_CTRL_XE() : chip::fmu::FMU
- R_PIN_CTRL_YE() : chip::fmu::FMU
- R_REPAIR0_0_RADR0_0() : chip::fmu::FMU
- R_REPAIR0_0_RDIS0_0() : chip::fmu::FMU
- R_REPAIR0_1_RADR0_1() : chip::fmu::FMU
- R_REPAIR0_1_RDIS0_1() : chip::fmu::FMU
- R_REPAIR1_0_RADR1_0() : chip::fmu::FMU
- R_REPAIR1_0_RDIS1_0() : chip::fmu::FMU
- R_REPAIR1_1_RADR1_1() : chip::fmu::FMU
- R_REPAIR1_1_RDIS1_1() : chip::fmu::FMU
- R_SME_WHV0_SMEWHV0() : chip::fmu::FMU
- R_SME_WHV1_SMEWHV1() : chip::fmu::FMU
- R_SMP_WHV0_SMPWHV0() : chip::fmu::FMU
- R_SMP_WHV1_SMPWHV1() : chip::fmu::FMU
- R_SMW_QUERY_SMWLAST() : chip::fmu::FMU
- R_SMW_QUERY_SMWLOOP() : chip::fmu::FMU
- R_SMW_SETTING0_SMWPARM0() : chip::fmu::FMU
- R_SMW_SETTING1_SMWPARM1() : chip::fmu::FMU
- R_SMW_SETTING2_SMWPARM2() : chip::fmu::FMU
- R_SMW_SETTING3_SMWPARM3() : chip::fmu::FMU
- R_TEST_CTRL_BUSY() : chip::fmu::FMU
- R_TEST_CTRL_CMDINDEX() : chip::fmu::FMU
- R_TEST_CTRL_DEBUG() : chip::fmu::FMU
- R_TEST_CTRL_DEBUGRUN() : chip::fmu::FMU
- R_TEST_CTRL_DISABLE_IP1() : chip::fmu::FMU
- R_TEST_CTRL_STARTRUN() : chip::fmu::FMU
- R_TEST_CTRL_STATUS0() : chip::fmu::FMU
- R_TEST_CTRL_STATUS1() : chip::fmu::FMU
- R_TESTCODE_TESTCODE() : chip::fmu::FMU
- R_TIMER_CTRL_EX_TLVSDLY_H() : chip::fmu::FMU
- R_TIMER_CTRL_TLVSDLY_L() : chip::fmu::FMU
- R_TIMER_CTRL_TLVSUNIT() : chip::fmu::FMU
- R_TIMER_CTRL_TNVHDLY() : chip::fmu::FMU
- R_TIMER_CTRL_TNVHUNIT() : chip::fmu::FMU
- R_TIMER_CTRL_TNVSDLY() : chip::fmu::FMU
- R_TIMER_CTRL_TNVSUNIT() : chip::fmu::FMU
- R_TIMER_CTRL_TPGSDLY() : chip::fmu::FMU
- R_TIMER_CTRL_TPGSUNIT() : chip::fmu::FMU
- R_TIMER_CTRL_TRCVDLY() : chip::fmu::FMU
- R_TIMER_CTRL_TRCVUNIT() : chip::fmu::FMU
- RAM_CTRL_RAMA_CG_OVERRIDE() : chip::syscon::SYSCON
- RAM_CTRL_RAMA_ECC_ENABLE() : chip::syscon::SYSCON
- RAM_CTRL_RAMB_CG_OVERRIDE() : chip::syscon::SYSCON
- RAM_CTRL_RAMX_CG_OVERRIDE() : chip::syscon::SYSCON
- RCCR_SCS() : chip::scg::SCG
- RD_DATA0_RD_DATA0() : chip::fmu::FMU
- RD_DATA1_RD_DATA1() : chip::fmu::FMU
- RD_DATA2_RD_DATA2() : chip::fmu::FMU
- RD_DATA3_RD_DATA3() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_AD_SET() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_BIST_ECC_EN() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_BIST_MUX_TO_SMW() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_CPY_PAR_EN() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_CPY_PHRASE_EN() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_DBERR_REG() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_ECC_ENABLEB() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_LAST_READ() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_MISR_EN() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_RD_CAPT() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_SBERR_REG() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_SE_SIZE() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_SMW_ARRAY1_SMW0_SEL() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_WR_PATH_ECC_EN() : chip::fmu::FMU
- RD_PATH_CTRL_STATUS_WR_PATH_EN() : chip::fmu::FMU
- read() : core::CoreEdgeTriggerPin, hal::analog::AnalogInputPin, hal::analog::AnalogInputPort, hal::analog::VirtualAnalogInputPin, hal::digital::EdgeTriggerPin, hal::serial::SerialBus, hal::serial::SerialBusQueue, hal::serial::SerialBusTransmit, hal::serial::SerialPortInputStream, mframe::io::InputStream, mframe::io::SimpleInputStream
- readBusy() : mframe::io::InputStream, mframe::io::SimpleInputStream
- reboot() : cmsisrtx5::CmsisRTX5Kernel, mframe::lang::System, mframe::sys::Kernel
- releasePeripheralReset() : chip::reset::Reset
- remaining() : mframe::io::AppendableOutputStream, mframe::io::ByteBuffer, mframe::io::RingBuffer, mframe::io::SimpleWriter, mframe::lang::Appendable
- REMAP_CPU0_SBUS() : chip::syscon::SYSCON
- REMAP_DMA0() : chip::syscon::SYSCON
- REMAP_LOCK() : chip::syscon::SYSCON
- REMAP_USB0() : chip::syscon::SYSCON
- remove() : mframe::util::ArrayMap::Entry, mframe::util::ArrayMap, mframe::util::Map< V >::Entry, mframe::util::Map< V >, mframe::util::MapEntry< V >, mframe::util::Pool
- REPAIR0_0_RADR0_0() : chip::fmu::FMU
- REPAIR0_0_RDIS0_0() : chip::fmu::FMU
- REPAIR0_1_RADR0_1() : chip::fmu::FMU
- REPAIR0_1_RDIS0_1() : chip::fmu::FMU
- REPAIR1_0_RADR1_0() : chip::fmu::FMU
- REPAIR1_0_RDIS1_0() : chip::fmu::FMU
- REPAIR1_1_RADR1_1() : chip::fmu::FMU
- REPAIR1_1_RDIS1_1() : chip::fmu::FMU
- replace() : mframe::lang::Strings, mframe::util::Map< V >
- Reset() : chip::reset::Reset
- reset() : mframe::io::ByteBuffer, mframe::lang::Markable, mframe::util::ArrayMap::Iterator, mframe::util::Iterator< E >
- RESET_STATUS_ARY_TRIM_DONE() : chip::fmu::FMU
- RESET_STATUS_FMU_PARM_DONE() : chip::fmu::FMU
- RESET_STATUS_FMU_PARM_EN() : chip::fmu::FMU
- RESET_STATUS_INIT_DONE() : chip::fmu::FMU
- RESET_STATUS_RECALL_DATA_MISMATCH() : chip::fmu::FMU
- RESET_STATUS_RPR_DONE() : chip::fmu::FMU
- RESET_STATUS_RST_DF_ERR() : chip::fmu::FMU
- RESET_STATUS_RST_PATCH_LD() : chip::fmu::FMU
- RESET_STATUS_RST_SF_ERR() : chip::fmu::FMU
- RESET_STATUS_SOC_TRIM_DF_ERR() : chip::fmu::FMU
- RESET_STATUS_SOC_TRIM_DONE() : chip::fmu::FMU
- RESET_STATUS_SOC_TRIM_ECC() : chip::fmu::FMU
- RESET_STATUS_SOC_TRIM_EN() : chip::fmu::FMU
- resize() : mframe::lang::Memory
- retainSRAMArray() : chip::spc::SPC
- rewind() : mframe::io::ByteBuffer
- RingBuffer() : mframe::io::RingBuffer
- ROP_STATE_ROP_STATE() : chip::syscon::SYSCON
- ROSCCSR_LK() : chip::scg::SCG
- ROSCCSR_ROSCERR() : chip::scg::SCG
- ROSCCSR_ROSCSEL() : chip::scg::SCG
- ROSCCSR_ROSCVLD() : chip::scg::SCG
- run() : mframe::func::Runnable, mframe::func::RunnableEvent, mframe::func::RunnableMethod, mframe::io::SimpleInputStream, mframe::io::SimpleOutputStream, mframe::sys::EntryPoint, mframe::sys::Svchost
- RunnableEvent() : mframe::func::RunnableEvent
- RunnableMethod() : mframe::func::RunnableMethod