類別chip::spc::SPC的繼承圖:

公開方法(Public Methods)
virtual	~SPC (void) override
	Destroy the object.

公開方法(Public Methods) 繼承自 mframe::lang::Object
	Object (void)
	Construct a new Object object.

virtual	~Object (void) override
	Destroy the Object object.

void *	operator new (size_t n)

void *	operator new (size_t n, void *p)

mframe::lang::Object &	getObject (void) override
	取得類Object

void	delay (int milliseconds) const
	函數 delay 等待內核滴答中指定的時間段。對於1的值，系統等待直到下一個計時器滴答發生。實際時間延遲最多可能比指定時間少一個計時器滴答聲，即在下一個系統滴答聲發生之前立即調用 osDelay(1)，線程會立即重新安排。

bool	equals (Object *object) const
	函數 delay 等待內核滴答中指定的時間段。對於1的值，系統等待直到下一個計時器滴答發生。實際時間延遲最多可能比指定時間少一個計時器滴答聲，即在下一個系統滴答聲發生之前立即調用 osDelay(1)，線程會立即重新安排。

bool	equals (Object &object) const
	函數 delay 等待內核滴答中指定的時間段。對於1的值，系統等待直到下一個計時器滴答發生。實際時間延遲最多可能比指定時間少一個計時器滴答聲，即在下一個系統滴答聲發生之前立即調用 osDelay(1)，線程會立即重新安排。

void	wait (void) const
	導致當前線程等待，直到另一個線程調用此對象的notify()方法或notifyAll()方法，或指定的時間已過。

bool	wait (int timeout) const
	導致當前線程等待，直到另一個線程調用此對象的 notify()方法或 notifyAll()方法，或其他一些線程中斷當前線程，或一定量的實時時間。

bool	yield (void) const
	函數yield()將控制權傳遞給處於READY狀態且具有相同優先級的下一個線程。如果在READY狀態下沒有其他優先級相同的線程，則當前線程繼續執行，不會發生線程切換。

int	lock (void) const
	核心鎖定，在調用unlock以前將不會進行執行緒切換

int	unlock (void) const
	核心解鎖。

mframe::sys::Thread *	currentThread (void) const
	取得當前的執行緒

virtual int	hashcode (void) const
	返回對象的哈希碼值。支持這種方法是為了散列表，如HashMap提供的那樣。

公開方法(Public Methods) 繼承自 mframe::lang::Interface
virtual	~Interface (void)=default
	Destroy the struct object.

靜態公開方法(Static Public Methods)
static uint8	getPeriphIOIsolationStatus (Register &base)
	Gets Isolation status for each power domains.

static void	clearPeriphIOIsolationFlag (Register &base)
	Clears peripherals and I/O pads isolation flags for each power domains.

static bool	getBusyStatusFlag (Register &base)
	Gets SPC busy status flag.

static bool	checkLowPowerReqest (Register &base)
	Checks system low power request.

static void	clearLowPowerRequest (Register &base)
	Clears system low power request, set SPC in active mode.

static bool	checkSwitchState (Register &base)
	Checks whether the power switch is on.

static PowerDomainLowPowerMode	getPowerDomainLowPowerMode (Register &base, PowerDomainID powerDomainId)
	Gets selected power domain's requested low power mode.

static bool	checkPowerDomainLowPowerRequest (Register &base, PowerDomainID powerDomainId)
	Checks power domain's low power request.

static void	clearPowerDomainLowPowerRequestFlag (Register &base, PowerDomainID powerDomainId)
	Clears selected power domain's low power request flag.

static void	trimSRAMLdoRefVoltage (Register &base, uint8 trimValue)
	Trims SRAM retention regulator reference voltage, trim step is 12 mV, range is around 0.48V to 0.85V.

static void	enableSRAMLdo (Register &base, bool enable)
	Enables/disables SRAM retention LDO.

static void	retainSRAMArray (Register &base, uint8 mask)

static void	setLowPowerRequestConfig (Register &base, const LowPowerRequestConfig &config)
	Configs Low power request output pin.

static void	enableIntegratedPowerSwitchManually (Register &base, bool enable)
	Enables/disables the integrated power switch manually.

static void	enableIntegratedPowerSwitchAutomatically (Register &base, bool sleepGate, bool wakeupUngate)
	Enables/disables the integrated power switch automatically.

static void	setSRAMOperateVoltage (Register &base, const SramVoltageConfig &config)
	Set SRAM operate voltage.

static BandgapMode	getActiveModeBandgapMode (Register &base)
	Gets the Bandgap mode in Active mode.

static uint32	getActiveModeVoltageDetectStatus (Register &base)
	Gets all voltage detectors status in Active mode.

static chip::spc::Status	setActiveModeBandgapModeConfig (Register &base, chip::spc::BandgapMode mode)
	Configs Bandgap mode in Active mode.

static void	setActiveModeVoltageTrimDelay (Register &base, uint16 delay)
	Sets the delay when the regulators change voltage level in Active mode.

static chip::spc::Status	setActiveModeRegulatorsConfig (Register &base, const ActiveModeRegulatorsConfig &config)
	Configs all settings of regulators in Active mode at a time.

static void	enableActiveModeAnalogModules (Register &base, uint32 maskValue)
	Enables analog modules in active mode.

static void	disableActiveModeAnalogModules (Register &base, uint32 maskValue)
	Disables analog modules in active mode.

static uint32	getActiveModeEnabledAnalogModules (Register &base)
	Gets enabled analog modules that enabled in active mode.

static chip::spc::BandgapMode	getLowPowerModeBandgapMode (Register &base)
	Gets the Bandgap mode in Low Power mode.

static uint32	getLowPowerModeVoltageDetectStatus (Register &base)
	Gets the status of all voltage detectors in Low Power mode.

static void	enableLowPowerModeLowPowerIREF (Register &base, bool enable)
	Enables/Disables Low Power IREF in low power modes.

static chip::spc::Status	setLowPowerModeBandgapmodeConfig (Register &base, chip::spc::BandgapMode mode)
	Configs Bandgap mode in Low Power mode.

static void	enableSRAMLdOLowPowerModeIREF (Register &base, bool enable)
	Enables/disables SRAM_LDO deep power low power IREF.

static void	setLowPowerWakeUpDelay (Register &base, uint16 delay)
	Sets the delay when exit the low power modes.

static chip::spc::Status	setLowPowerModeRegulatorsConfig (Register &base, const LowPowerModeRegulatorsConfig *config)
	Configs all settings of regulators in Low power mode at a time.

static void	enableLowPowerModeAnalogModules (Register &base, uint32 maskValue)
	Enables analog modules in low power modes.

static void	disableLowPowerModeAnalogModules (Register &base, uint32 maskValue)
	Disables analog modules in low power modes.

static uint32	getLowPowerModeEnabledAnalogModules (Register &base)
	Gets enabled analog modules that enabled in low power modes.

static uint8	getVoltageDetectStatusFlag (Register &base)
	Get Voltage Detect Status Flags.

static void	clearVoltageDetectStatusFlag (Register &base, uint8 mask)
	Clear Voltage Detect Status Flags.

static void	setCoreVoltageDetectConfig (Register &base, const CoreVoltageDetectConfig &config)
	Configs CORE voltage detect options.

static void	lockCoreVoltageDetectResetSetting (Register &base)
	Locks Core voltage detect reset setting.

static void	unlockCoreVoltageDetectResetSetting (Register &base)
	Unlocks Core voltage detect reset setting.

static chip::spc::Status	enableActiveModeCoreLowVoltageDetect (Register &base, bool enable)
	Enables/Disables the Core Low Voltage Detector in Active mode.

static chip::spc::Status	enableLowPowerModeCoreLowVoltageDetect (Register &base, bool enable)
	Enables/Disables the Core Low Voltage Detector in Low Power mode.

static void	setSystemVDDLowVoltageLevel (Register &base, LowVoltageLevelSelect level)
	Set system VDD Low-voltage level selection.

static void	setSystemVoltageDetectConfig (Register &base, const SystemVoltageDetectConfig &config)
	Configs SYS voltage detect options.

static void	lockSystemVoltageDetectResetSetting (Register &base)
	Lock System voltage detect reset setting.

static void	unlockSystemVoltageDetectResetSetting (Register &base)
	Unlock System voltage detect reset setting.

static chip::spc::Status	enableActiveModeSystemHighVoltageDetect (Register &base, bool enable)
	Enables/Disables the System High Voltage Detector in Active mode.

static chip::spc::Status	enableActiveModeSystemLowVoltageDetect (Register &base, bool enable)
	Enables/Disable the System Low Voltage Detector in Active mode.

static chip::spc::Status	enableLowPowerModeSystemHighVoltageDetect (Register &base, bool enable)
	Enables/Disables the System High Voltage Detector in Low Power mode.

static chip::spc::Status	enableLowPowerModeSystemLowVoltageDetect (Register &base, bool enable)
	Enables/Disables the System Low Voltage Detector in Low Power mode.

static void	setExternalVoltageDomainsConfig (Register &base, uint8 lowPowerIsoMask, uint8 IsoMask)
	Configs external voltage domains.

static uint8	getExternalDomainsStatus (Register &base)
	Gets External Domains status.

static chip::spc::Status	setActiveModeCoreLDORegulatorConfig (Register &base, const ActiveModeCoreLdoOption &option)
	Configs Core LDO Regulator in Active mode.

static chip::spc::Status	setActiveModeCoreLDORegulatorVoltageLevel (Register &base, CoreLdoVoltageLevel voltageLevel)
	Set Core LDO Regulator Voltage level in Active mode.

static CoreLdoVoltageLevel	getActiveModeCoreLDOVDDVoltageLevel (Register &base)
	Gets CORE LDO Regulator Voltage level.

static chip::spc::Status	setActiveModeCoreLDORegulatorDriveStrength (Register &base, CoreLdoDriveStrength driveStrength)
	Set Core LDO VDD Regulator Drive Strength in Active mode.

static CoreLdoDriveStrength	getActiveModeCoreLDODriveStrength (Register &base)
	Gets CORE LDO VDD Regulator Drive Strength in Active mode.

static chip::spc::Status	setLowPowerModeCoreLDORegulatorConfig (Register &base, const LowPowerModeCoreLdoOption &option)
	Configs CORE LDO Regulator in low power mode.

static chip::spc::Status	setLowPowerModeCoreLDORegulatorVoltageLevel (Register &base, CoreLdoVoltageLevel voltageLevel)
	Set Core LDO VDD Regulator Voltage level in Low power mode.

static CoreLdoVoltageLevel	getLowPowerCoreLDOVDDVoltageLevel (Register &base)
	Gets the CORE LDO VDD Regulator Voltage Level for Low Power modes.

static chip::spc::Status	setLowPowerModeCoreLDORegulatorDriveStrength (Register &base, CoreLdoDriveStrength driveStrength)
	Set Core LDO VDD Regulator Drive Strength in Low power mode.

static CoreLdoDriveStrength	getLowPowerCoreLDOVDDDriveStrength (Register &base)
	Gets CORE LDO VDD Drive Strength for Low Power modes.

static constexpr uint32	VERID_FEATURE (uint32 value)
	VERID - FEATURE.

static constexpr uint32	VERID_MINOR (uint32 value)
	VERID - MINOR.

static constexpr uint32	VERID_MAJOR (uint32 value)
	VERID - MAJOR.

static constexpr uint32	SC_BUSY (uint32 value)
	SC - BUSY.

static constexpr uint32	SC_SPC_LP_REQ (uint32 value)
	SC - SPC_LP_REQ.

static constexpr uint32	SC_SPC_LP_MODE (uint32 value)
	SC - SPC_LP_MODE.

static constexpr uint32	SC_ISO_CLR (uint32 value)
	SC - ISO_CLR.

static constexpr uint32	SC_SWITCH_STATE (uint32 value)
	SC - SWITCH_STATE.

static constexpr uint32	LPREQ_CFG_LPREQOE (uint32 value)
	LPREQ_CFG - LPREQOE.

static constexpr uint32	LPREQ_CFG_LPREQPOL (uint32 value)
	LPREQ_CFG - LPREQPOL.

static constexpr uint32	LPREQ_CFG_LPREQOV (uint32 value)
	LPREQ_CFG - LPREQOV.

static constexpr uint32	CFG_INTG_PWSWTCH_SLEEP_EN (uint32 value)
	CFG - INTG_PWSWTCH_SLEEP_EN.

static constexpr uint32	CFG_INTG_PWSWTCH_WKUP_EN (uint32 value)
	CFG - INTG_PWSWTCH_WKUP_EN.

static constexpr uint32	CFG_INTG_PWSWTCH_SLEEP_ACTIVE_EN (uint32 value)
	CFG - INTG_PWSWTCH_SLEEP_ACTIVE_EN.

static constexpr uint32	CFG_INTG_PWSWTCH_WKUP_ACTIVE_EN (uint32 value)
	CFG - INTG_PWSWTCH_WKUP_ACTIVE_EN.

static constexpr uint32	PD_STATUS_PWR_REQ_STATUS (uint32 value)
	PD_STATUS - PWR_REQ_STATUS.

static constexpr uint32	PD_STATUS_PD_LP_REQ (uint32 value)
	PD_STATUS - PD_LP_REQ.

static constexpr uint32	PD_STATUS_LP_MODE (uint32 value)
	PD_STATUS - LP_MODE.

static constexpr uint32	SRAMCTL_VSM (uint32 value)
	SRAMCTL - VSM.

static constexpr uint32	SRAMCTL_REQ (uint32 value)
	SRAMCTL - REQ.

static constexpr uint32	SRAMCTL_ACK (uint32 value)
	SRAMCTL - ACK.

static constexpr uint32	SRAMRETLDO_REFTRIM_REFTRIM (uint32 value)
	SRAMRETLDO_REFTRIM - REFTRIM.

static constexpr uint32	SRAMRETLDO_CNTRL_SRAMLDO_ON (uint32 value)
	SRAMRETLDO_CNTRL - SRAMLDO_ON.

static constexpr uint32	SRAMRETLDO_CNTRL_SRAM_RET_EN (uint32 value)
	SRAMRETLDO_CNTRL - SRAM_RET_EN.

static constexpr uint32	ACTIVE_CFG_CORELDO_VDD_DS (uint32 value)
	ACTIVE_CFG - CORELDO_VDD_DS.

static constexpr uint32	ACTIVE_CFG_CORELDO_VDD_LVL (uint32 value)
	ACTIVE_CFG - CORELDO_VDD_LVL.

static constexpr uint32	ACTIVE_CFG_BGMODE (uint32 value)
	ACTIVE_CFG - BGMODE.

static constexpr uint32	ACTIVE_CFG_VDD_VD_DISABLE (uint32 value)
	ACTIVE_CFG - VDD_VD_DISABLE.

static constexpr uint32	ACTIVE_CFG_CORE_LVDE (uint32 value)
	ACTIVE_CFG - CORE_LVDE.

static constexpr uint32	ACTIVE_CFG_SYS_LVDE (uint32 value)
	ACTIVE_CFG - SYS_LVDE.

static constexpr uint32	ACTIVE_CFG_SYS_HVDE (uint32 value)
	ACTIVE_CFG - SYS_HVDE.

static constexpr uint32	ACTIVE_CFG1_SOC_CNTRL (uint32 value)
	ACTIVE_CFG1 - SOC_CNTRL.

static constexpr uint32	LP_CFG_CORELDO_VDD_DS (uint32 value)
	LP_CFG - CORELDO_VDD_DS.

static constexpr uint32	LP_CFG_CORELDO_VDD_LVL (uint32 value)
	LP_CFG - CORELDO_VDD_LVL.

static constexpr uint32	LP_CFG_SRAMLDO_DPD_ON (uint32 value)
	LP_CFG - SRAMLDO_DPD_ON.

static constexpr uint32	LP_CFG_BGMODE (uint32 value)
	LP_CFG - BGMODE.

static constexpr uint32	LP_CFG_LP_IREFEN (uint32 value)
	LP_CFG - LP_IREFEN.

static constexpr uint32	LP_CFG_CORE_LVDE (uint32 value)
	LP_CFG - CORE_LVDE.

static constexpr uint32	LP_CFG_SYS_LVDE (uint32 value)
	LP_CFG - SYS_LVDE.

static constexpr uint32	LP_CFG_SYS_HVDE (uint32 value)
	LP_CFG - SYS_HVDE.

static constexpr uint32	LP_CFG1_SOC_CNTRL (uint32 value)
	LP_CFG1 - SOC_CNTRL.

static constexpr uint32	LPWKUP_DELAY_LPWKUP_DELAY (uint32 value)
	LPWKUP_DELAY - LPWKUP_DELAY.

static constexpr uint32	ACTIVE_VDELAY_ACTIVE_VDELAY (uint32 value)
	ACTIVE_VDELAY - ACTIVE_VDELAY.

static constexpr uint32	VD_STAT_COREVDD_LVDF (uint32 value)
	VD_STAT - COREVDD_LVDF.

static constexpr uint32	VD_STAT_SYSVDD_LVDF (uint32 value)
	VD_STAT - SYSVDD_LVDF.

static constexpr uint32	VD_STAT_SYSVDD_HVDF (uint32 value)
	VD_STAT - SYSVDD_HVDF.

static constexpr uint32	VD_CORE_CFG_LVDRE (uint32 value)
	VD_CORE_CFG - LVDRE.

static constexpr uint32	VD_CORE_CFG_LVDIE (uint32 value)
	VD_CORE_CFG - LVDIE.

static constexpr uint32	VD_CORE_CFG_LOCK (uint32 value)
	VD_CORE_CFG - LOCK.

static constexpr uint32	VD_SYS_CFG_LVDRE (uint32 value)
	VD_SYS_CFG - LVDRE.

static constexpr uint32	VD_SYS_CFG_LVDIE (uint32 value)
	VD_SYS_CFG - LVDIE.

static constexpr uint32	VD_SYS_CFG_HVDRE (uint32 value)
	VD_SYS_CFG - HVDRE.

static constexpr uint32	VD_SYS_CFG_HVDIE (uint32 value)
	VD_SYS_CFG - HVDIE.

static constexpr uint32	VD_SYS_CFG_LVSEL (uint32 value)
	VD_SYS_CFG - LVSEL.

static constexpr uint32	VD_SYS_CFG_LOCK (uint32 value)
	VD_SYS_CFG - LOCK.

static constexpr uint32	EVD_CFG_EVDISO (uint32 value)
	EVD_CFG - EVDISO.

static constexpr uint32	EVD_CFG_EVDLPISO (uint32 value)
	EVD_CFG - EVDLPISO.

static constexpr uint32	EVD_CFG_EVDSTAT (uint32 value)
	EVD_CFG - EVDSTAT.

static constexpr uint32	EVD_CFG_REG_EVDISO (uint32 value)

static constexpr uint32	EVD_CFG_REG_EVDLPISO (uint32 value)

static constexpr uint32	EVD_CFG_REG_EVDSTAT (uint32 value)

函式成員說明文件

◆ ACTIVE_CFG1_SOC_CNTRL()

static constexpr uint32 chip::spc::SPC::ACTIVE_CFG1_SOC_CNTRL ( uint32 value )

inlinestaticconstexpr

ACTIVE_CFG1 - SOC_CNTRL.

Active Power Mode Configuration 1 - Active Config Chip Control

◆ ACTIVE_CFG_BGMODE()

static constexpr uint32 chip::spc::SPC::ACTIVE_CFG_BGMODE ( uint32 value )

inlinestaticconstexpr

ACTIVE_CFG - BGMODE.

Active Power Mode Configuration - Bandgap Mode

[0b00]Bandgap disabled
[0b01]Bandgap enabled, buffer disabled
[0b10]Bandgap enabled, buffer enabled
[0b11]

◆ ACTIVE_CFG_CORE_LVDE()

static constexpr uint32 chip::spc::SPC::ACTIVE_CFG_CORE_LVDE ( uint32 value )

inlinestaticconstexpr

ACTIVE_CFG - CORE_LVDE.

Active Power Mode Configuration - Core Low-Voltage Detection Enable

[0b0]Disable
[0b1]Enable

◆ ACTIVE_CFG_CORELDO_VDD_DS()

static constexpr uint32 chip::spc::SPC::ACTIVE_CFG_CORELDO_VDD_DS ( uint32 value )

inlinestaticconstexpr

ACTIVE_CFG - CORELDO_VDD_DS.

Active Power Mode Configuration - LDO_CORE VDD Drive Strength

[0b0]Low
[0b1]Normal

◆ ACTIVE_CFG_CORELDO_VDD_LVL()

static constexpr uint32 chip::spc::SPC::ACTIVE_CFG_CORELDO_VDD_LVL ( uint32 value )

inlinestaticconstexpr

ACTIVE_CFG - CORELDO_VDD_LVL.

Active Power Mode Configuration - LDO_CORE VDD Regulator Voltage Level

[0b00]
[0b01]Regulate to mid voltage (1.0 V)
[0b10]Regulate to normal voltage (1.1 V)
[0b11]Regulate to overdrive voltage (1.15 V)

◆ ACTIVE_CFG_SYS_HVDE()

static constexpr uint32 chip::spc::SPC::ACTIVE_CFG_SYS_HVDE ( uint32 value )

inlinestaticconstexpr

ACTIVE_CFG - SYS_HVDE.

Active Power Mode Configuration - System High-Voltage Detection Enable

[0b0]Disable
[0b1]Enable

◆ ACTIVE_CFG_SYS_LVDE()

static constexpr uint32 chip::spc::SPC::ACTIVE_CFG_SYS_LVDE ( uint32 value )

inlinestaticconstexpr

ACTIVE_CFG - SYS_LVDE.

Active Power Mode Configuration - System Low-Voltage Detection Enable

[0b0]Disable
[0b1]Enable

◆ ACTIVE_CFG_VDD_VD_DISABLE()

static constexpr uint32 chip::spc::SPC::ACTIVE_CFG_VDD_VD_DISABLE ( uint32 value )

inlinestaticconstexpr

ACTIVE_CFG - VDD_VD_DISABLE.

Active Power Mode Configuration - VDD Voltage Detect Disable

[0b0]Enable
[0b1]Disable

◆ ACTIVE_VDELAY_ACTIVE_VDELAY()

static constexpr uint32 chip::spc::SPC::ACTIVE_VDELAY_ACTIVE_VDELAY ( uint32 value )

inlinestaticconstexpr

ACTIVE_VDELAY - ACTIVE_VDELAY.

Active Voltage Trim Delay - Active Voltage Delay

◆ CFG_INTG_PWSWTCH_SLEEP_ACTIVE_EN()

static constexpr uint32 chip::spc::SPC::CFG_INTG_PWSWTCH_SLEEP_ACTIVE_EN ( uint32 value )

inlinestaticconstexpr

CFG - INTG_PWSWTCH_SLEEP_ACTIVE_EN.

SPC Configuration - Integrated Power Switch Active Enable

[0b0]Disable
[0b1]Enable

◆ CFG_INTG_PWSWTCH_SLEEP_EN()

static constexpr uint32 chip::spc::SPC::CFG_INTG_PWSWTCH_SLEEP_EN ( uint32 value )

inlinestaticconstexpr

CFG - INTG_PWSWTCH_SLEEP_EN.

SPC Configuration - Integrated Power Switch Sleep Enable

[0b0]Disable
[0b1]Enable

◆ CFG_INTG_PWSWTCH_WKUP_ACTIVE_EN()

static constexpr uint32 chip::spc::SPC::CFG_INTG_PWSWTCH_WKUP_ACTIVE_EN ( uint32 value )

inlinestaticconstexpr

CFG - INTG_PWSWTCH_WKUP_ACTIVE_EN.

SPC Configuration - Integrated Power Switch Wake-up Enable

[0b0]Disable
[0b1]Enable

◆ CFG_INTG_PWSWTCH_WKUP_EN()

static constexpr uint32 chip::spc::SPC::CFG_INTG_PWSWTCH_WKUP_EN ( uint32 value )

inlinestaticconstexpr

CFG - INTG_PWSWTCH_WKUP_EN.

SPC Configuration - Integrated Power Switch Wake-up Enable

[0b0]Disable
[0b1]Enable

◆ checkLowPowerReqest()

static bool chip::spc::SPC::checkLowPowerReqest ( Register & base )

inlinestatic

Checks system low power request.

註: Only when all power domains request low power mode entry, the result of this function is true. That means when all power domains request low power mode entry, the SPC regulators will be controlled by LP_CFG register.

參數

base	SPC peripheral base address.

傳回值

The system low power request check result.

true All power domains have requested low power mode and SPC has entered a low power state and power mode configuration are based on the LP_CFG configuration register.
false SPC in active mode and ACTIVE_CFG register control system power supply.

◆ checkPowerDomainLowPowerRequest()

static bool chip::spc::SPC::checkPowerDomainLowPowerRequest	(	Register &	base,
		PowerDomainID	powerDomainId )

inlinestatic

Checks power domain's low power request.

參數

base	SPC peripheral base address.
powerDomainId	Power Domain Id, please refer to PowerDomainID.

傳回值

The result of power domain's low power request.

true The selected power domain requests low power mode entry.
false The selected power domain does not request low power mode entry.

◆ checkSwitchState()

static bool chip::spc::SPC::checkSwitchState ( Register & base )

inlinestatic

Checks whether the power switch is on.

參數

base	SPC peripheral base address.

傳回值: true The power switch is on.; false The power switch is off.

◆ clearLowPowerRequest()

static void chip::spc::SPC::clearLowPowerRequest ( Register & base )

inlinestatic

Clears system low power request, set SPC in active mode.

參數

base	SPC peripheral base address.

◆ clearPeriphIOIsolationFlag()

static void chip::spc::SPC::clearPeriphIOIsolationFlag ( Register & base )

inlinestatic

Clears peripherals and I/O pads isolation flags for each power domains.

This function clears peripherals and I/O pads isolation flags for each power domains. After recovering from the POWERDOWN mode, user must invoke this function to release the I/O pads and certain peripherals to their normal run mode state. Before invoking this function, user must restore chip configuration in particular pin configuration for enabled WUU wakeup pins.

參數

base	SPC peripheral base address.

◆ clearPowerDomainLowPowerRequestFlag()

static void chip::spc::SPC::clearPowerDomainLowPowerRequestFlag	(	Register &	base,
		PowerDomainID	powerDomainId )

inlinestatic

Clears selected power domain's low power request flag.

參數

base	SPC peripheral base address.
powerDomainId	Power Domain Id, please refer to PowerDomainID.

◆ clearVoltageDetectStatusFlag()

static void chip::spc::SPC::clearVoltageDetectStatusFlag	(	Register &	base,
		uint8	mask )

inlinestatic

Clear Voltage Detect Status Flags.

參數

base	SPC peripheral base address.
mask	The mask of the voltage detect status flags. See _spc_voltage_detect_flags for details.

◆ disableActiveModeAnalogModules()

static void chip::spc::SPC::disableActiveModeAnalogModules	(	Register &	base,
		uint32	maskValue )

inlinestatic

Disables analog modules in active mode.

參數

base	SPC peripheral base address.
maskValue	The mask of analog modules to disable in active mode, should be the OR'ed value of spc_analog_module_control.

◆ disableLowPowerModeAnalogModules()

static void chip::spc::SPC::disableLowPowerModeAnalogModules	(	Register &	base,
		uint32	maskValue )

inlinestatic

Disables analog modules in low power modes.

參數

base	SPC peripheral base address.
maskValue	The mask of analog modules to disable in low power modes, should be OR'ed value of spc_analog_module_control.

◆ enableActiveModeAnalogModules()

static void chip::spc::SPC::enableActiveModeAnalogModules	(	Register &	base,
		uint32	maskValue )

inlinestatic

Enables analog modules in active mode.

參數

base	SPC peripheral base address.
maskValue	The mask of analog modules to enable in active mode, should be the OR'ed value of spc_analog_module_control.

◆ enableActiveModeCoreLowVoltageDetect()

static chip::spc::Status chip::spc::SPC::enableActiveModeCoreLowVoltageDetect	(	Register &	base,
		bool	enable )

static

Enables/Disables the Core Low Voltage Detector in Active mode.

註: If the CORE_LDO low voltage detect is enabled in Active mode, please note that the bandgap must be enabled and the drive strength of each regulator must not set to low.

參數

base	SPC peripheral base address.
enable	Enable/Disable Core LVD. true - Enable Core Low voltage detector in active mode. false - Disable Core Low voltage detector in active mode.

傳回值: #kStatus_Success Enable/Disable Core Low Voltage Detect successfully.

◆ enableActiveModeSystemHighVoltageDetect()

static chip::spc::Status chip::spc::SPC::enableActiveModeSystemHighVoltageDetect	(	Register &	base,
		bool	enable )

static

Enables/Disables the System High Voltage Detector in Active mode.

註: If the System_LDO high voltage detect is enabled in Active mode, please note that the bandgap must be enabled and the drive strength of each regulator must not set to low in Active mode.

參數

base	SPC peripheral base address.
enable	Enable/Disable System HVD. true - Enable System High voltage detector in active mode. false - Disable System High voltage detector in active mode.

傳回值: #kStatus_Success Enable/Disable System High Voltage Detect successfully.

◆ enableActiveModeSystemLowVoltageDetect()

static chip::spc::Status chip::spc::SPC::enableActiveModeSystemLowVoltageDetect	(	Register &	base,
		bool	enable )

static

Enables/Disable the System Low Voltage Detector in Active mode.

註: If the System_LDO low voltage detect is enabled in Active mode, please note that the bandgap must be enabled and the drive strength of each regulator must not set to low in Active mode.

參數

base	SPC peripheral base address.
enable	Enable/Disable System LVD. true - Enable System Low voltage detector in active mode. false - Disable System Low voltage detector in active mode.

傳回值: #kStatus_Success Enable/Disable the System Low Voltage Detect successfully.

◆ enableIntegratedPowerSwitchAutomatically()

static void chip::spc::SPC::enableIntegratedPowerSwitchAutomatically	(	Register &	base,
		bool	sleepGate,
		bool	wakeupUngate )

inlinestatic

Enables/disables the integrated power switch automatically.

To gate the integrated power switch when chip enter low power modes, and ungate the switch after wake-up from low power modes:

SPC::enableIntegratedPowerSwitchAutomatically(SPC, true, true);

chip::spc::SPC

Definition SPC.h:56

chip::spc::SPC::enableIntegratedPowerSwitchAutomatically

static void enableIntegratedPowerSwitchAutomatically(Register &base, bool sleepGate, bool wakeupUngate)

Enables/disables the integrated power switch automatically.

Definition SPC.h:313

參數

base SPC peripheral base address.

sleepGate

Enable the integrated power switch when chip enter low power modes:

     - \b true SPC static_asserts an output pin at low-power entry to power-gate the switch;

     - \b false SPC does not static_assert an output pin at low-power entry to power-gate the switch.

wakeupUngate

Enables the switch after wake-up from low power modes:

     - \b true SPC static_asserts an output pin at low-power exit to power-ungate the switch;

     - \b false SPC does not static_assert an output pin at low-power exit to power-ungate the switch.

◆ enableIntegratedPowerSwitchManually()

static void chip::spc::SPC::enableIntegratedPowerSwitchManually	(	Register &	base,
		bool	enable )

inlinestatic

Enables/disables the integrated power switch manually.

參數

base	SPC peripheral base address.
enable	Used to enable/disable the integrated power switch: true Enable the integrated power switch; false Disable the integrated power switch.

◆ enableLowPowerModeAnalogModules()

static void chip::spc::SPC::enableLowPowerModeAnalogModules	(	Register &	base,
		uint32	maskValue )

inlinestatic

Enables analog modules in low power modes.

參數

base	SPC peripheral base address.
maskValue	The mask of analog modules to enable in low power modes, should be OR'ed value of spc_analog_module_control.

◆ enableLowPowerModeCoreLowVoltageDetect()

static chip::spc::Status chip::spc::SPC::enableLowPowerModeCoreLowVoltageDetect	(	Register &	base,
		bool	enable )

static

Enables/Disables the Core Low Voltage Detector in Low Power mode.

This function enables/disables the Core Low Voltage Detector. If enabled the Core Low Voltage detector. The Bandgap mode in low power mode must be programmed so that Bandgap is enabled.

註: If the CORE_LDO low voltage detect is enabled in Low Power mode, please note that the bandgap must be enabled and the drive strength of each regulator must not set to low in Low Power mode.

參數

base	SPC peripheral base address.
enable	Enable/Disable Core HVD. true - Enable Core Low voltage detector in low power mode. false - Disable Core Low voltage detector in low power mode.

傳回值: #kStatus_Success Enable/Disable Core Low Voltage Detect in low power mode successfully.

◆ enableLowPowerModeLowPowerIREF()

static void chip::spc::SPC::enableLowPowerModeLowPowerIREF	(	Register &	base,
		bool	enable )

inlinestatic

Enables/Disables Low Power IREF in low power modes.

This function enables/disables Low Power IREF. Low Power IREF can only get disabled in Deep power down mode. In other low power modes, the Low Power IREF is always enabled.

參數

base	SPC peripheral base address.
enable	Enable/Disable Low Power IREF. true - Enable Low Power IREF for Low Power modes. false - Disable Low Power IREF for Deep Power Down mode.

◆ enableLowPowerModeSystemHighVoltageDetect()

static chip::spc::Status chip::spc::SPC::enableLowPowerModeSystemHighVoltageDetect	(	Register &	base,
		bool	enable )

static

Enables/Disables the System High Voltage Detector in Low Power mode.

註: If the System_LDO high voltage detect is enabled in Low Power mode, please note that the bandgap must be enabled and the drive strength of each regulator must not set to low in Low Power mode.

參數

base	SPC peripheral base address.
enable	Enable/Disable System HVD. true - Enable System High voltage detector in low power mode. false - Disable System High voltage detector in low power mode.

傳回值: #kStatus_Success Enable/Disable System High Voltage Detect in low power mode successfully.

◆ enableLowPowerModeSystemLowVoltageDetect()

static chip::spc::Status chip::spc::SPC::enableLowPowerModeSystemLowVoltageDetect	(	Register &	base,
		bool	enable )

static

Enables/Disables the System Low Voltage Detector in Low Power mode.

註: If the System_LDO low voltage detect is enabled in Low Power mode, please note that the bandgap must be enabled and the drive strength of each regulator must not set to low in Low Power mode.

參數

base	SPC peripheral base address.
enable	Enable/Disable System HVD. true - Enable System Low voltage detector in low power mode. false - Disable System Low voltage detector in low power mode.

傳回值: #kStatus_Success Enables System Low Voltage Detect in low power mode successfully.

◆ enableSRAMLdo()

static void chip::spc::SPC::enableSRAMLdo	(	Register &	base,
		bool	enable )

inlinestatic

Enables/disables SRAM retention LDO.

參數

base	SPC peripheral base address.
enable	Used to enable/disable SRAM LDO : true Enable SRAM LDO; false Disable SRAM LDO.

◆ enableSRAMLdOLowPowerModeIREF()

static void chip::spc::SPC::enableSRAMLdOLowPowerModeIREF	(	Register &	base,
		bool	enable )

inlinestatic

Enables/disables SRAM_LDO deep power low power IREF.

參數

base	SPC peripheral base address.
enable	Used to enable/disable low power IREF : true: Low Power IREF is enabled ; false: Low Power IREF is disabled for power saving.

◆ EVD_CFG_EVDISO()

static constexpr uint32 chip::spc::SPC::EVD_CFG_EVDISO ( uint32 value )

inlinestaticconstexpr

EVD_CFG - EVDISO.

External Voltage Domain Configuration - External Voltage Domain Isolation

◆ EVD_CFG_EVDLPISO()

static constexpr uint32 chip::spc::SPC::EVD_CFG_EVDLPISO ( uint32 value )

inlinestaticconstexpr

EVD_CFG - EVDLPISO.

External Voltage Domain Configuration - External Voltage Domain Low-Power Isolation

◆ EVD_CFG_EVDSTAT()

static constexpr uint32 chip::spc::SPC::EVD_CFG_EVDSTAT ( uint32 value )

inlinestaticconstexpr

EVD_CFG - EVDSTAT.

External Voltage Domain Configuration - External Voltage Domain Status

◆ getActiveModeBandgapMode()

static BandgapMode chip::spc::SPC::getActiveModeBandgapMode ( Register & base )

inlinestatic

Gets the Bandgap mode in Active mode.

參數

base	SPC peripheral base address.

傳回值: Bandgap mode in the type of chip::spc::BandgapMode enumeration.

◆ getActiveModeCoreLDODriveStrength()

static CoreLdoDriveStrength chip::spc::SPC::getActiveModeCoreLDODriveStrength ( Register & base )

inlinestatic

Gets CORE LDO VDD Regulator Drive Strength in Active mode.

參數

base	SPC peripheral base address.

傳回值: Drive Strength of CORE LDO regulator in Active mode, please refer to CoreLdoDriveStrength.

◆ getActiveModeCoreLDOVDDVoltageLevel()

static CoreLdoVoltageLevel chip::spc::SPC::getActiveModeCoreLDOVDDVoltageLevel ( Register & base )

inlinestatic

Gets CORE LDO Regulator Voltage level.

This function returns the voltage level of CORE LDO Regulator in Active mode.

參數

base	SPC peripheral base address.

傳回值: Voltage level of CORE LDO in type of CoreLdoVoltageLevel enumeration.

◆ getActiveModeEnabledAnalogModules()

static uint32 chip::spc::SPC::getActiveModeEnabledAnalogModules ( Register & base )

inlinestatic

Gets enabled analog modules that enabled in active mode.

參數

base	SPC peripheral base address.

傳回值: The mask of enabled analog modules that enabled in active mode.

◆ getActiveModeVoltageDetectStatus()

static uint32 chip::spc::SPC::getActiveModeVoltageDetectStatus ( Register & base )

inlinestatic

Gets all voltage detectors status in Active mode.

參數

base	SPC peripheral base address.

傳回值: All voltage detectors status in Active mode.

◆ getBusyStatusFlag()

static bool chip::spc::SPC::getBusyStatusFlag ( Register & base )

inlinestatic

Gets SPC busy status flag.

This function gets SPC busy status flag. When SPC executing any type of power mode transition in ACTIVE mode or any of the SOC low power mode, the SPC busy status flag is set and this function returns true. When changing CORE LDO voltage level and DCDC voltage level in ACTIVE mode, the SPC busy status flag is set and this function return true.

參數

base	SPC peripheral base address.

傳回值: Ack busy flag. true - SPC is busy. false - SPC is not busy.

◆ getExternalDomainsStatus()

static uint8 chip::spc::SPC::getExternalDomainsStatus ( Register & base )

inlinestatic

Gets External Domains status.

參數

base	SPC peripheral base address.

傳回值: The status of each external domain.

◆ getLowPowerCoreLDOVDDDriveStrength()

static CoreLdoDriveStrength chip::spc::SPC::getLowPowerCoreLDOVDDDriveStrength ( Register & base )

inlinestatic

Gets CORE LDO VDD Drive Strength for Low Power modes.

參數

base	SPC peripheral base address.

傳回值: The CORE LDO's VDD Drive Strength.

◆ getLowPowerCoreLDOVDDVoltageLevel()

static CoreLdoVoltageLevel chip::spc::SPC::getLowPowerCoreLDOVDDVoltageLevel ( Register & base )

inlinestatic

Gets the CORE LDO VDD Regulator Voltage Level for Low Power modes.

參數

base	SPC peripheral base address.

傳回值: The CORE LDO VDD Regulator's voltage level.

◆ getLowPowerModeBandgapMode()

static chip::spc::BandgapMode chip::spc::SPC::getLowPowerModeBandgapMode ( Register & base )

inlinestatic

Gets the Bandgap mode in Low Power mode.

參數

base	SPC peripheral base address.

傳回值: Bandgap mode in the type of chip::spc::BandgapMode enumeration.

◆ getLowPowerModeEnabledAnalogModules()

static uint32 chip::spc::SPC::getLowPowerModeEnabledAnalogModules ( Register & base )

inlinestatic

Gets enabled analog modules that enabled in low power modes.

參數

base	SPC peripheral base address.

傳回值: The mask of enabled analog modules that enabled in low power modes.

◆ getLowPowerModeVoltageDetectStatus()

static uint32 chip::spc::SPC::getLowPowerModeVoltageDetectStatus ( Register & base )

inlinestatic

Gets the status of all voltage detectors in Low Power mode.

參數

base	SPC peripheral base address.

傳回值: The status of all voltage detectors in low power mode.

◆ getPeriphIOIsolationStatus()

static uint8 chip::spc::SPC::getPeriphIOIsolationStatus ( Register & base )

static

Gets Isolation status for each power domains.

This function gets the status which indicates whether certain peripheral and the IO pads are in a latched state as a result of having been in POWERDOWN mode.

參數

base	SPC peripheral base address.

傳回值: Current isolation status for each power domains. See _spc_power_domains for details.

◆ getPowerDomainLowPowerMode()

static PowerDomainLowPowerMode chip::spc::SPC::getPowerDomainLowPowerMode	(	Register &	base,
		PowerDomainID	powerDomainId )

static

Gets selected power domain's requested low power mode.

參數

base	SPC peripheral base address.
powerDomainId	Power Domain Id, please refer to PowerDomainID.

傳回值: The selected power domain's requested low power mode, please refer to spc_power_domain_low_power_mode_t.

◆ getVoltageDetectStatusFlag()

static uint8 chip::spc::SPC::getVoltageDetectStatusFlag ( Register & base )

inlinestatic

Get Voltage Detect Status Flags.

參數

base	SPC peripheral base address.

傳回值: Voltage Detect Status Flags. See _spc_voltage_detect_flags for details.

◆ lockCoreVoltageDetectResetSetting()

static void chip::spc::SPC::lockCoreVoltageDetectResetSetting ( Register & base )

inlinestatic

Locks Core voltage detect reset setting.

This function locks core voltage detect reset setting. After invoking this function any configuration of Core voltage detect reset will be ignored.

參數

base	SPC peripheral base address.

◆ lockSystemVoltageDetectResetSetting()

static void chip::spc::SPC::lockSystemVoltageDetectResetSetting ( Register & base )

inlinestatic

Lock System voltage detect reset setting.

This function locks system voltage detect reset setting. After invoking this function any configuration of System Voltage detect reset will be ignored.

參數

base	SPC peripheral base address.

◆ LP_CFG1_SOC_CNTRL()

static constexpr uint32 chip::spc::SPC::LP_CFG1_SOC_CNTRL ( uint32 value )

inlinestaticconstexpr

LP_CFG1 - SOC_CNTRL.

Low Power Mode Configuration 1 - Low-Power Configuration Chip Control

◆ LP_CFG_BGMODE()

static constexpr uint32 chip::spc::SPC::LP_CFG_BGMODE ( uint32 value )

inlinestaticconstexpr

LP_CFG - BGMODE.

Low-Power Mode Configuration - Bandgap Mode

[0b00]Bandgap disabled
[0b01]Bandgap enabled, buffer disabled
[0b10]Bandgap enabled, buffer enabled
[0b11]

◆ LP_CFG_CORE_LVDE()

static constexpr uint32 chip::spc::SPC::LP_CFG_CORE_LVDE ( uint32 value )

inlinestaticconstexpr

LP_CFG - CORE_LVDE.

Low-Power Mode Configuration - Core Low Voltage Detect Enable

[0b0]Disable
[0b1]Enable

◆ LP_CFG_CORELDO_VDD_DS()

static constexpr uint32 chip::spc::SPC::LP_CFG_CORELDO_VDD_DS ( uint32 value )

inlinestaticconstexpr

LP_CFG - CORELDO_VDD_DS.

Low-Power Mode Configuration - LDO_CORE VDD Drive Strength

[0b0]Low
[0b1]Normal

◆ LP_CFG_CORELDO_VDD_LVL()

static constexpr uint32 chip::spc::SPC::LP_CFG_CORELDO_VDD_LVL ( uint32 value )

inlinestaticconstexpr

LP_CFG - CORELDO_VDD_LVL.

Low-Power Mode Configuration - LDO_CORE VDD Regulator Voltage Level

[0b00]Reserved
[0b01]Mid voltage (1.0 V)
[0b10]Normal voltage (1.1 V)
[0b11]Overdrive voltage (1.15 V)

◆ LP_CFG_LP_IREFEN()

static constexpr uint32 chip::spc::SPC::LP_CFG_LP_IREFEN ( uint32 value )

inlinestaticconstexpr

LP_CFG - LP_IREFEN.

Low-Power Mode Configuration - Low-Power IREF Enable

[0b0]Disable for power saving in Deep Power Down mode
[0b1]Enable

◆ LP_CFG_SRAMLDO_DPD_ON()

static constexpr uint32 chip::spc::SPC::LP_CFG_SRAMLDO_DPD_ON ( uint32 value )

inlinestaticconstexpr

LP_CFG - SRAMLDO_DPD_ON.

Low-Power Mode Configuration - SRAM_LDO Deep Power Low Power IREF Enable

[0b0]Low Power IREF is disabled for power saving in Deep Power Down mode
[0b1]Low Power IREF is enabled

◆ LP_CFG_SYS_HVDE()

static constexpr uint32 chip::spc::SPC::LP_CFG_SYS_HVDE ( uint32 value )

inlinestaticconstexpr

LP_CFG - SYS_HVDE.

Low-Power Mode Configuration - System High Voltage Detect Enable

[0b0]Disable
[0b1]Enable

◆ LP_CFG_SYS_LVDE()

static constexpr uint32 chip::spc::SPC::LP_CFG_SYS_LVDE ( uint32 value )

inlinestaticconstexpr

LP_CFG - SYS_LVDE.

Low-Power Mode Configuration - System Low Voltage Detect Enable

[0b0]Disable
[0b1]Enable

◆ LPREQ_CFG_LPREQOE()

static constexpr uint32 chip::spc::SPC::LPREQ_CFG_LPREQOE ( uint32 value )

inlinestaticconstexpr

LPREQ_CFG - LPREQOE.

Low-Power Request Configuration - Low-Power Request Output Enable

[0b0]Disable
[0b1]Enable

◆ LPREQ_CFG_LPREQOV()

static constexpr uint32 chip::spc::SPC::LPREQ_CFG_LPREQOV ( uint32 value )

inlinestaticconstexpr

LPREQ_CFG - LPREQOV.

Low-Power Request Configuration - Low-Power Request Output Override

[0b00]Not forced
[0b01]
[0b10]Forced low (ignore LPREQPOL settings)
[0b11]Forced high (ignore LPREQPOL settings)

◆ LPREQ_CFG_LPREQPOL()

static constexpr uint32 chip::spc::SPC::LPREQ_CFG_LPREQPOL ( uint32 value )

inlinestaticconstexpr

LPREQ_CFG - LPREQPOL.

Low-Power Request Configuration - Low-Power Request Output Pin Polarity Control

[0b0]High
[0b1]Low

◆ LPWKUP_DELAY_LPWKUP_DELAY()

static constexpr uint32 chip::spc::SPC::LPWKUP_DELAY_LPWKUP_DELAY ( uint32 value )

inlinestaticconstexpr

LPWKUP_DELAY - LPWKUP_DELAY.

Low Power Wake-Up Delay - Low-Power Wake-Up Delay

◆ PD_STATUS_LP_MODE()

static constexpr uint32 chip::spc::SPC::PD_STATUS_LP_MODE ( uint32 value )

inlinestaticconstexpr

PD_STATUS - LP_MODE.

SPC Power Domain Mode Status - Power Domain Low Power Mode Request

[0b0000]SLEEP with system clock running
[0b0001]DSLEEP with system clock off
[0b0010]PDOWN with system clock off
[0b0100]
[0b1000]DPDOWN with system clock off

◆ PD_STATUS_PD_LP_REQ()

static constexpr uint32 chip::spc::SPC::PD_STATUS_PD_LP_REQ ( uint32 value )

inlinestaticconstexpr

PD_STATUS - PD_LP_REQ.

SPC Power Domain Mode Status - Power Domain Low Power Request Flag

[0b0]Did not request
[0b1]Requested

◆ PD_STATUS_PWR_REQ_STATUS()

static constexpr uint32 chip::spc::SPC::PD_STATUS_PWR_REQ_STATUS ( uint32 value )

inlinestaticconstexpr

PD_STATUS - PWR_REQ_STATUS.

SPC Power Domain Mode Status - Power Request Status Flag

[0b0]Did not request
[0b1]Requested

◆ retainSRAMArray()

static void chip::spc::SPC::retainSRAMArray	(	Register &	base,
		uint8	mask )

inlinestatic

待辦事項: Need to check.

參數

base	SPC peripheral base address.
mask	The OR'ed value of SRAM Array.

◆ SC_BUSY()

static constexpr uint32 chip::spc::SPC::SC_BUSY ( uint32 value )

inlinestaticconstexpr

SC - BUSY.

Status Control - SPC Busy Status Flag

[0b0]Not busy
[0b1]Busy

◆ SC_ISO_CLR()

static constexpr uint32 chip::spc::SPC::SC_ISO_CLR ( uint32 value )

inlinestaticconstexpr

SC - ISO_CLR.

Status Control - Isolation Clear Flags

◆ SC_SPC_LP_MODE()

static constexpr uint32 chip::spc::SPC::SC_SPC_LP_MODE ( uint32 value )

inlinestaticconstexpr

SC - SPC_LP_MODE.

Status Control - Power Domain Low-Power Mode Request

[0b0000]Sleep mode with system clock running
[0b0001]DSLEEP with system clock off
[0b0010]PDOWN with system clock off
[0b0100]
[0b1000]DPDOWN with system clock off

◆ SC_SPC_LP_REQ()

static constexpr uint32 chip::spc::SPC::SC_SPC_LP_REQ ( uint32 value )

inlinestaticconstexpr

SC - SPC_LP_REQ.

Status Control - SPC Power Mode Configuration Status Flag

[0b0]SPC is in Active mode; the ACTIVE_CFG register has control
[0b1]All power domains requested low-power mode; SPC entered a low-power state; power-mode configuration based on the LP_CFG register
[0b0]No effect
[0b1]Clear the flag

◆ SC_SWITCH_STATE()

static constexpr uint32 chip::spc::SPC::SC_SWITCH_STATE ( uint32 value )

inlinestaticconstexpr

SC - SWITCH_STATE.

Status Control - Power Switch State

[0b0]Off
[0b1]On

◆ setActiveModeBandgapModeConfig()

static chip::spc::Status chip::spc::SPC::setActiveModeBandgapModeConfig	(	Register &	base,
		chip::spc::BandgapMode	mode )

static

Configs Bandgap mode in Active mode.

註

To disable bandgap in Active mode:

Disable all LVD's and HVD's in active mode;
Disable Glitch detect;
Configrue LDO's and DCDC to low drive strength in active mode;
Invoke this function to disable bandgap in active mode; otherwise the error status will be reported.

Some other system resources(such as PLL, CMP) require bandgap to be enabled, to disable bandgap please take care of other system resources.

參數

base	SPC peripheral base address.
mode	The Bandgap mode be selected.

傳回值: #kStatus_SPC_BandgapModeWrong The Bandgap can not be disabled in active mode.; #kStatus_Success Config Bandgap mode in Active power mode successful.

◆ setActiveModeCoreLDORegulatorConfig()

static chip::spc::Status chip::spc::SPC::setActiveModeCoreLDORegulatorConfig	(	Register &	base,
		const ActiveModeCoreLdoOption &	option )

static

Configs Core LDO Regulator in Active mode.

註: The bandgap must be enabled before invoking this function.; To set Core LDO as low drive strength, all HVDs/LVDs must be disabled previously.

參數

base	SPC peripheral base address.
option	Pointer to the ActiveModeCoreLdoOption structure.

傳回值: kStatus_Success Config Core LDO regulator in Active power mode successful.; kStatus_SPC_Busy The SPC instance is busy to execute any type of power mode transition.; kStatus_SPC_BandgapModeWrong Bandgap should be enabled before invoking this function.; kStatus_SPC_CORELDOLowDriveStrengthIgnore To set Core LDO as low drive strength, all LVDs/HVDs must be disabled before invoking this function.

◆ setActiveModeCoreLDORegulatorDriveStrength()

static chip::spc::Status chip::spc::SPC::setActiveModeCoreLDORegulatorDriveStrength	(	Register &	base,
		CoreLdoDriveStrength	driveStrength )

static

Set Core LDO VDD Regulator Drive Strength in Active mode.

參數

base	SPC peripheral base address.
driveStrength	Specify the drive strength of CORE LDO Regulator in Active mode, please refer to CoreLdoDriveStrength.

傳回值: #kStatus_Success Set Core LDO regulator drive strength in Active power mode successful.; #kStatus_SPC_CORELDOLowDriveStrengthIgnore If any voltage detect enabled, core_ldo's drive strength can not set to low.; #kStatus_SPC_BandgapModeWrong The selected bandgap mode is not allowed.

◆ setActiveModeCoreLDORegulatorVoltageLevel()

static chip::spc::Status chip::spc::SPC::setActiveModeCoreLDORegulatorVoltageLevel	(	Register &	base,
		CoreLdoVoltageLevel	voltageLevel )

static

Set Core LDO Regulator Voltage level in Active mode.

參數

base	SPC peripheral base address.
voltageLevel	Specify the voltage level of CORE LDO Regulator in Active mode, please refer to CoreLdoVoltageLevel.

註: In active mode, the Core LDO voltage level should only be changed when the Core LDO is in normal drive strength.; Update Core LDO voltage level will set Busy flag, this function return only when busy flag is cleared by hardware

傳回值: kStatus_SPC_CORELDOVoltageSetFail The drive strength of Core LDO is not normal.; kStatus_Success Set Core LDO regulator voltage level in Active power mode successful.

◆ setActiveModeRegulatorsConfig()

static chip::spc::Status chip::spc::SPC::setActiveModeRegulatorsConfig	(	Register &	base,
		const ActiveModeRegulatorsConfig &	config )

static

Configs all settings of regulators in Active mode at a time.

註

This function is used to overwrite all settings of regulators(including bandgap mode, regulators' drive strength and voltage level) in active mode at a time.

Enable/disable LVDs/HVDs before invoking this function.

This function will check input parameters based on hardware restrictions before setting registers, if input parameters do not satisfy hardware restrictions the specific error will be reported.

Some hardware restrictions not covered, application should be aware of this and follow this hardware restrictions otherwise some unkown issue may occur:

If Core LDO's drive strength are set to same value in both Active mode and low power mode, the voltage level should also set to same value.
When switching Core LDO's drive strength from low to normal, ensure the LDO_CORE high voltage level is set to same level that was set prior to switching to the LDO_CORE drive strength. Otherwise, if the LVDs are enabled, an unexpected LVD can occur.

If this function can not satisfy some tricky settings, please invoke other APIs in low-level function group.

參數

base	SPC peripheral base address.
config	Pointer to ActiveModeRegulatorsConfig structure.

傳回值: #kStatus_Success Config regulators in Active power mode successful.; #kStatus_SPC_BandgapModeWrong Based on input setting, bandgap can not be disabled.; #kStatus_SPC_Busy The SPC instance is busy to execute any type of power mode transition.; #kStatus_SPC_CORELDOLowDriveStrengthIgnore Any of LVDs/HVDs kept enabled before invoking this function.; #kStatus_SPC_SYSLDOOverDriveVoltageFail Fail to regulator to Over Drive Voltage due to System VDD HVD is not disabled.; #kStatus_SPC_SYSLDOLowDriveStrengthIgnore Any of LVDs/HVDs kept enabled before invoking this function.; #kStatus_SPC_CORELDOVoltageWrong Core LDO and System LDO do not have same voltage level.

◆ setActiveModeVoltageTrimDelay()

static void chip::spc::SPC::setActiveModeVoltageTrimDelay	(	Register &	base,
		uint16	delay )

inlinestatic

Sets the delay when the regulators change voltage level in Active mode.

參數

base	SPC peripheral base address.
delay	The number of SPC timer clock cycles.

◆ setCoreVoltageDetectConfig()

static void chip::spc::SPC::setCoreVoltageDetectConfig	(	Register &	base,
		const CoreVoltageDetectConfig &	config )

static

Configs CORE voltage detect options.

註: : Setting both the voltage detect interrupt and reset enable will cause interrupt to be generated on exit from reset. If those conditioned is not desired, interrupt/reset so only one is enabled.

參數

base	SPC peripheral base address.
config	Pointer to core_voltage_detect_config_t structure.

◆ setExternalVoltageDomainsConfig()

static void chip::spc::SPC::setExternalVoltageDomainsConfig	(	Register &	base,
		uint8	lowPowerIsoMask,
		uint8	IsoMask )

static

Configs external voltage domains.

This function configs external voltage domains isolation.

參數

base	SPC peripheral base address.
lowPowerIsoMask	The mask of external domains isolate enable during low power mode. Please read the Reference Manual for the Bitmap.
IsoMask	The mask of external domains isolate. Please read the Reference Manual for the Bitmap.

◆ setLowPowerModeBandgapmodeConfig()

static chip::spc::Status chip::spc::SPC::setLowPowerModeBandgapmodeConfig	(	Register &	base,
		chip::spc::BandgapMode	mode )

static

Configs Bandgap mode in Low Power mode.

註

To disable Bandgap in Low-power mode:

Disable all LVD's ad HVD's in low power mode;
Disable Glitch detect in low power mode;
Configure LDO's and DCDC to low drive strength in low power mode;
Disable bandgap in low power mode; Otherwise, the error status will be reported.

Some other system resources(such as PLL, CMP) require bandgap to be enabled, to disable bandgap please take care of other system resources.

參數

base	SPC peripheral base address.
mode	The Bandgap mode be selected.

傳回值: #kStatus_SPC_BandgapModeWrong The bandgap mode setting in Low Power mode is wrong.; #kStatus_Success Config Bandgap mode in Low Power power mode successful.

◆ setLowPowerModeCoreLDORegulatorConfig()

static chip::spc::Status chip::spc::SPC::setLowPowerModeCoreLDORegulatorConfig	(	Register &	base,
		const LowPowerModeCoreLdoOption &	option )

static

Configs CORE LDO Regulator in low power mode.

This function configs CORE LDO Regulator in Low Power mode. If CORE LDO VDD Drive Strength is set to Normal, the CORE LDO VDD regulator voltage level in Active mode must be equal to the voltage level in Low power mode. And the Bandgap must be programmed to select bandgap enabled. Core VDD voltage levels for the Core LDO low power regulator can only be changed when the CORE LDO Drive Strength set as Normal.

參數

base	SPC peripheral base address.
option	Pointer to the LowPowerModeCoreLdoOption structure.

傳回值: #kStatus_Success Config Core LDO regulator in power mode successfully.; #kStatus_SPC_Busy The SPC instance is busy to execute any type of power mode transition.; #kStatus_SPC_CORELDOLowDriveStrengthIgnore Set driver strength to low will be ignored.; #kStatus_SPC_CORELDOVoltageSetFail. Fail to change Core LDO voltage level.

◆ setLowPowerModeCoreLDORegulatorDriveStrength()

static chip::spc::Status chip::spc::SPC::setLowPowerModeCoreLDORegulatorDriveStrength	(	Register &	base,
		CoreLdoDriveStrength	driveStrength )

static

Set Core LDO VDD Regulator Drive Strength in Low power mode.

參數

base	SPC peripheral base address.
driveStrength	Specify drive strength of CORE LDO in low power mode.

傳回值: #kStatus_SPC_CORELDOLowDriveStrengthIgnore Some voltage detect enabled, CORE LDO's drive strength can not set as low.; #kStatus_Success Set Core LDO regulator drive strength in Low power mode successful.; #kStatus_SPC_BandgapModeWrong Bandgap is disabled when attempt to set CORE LDO work as normal drive strength.

◆ setLowPowerModeCoreLDORegulatorVoltageLevel()

static chip::spc::Status chip::spc::SPC::setLowPowerModeCoreLDORegulatorVoltageLevel	(	Register &	base,
		CoreLdoVoltageLevel	voltageLevel )

static

Set Core LDO VDD Regulator Voltage level in Low power mode.

註: If CORE LDO's drive strength is set to Normal, the CORE LDO VDD regulator voltage in active mode and low power mode must be same.; Voltage level for the CORE LDO in low power mode can only be changed when the CORE LDO Drive Strength set as Normal.

參數

base	SPC peripheral base address.
voltageLevel	Voltage level of CORE LDO Regulator in Low power mode, please refer to CoreLdoVoltageLevel.

傳回值: #kStatus_SPC_CORELDOVoltageWrong Voltage level in active mode and low power mode is not same.; #kStatus_Success Set Core LDO regulator voltage level in Low power mode successful.; #kStatus_SPC_CORELDOVoltageSetFail Fail to update voltage level because drive strength is incorrect.

◆ setLowPowerModeRegulatorsConfig()

static chip::spc::Status chip::spc::SPC::setLowPowerModeRegulatorsConfig	(	Register &	base,
		const LowPowerModeRegulatorsConfig *	config )

static

Configs all settings of regulators in Low power mode at a time.

註

This function is used to overwrite all settings of regulators(including bandgap mode, regulators' drive strength and voltage level) in low power mode at a time.

Enable/disable LVDs/HVDs before invoking this function.

This function will check input parameters based on hardware restrictions before setting registers, if input parameters do not satisfy hardware restrictions the specific error will be reported.

Some hardware restrictions not covered, application should be aware of this and follow this hardware restrictions otherwise some unkown issue may occur:

If Core LDO's drive strength are set to same value in both Active mode and low power mode, the voltage level should also set to same value.
When switching Core LDO's drive strength from low to normal, ensure the LDO_CORE high voltage level is set to same level that was set prior to switching to the LDO_CORE drive strength. Otherwise, if the LVDs are enabled, an unexpected LVD can occur.

If this function can not satisfy some tricky settings, please invoke other APIs in low-level function group.

參數

base	SPC peripheral base address.
config	Pointer to LowPowerModeRegulatorsConfig structure.

傳回值: #kStatus_Success Config regulators in Low power mode successful.; #kStatus_SPC_BandgapModeWrong The bandgap should not be disabled based on input settings.; #kStatus_SPC_CORELDOLowDriveStrengthIgnore Set driver strength to low will be ignored.; #kStatus_SPC_SYSLDOLowDriveStrengthIgnore Set driver strength to low will be ignored.; #kStatus_SPC_CORELDOVoltageWrong Core LDO and System LDO do not have same voltage level.

◆ setLowPowerRequestConfig()

static void chip::spc::SPC::setLowPowerRequestConfig	(	Register &	base,
		const LowPowerRequestConfig &	config )

static

Configs Low power request output pin.

This function config the low power request output pin

參數

base	SPC peripheral base address.
config	Pointer the spc_lowpower_request_config_t structure.

◆ setLowPowerWakeUpDelay()

static void chip::spc::SPC::setLowPowerWakeUpDelay	(	Register &	base,
		uint16	delay )

inlinestatic

Sets the delay when exit the low power modes.

參數

base	SPC peripheral base address.
delay	The number of SPC timer clock cycles that the SPC waits on exit from low power modes.

◆ setSRAMOperateVoltage()

static void chip::spc::SPC::setSRAMOperateVoltage	(	Register &	base,
		const SramVoltageConfig &	config )

static

Set SRAM operate voltage.

參數

base	SPC peripheral base address.
config	The pointer to SramVoltageConfig, specifies the configuration of sram voltage.

◆ setSystemVDDLowVoltageLevel()

static void chip::spc::SPC::setSystemVDDLowVoltageLevel	(	Register &	base,
		LowVoltageLevelSelect	level )

static

Set system VDD Low-voltage level selection.

This function selects the system VDD low-voltage level. Changing system VDD low-voltage level must be done after disabling the System VDD low voltage reset and interrupt.

過時: In latest RM, reserved for all devices, will removed in next release.

參數

base	SPC peripheral base address.
level	System VDD Low-Voltage level selection.

◆ setSystemVoltageDetectConfig()

static void chip::spc::SPC::setSystemVoltageDetectConfig	(	Register &	base,
		const SystemVoltageDetectConfig &	config )

static

Configs SYS voltage detect options.

This function config SYS voltage detect options.

註: : Setting both the voltage detect interrupt and reset enable will cause interrupt to be generated on exit from reset. If those conditioned is not desired, interrupt/reset so only one is enabled.

參數

base	SPC peripheral base address.
config	Pointer to SystemVoltageDetectConfig structure.

◆ SRAMCTL_ACK()

static constexpr uint32 chip::spc::SPC::SRAMCTL_ACK ( uint32 value )

inlinestaticconstexpr

SRAMCTL - ACK.

SRAM Control - SRAM Voltage Update Request Acknowledge

[0b0]Not acknowledged
[0b1]Acknowledged

◆ SRAMCTL_REQ()

static constexpr uint32 chip::spc::SPC::SRAMCTL_REQ ( uint32 value )

inlinestaticconstexpr

SRAMCTL - REQ.

SRAM Control - SRAM Voltage Update Request

[0b0]Do not request
[0b1]Request

◆ SRAMCTL_VSM()

static constexpr uint32 chip::spc::SPC::SRAMCTL_VSM ( uint32 value )

inlinestaticconstexpr

SRAMCTL - VSM.

SRAM Control - Voltage Select Margin

[0b00]
[0b01]1.0 V
[0b10]1.1 V
[0b11]SRAM configured for 1.2 V operation

◆ SRAMRETLDO_CNTRL_SRAM_RET_EN()

static constexpr uint32 chip::spc::SPC::SRAMRETLDO_CNTRL_SRAM_RET_EN ( uint32 value )

inlinestaticconstexpr

SRAMRETLDO_CNTRL - SRAM_RET_EN.

SRAM Retention LDO Control - SRAM Retention

◆ SRAMRETLDO_CNTRL_SRAMLDO_ON()

static constexpr uint32 chip::spc::SPC::SRAMRETLDO_CNTRL_SRAMLDO_ON ( uint32 value )

inlinestaticconstexpr

SRAMRETLDO_CNTRL - SRAMLDO_ON.

SRAM Retention LDO Control - SRAM LDO Regulator Enable

[0b0]Disable
[0b1]Enable

◆ SRAMRETLDO_REFTRIM_REFTRIM()

static constexpr uint32 chip::spc::SPC::SRAMRETLDO_REFTRIM_REFTRIM ( uint32 value )

inlinestaticconstexpr

SRAMRETLDO_REFTRIM - REFTRIM.

SRAM Retention Reference Trim - Reference Trim. Voltage range is around 0.48V - 0.85V. Trim step is 12 mV.

◆ trimSRAMLdoRefVoltage()

static void chip::spc::SPC::trimSRAMLdoRefVoltage	(	Register &	base,
		uint8	trimValue )

inlinestatic

Trims SRAM retention regulator reference voltage, trim step is 12 mV, range is around 0.48V to 0.85V.

參數

base	SPC peripheral base address.
trimValue	Reference voltage trim value.

◆ unlockCoreVoltageDetectResetSetting()

static void chip::spc::SPC::unlockCoreVoltageDetectResetSetting ( Register & base )

inlinestatic

Unlocks Core voltage detect reset setting.

This function unlocks core voltage detect reset setting. If locks the Core voltage detect reset setting, invoking this function to unlock.

參數

base	SPC peripheral base address.

◆ unlockSystemVoltageDetectResetSetting()

static void chip::spc::SPC::unlockSystemVoltageDetectResetSetting ( Register & base )

inlinestatic

Unlock System voltage detect reset setting.

This function unlocks system voltage detect reset setting. If locks the System voltage detect reset setting, invoking this function to unlock.

參數

base	SPC peripheral base address.

◆ VD_CORE_CFG_LOCK()

static constexpr uint32 chip::spc::SPC::VD_CORE_CFG_LOCK ( uint32 value )

inlinestaticconstexpr

VD_CORE_CFG - LOCK.

Core Voltage Detect Configuration - Core Voltage Detect Reset Enable Lock

[0b0]Allow
[0b1]Deny

◆ VD_CORE_CFG_LVDIE()

static constexpr uint32 chip::spc::SPC::VD_CORE_CFG_LVDIE ( uint32 value )

inlinestaticconstexpr

VD_CORE_CFG - LVDIE.

Core Voltage Detect Configuration - Core LVD Interrupt Enable

[0b0]Disable
[0b1]Enable

◆ VD_CORE_CFG_LVDRE()

static constexpr uint32 chip::spc::SPC::VD_CORE_CFG_LVDRE ( uint32 value )

inlinestaticconstexpr

VD_CORE_CFG - LVDRE.

Core Voltage Detect Configuration - Core LVD Reset Enable

[0b0]Disable
[0b1]Enable

◆ VD_STAT_COREVDD_LVDF()

static constexpr uint32 chip::spc::SPC::VD_STAT_COREVDD_LVDF ( uint32 value )

inlinestaticconstexpr

VD_STAT - COREVDD_LVDF.

Voltage Detect Status - Core Low-Voltage Detect Flag

[0b0]Event not detected
[0b1]Event detected
[0b0]No effect
[0b1]Clear the flag

◆ VD_STAT_SYSVDD_HVDF()

static constexpr uint32 chip::spc::SPC::VD_STAT_SYSVDD_HVDF ( uint32 value )

inlinestaticconstexpr

VD_STAT - SYSVDD_HVDF.

Voltage Detect Status - System HVD Flag

[0b0]Event not detected
[0b1]Event detected
[0b0]No effect
[0b1]Clear the flag

◆ VD_STAT_SYSVDD_LVDF()

static constexpr uint32 chip::spc::SPC::VD_STAT_SYSVDD_LVDF ( uint32 value )

inlinestaticconstexpr

VD_STAT - SYSVDD_LVDF.

Voltage Detect Status - System Low-Voltage Detect Flag

[0b0]Event not detected
[0b1]Event detected
[0b0]No effect
[0b1]Clear the flag

◆ VD_SYS_CFG_HVDIE()

static constexpr uint32 chip::spc::SPC::VD_SYS_CFG_HVDIE ( uint32 value )

inlinestaticconstexpr

VD_SYS_CFG - HVDIE.

System Voltage Detect Configuration - System HVD Interrupt Enable

[0b0]Disable
[0b1]Enable

◆ VD_SYS_CFG_HVDRE()

static constexpr uint32 chip::spc::SPC::VD_SYS_CFG_HVDRE ( uint32 value )

inlinestaticconstexpr

VD_SYS_CFG - HVDRE.

System Voltage Detect Configuration - System HVD Reset Enable

[0b0]Disable
[0b1]Enable

◆ VD_SYS_CFG_LOCK()

static constexpr uint32 chip::spc::SPC::VD_SYS_CFG_LOCK ( uint32 value )

inlinestaticconstexpr

VD_SYS_CFG - LOCK.

System Voltage Detect Configuration - System Voltage Detect Reset Enable Lock

[0b0]Allow
[0b1]Deny

◆ VD_SYS_CFG_LVDIE()

static constexpr uint32 chip::spc::SPC::VD_SYS_CFG_LVDIE ( uint32 value )

inlinestaticconstexpr

VD_SYS_CFG - LVDIE.

System Voltage Detect Configuration - System LVD Interrupt Enable

[0b0]Disable
[0b1]Enable

◆ VD_SYS_CFG_LVDRE()

static constexpr uint32 chip::spc::SPC::VD_SYS_CFG_LVDRE ( uint32 value )

inlinestaticconstexpr

VD_SYS_CFG - LVDRE.

System Voltage Detect Configuration - System LVD Reset Enable

[0b0]Disable
[0b1]Enable

◆ VD_SYS_CFG_LVSEL()

static constexpr uint32 chip::spc::SPC::VD_SYS_CFG_LVSEL ( uint32 value )

inlinestaticconstexpr

VD_SYS_CFG - LVSEL.

System Voltage Detect Configuration - System Low-Voltage Level Select

[0b0]Normal
[0b1]Safe

◆ VERID_FEATURE()

static constexpr uint32 chip::spc::SPC::VERID_FEATURE ( uint32 value )

inlinestaticconstexpr

VERID - FEATURE.

Version ID - Feature Specification Number

[0b0000000000000000..Standard features *..

◆ VERID_MAJOR()

static constexpr uint32 chip::spc::SPC::VERID_MAJOR ( uint32 value )

inlinestaticconstexpr

VERID - MAJOR.

Version ID - Major Version Number

◆ VERID_MINOR()

static constexpr uint32 chip::spc::SPC::VERID_MINOR ( uint32 value )

inlinestaticconstexpr

VERID - MINOR.

Version ID - Minor Version Number

此類別(class) 文件是由下列檔案中產生:

SPC.h

公開方法(Public Methods)

靜態公開方法(Static Public Methods)

函式成員說明文件

◆ ACTIVE_CFG1_SOC_CNTRL()

◆ ACTIVE_CFG_BGMODE()

◆ ACTIVE_CFG_CORE_LVDE()

◆ ACTIVE_CFG_CORELDO_VDD_DS()

◆ ACTIVE_CFG_CORELDO_VDD_LVL()

◆ ACTIVE_CFG_SYS_HVDE()

◆ ACTIVE_CFG_SYS_LVDE()

◆ ACTIVE_CFG_VDD_VD_DISABLE()

◆ ACTIVE_VDELAY_ACTIVE_VDELAY()

◆ CFG_INTG_PWSWTCH_SLEEP_ACTIVE_EN()

◆ CFG_INTG_PWSWTCH_SLEEP_EN()

◆ CFG_INTG_PWSWTCH_WKUP_ACTIVE_EN()

◆ CFG_INTG_PWSWTCH_WKUP_EN()

◆ checkLowPowerReqest()

◆ checkPowerDomainLowPowerRequest()

◆ checkSwitchState()

◆ clearLowPowerRequest()

◆ clearPeriphIOIsolationFlag()

◆ clearPowerDomainLowPowerRequestFlag()

◆ clearVoltageDetectStatusFlag()

◆ disableActiveModeAnalogModules()

◆ disableLowPowerModeAnalogModules()

◆ enableActiveModeAnalogModules()

◆ enableActiveModeCoreLowVoltageDetect()

◆ enableActiveModeSystemHighVoltageDetect()

◆ enableActiveModeSystemLowVoltageDetect()

◆ enableIntegratedPowerSwitchAutomatically()

◆ enableIntegratedPowerSwitchManually()

◆ enableLowPowerModeAnalogModules()

◆ enableLowPowerModeCoreLowVoltageDetect()

◆ enableLowPowerModeLowPowerIREF()

◆ enableLowPowerModeSystemHighVoltageDetect()

◆ enableLowPowerModeSystemLowVoltageDetect()

◆ enableSRAMLdo()

◆ enableSRAMLdOLowPowerModeIREF()

◆ EVD_CFG_EVDISO()

◆ EVD_CFG_EVDLPISO()

◆ EVD_CFG_EVDSTAT()

◆ getActiveModeBandgapMode()

◆ getActiveModeCoreLDODriveStrength()

◆ getActiveModeCoreLDOVDDVoltageLevel()

◆ getActiveModeEnabledAnalogModules()

◆ getActiveModeVoltageDetectStatus()

◆ getBusyStatusFlag()

◆ getExternalDomainsStatus()

◆ getLowPowerCoreLDOVDDDriveStrength()

◆ getLowPowerCoreLDOVDDVoltageLevel()

◆ getLowPowerModeBandgapMode()

◆ getLowPowerModeEnabledAnalogModules()

◆ getLowPowerModeVoltageDetectStatus()

◆ getPeriphIOIsolationStatus()

◆ getPowerDomainLowPowerMode()

◆ getVoltageDetectStatusFlag()

◆ lockCoreVoltageDetectResetSetting()

◆ lockSystemVoltageDetectResetSetting()

◆ LP_CFG1_SOC_CNTRL()

◆ LP_CFG_BGMODE()

◆ LP_CFG_CORE_LVDE()

◆ LP_CFG_CORELDO_VDD_DS()

◆ LP_CFG_CORELDO_VDD_LVL()

◆ LP_CFG_LP_IREFEN()

◆ LP_CFG_SRAMLDO_DPD_ON()

◆ LP_CFG_SYS_HVDE()

◆ LP_CFG_SYS_LVDE()

◆ LPREQ_CFG_LPREQOE()

◆ LPREQ_CFG_LPREQOV()

◆ LPREQ_CFG_LPREQPOL()

◆ LPWKUP_DELAY_LPWKUP_DELAY()

◆ PD_STATUS_LP_MODE()

◆ PD_STATUS_PD_LP_REQ()

◆ PD_STATUS_PWR_REQ_STATUS()

◆ retainSRAMArray()

◆ SC_BUSY()

◆ SC_ISO_CLR()

◆ SC_SPC_LP_MODE()

◆ SC_SPC_LP_REQ()

◆ SC_SWITCH_STATE()