chip::spc::Register 結構 參考文件

公開屬性
__I uint32	verid
uint8	reserved_0 [12]
__IO uint32	sc
uint8	reserved_1 [8]
__IO uint32	lpreq_cfg
__IO uint32	cfg
uint8	reserved_2 [12]
__IO uint32	pd_status [1]
uint8	reserved_3 [12]
__IO uint32	sramctl
uint8	reserved_4 [16]
__IO uint32	sramretldo_reftrim
__IO uint32	sramretldo_cntrl
uint8	reserved_5 [164]
__IO uint32	active_cfg
__IO uint32	active_cfg1
__IO uint32	lp_cfg
__IO uint32	lp_cfg1
uint8	reserved_6 [16]
__IO uint32	lpwkup_delay
__IO uint32	active_vdelay
uint8	reserved_7 [8]
__IO uint32	vd_stat
__IO uint32	vd_core_cfg
__IO uint32	vd_sys_cfg
uint8	reserved_8 [4]
__IO uint32	evd_cfg
uint8	reserved_9 [444]
uint32	coreldo_cfg

資料成員說明文件

active_cfg

__IO uint32 chip::spc::Register::active_cfg

Active Power Mode Configuration, offset: 0x100

active_cfg1

__IO uint32 chip::spc::Register::active_cfg1

Active Power Mode Configuration 1, offset: 0x104

active_vdelay

__IO uint32 chip::spc::Register::active_vdelay

Active Voltage Trim Delay, offset: 0x124

cfg

__IO uint32 chip::spc::Register::cfg

SPC Configuration, offset: 0x20

coreldo_cfg

uint32 chip::spc::Register::coreldo_cfg

LDO_CORE Configuration, offset: 0x300

evd_cfg

__IO uint32 chip::spc::Register::evd_cfg

External Voltage Domain Configuration, offset: 0x140

lp_cfg

__IO uint32 chip::spc::Register::lp_cfg

Low-Power Mode Configuration, offset: 0x108

lp_cfg1

__IO uint32 chip::spc::Register::lp_cfg1

Low Power Mode Configuration 1, offset: 0x10C

lpreq_cfg

__IO uint32 chip::spc::Register::lpreq_cfg

Low-Power Request Configuration, offset: 0x1C

lpwkup_delay

__IO uint32 chip::spc::Register::lpwkup_delay

Low Power Wake-Up Delay, offset: 0x120

pd_status

__IO uint32 chip::spc::Register::pd_status[1]

SPC Power Domain Mode Status, array offset: 0x30, array step: 0x4

reserved_0

uint8 chip::spc::Register::reserved_0[12]

Reserved 0, offset: 0x4

reserved_1

uint8 chip::spc::Register::reserved_1[8]

Reserved 1, offset: 0x14

reserved_2

uint8 chip::spc::Register::reserved_2[12]

Reserved

reserved_3

uint8 chip::spc::Register::reserved_3[12]

Reserved

reserved_4

uint8 chip::spc::Register::reserved_4[16]

Reserved

reserved_5

uint8 chip::spc::Register::reserved_5[164]

Reserved

reserved_6

uint8 chip::spc::Register::reserved_6[16]

Reserved

reserved_7

uint8 chip::spc::Register::reserved_7[8]

Reserved

reserved_8

uint8 chip::spc::Register::reserved_8[4]

Reserved

reserved_9

uint8 chip::spc::Register::reserved_9[444]

Reserved

sc

__IO uint32 chip::spc::Register::sc

Status Control, offset: 0x10

sramctl

__IO uint32 chip::spc::Register::sramctl

SRAM Control, offset: 0x40

sramretldo_cntrl

__IO uint32 chip::spc::Register::sramretldo_cntrl

SRAM Retention LDO Control, offset: 0x58

sramretldo_reftrim

__IO uint32 chip::spc::Register::sramretldo_reftrim

SRAM Retention Reference Trim, offset: 0x54

vd_core_cfg

__IO uint32 chip::spc::Register::vd_core_cfg

Core Voltage Detect Configuration, offset: 0x134

vd_stat

__IO uint32 chip::spc::Register::vd_stat

Voltage Detect Status, offset: 0x130

vd_sys_cfg

__IO uint32 chip::spc::Register::vd_sys_cfg

System Voltage Detect Configuration, offset: 0x138

verid

__I uint32 chip::spc::Register::verid

Version ID, offset: 0x0

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此結構(structure) 文件是由下列檔案中產生:

• spc/Register.h