Port.h

 
#ifndef MCXA153_E90553C9_D130_4FFC_BA1B_364E7D24DAD1
#define MCXA153_E90553C9_D130_4FFC_BA1B_364E7D24DAD1
 
/* ***************************************************************************************
 * Include
 */
#include "mframe.h"
 
//----------------------------------------------------------------------------------------
#include "./../port/Config.h"
#include "./../port/DriveStrength.h"
#include "./../port/DriveStrengthDouble.h"
#include "./../port/InputBuffer.h"
#include "./../port/Inverted.h"
#include "./../port/Lock.h"
#include "./../port/Mask.h"
#include "./../port/Mux.h"
#include "./../port/OpenDrain.h"
#include "./../port/PassiveFilter.h"
#include "./../port/Pull.h"
#include "./../port/PullResistor.h"
#include "./../port/Rate.h"
#include "./../port/Register.h"
#include "./../port/Shift.h"
#include "./../port/Version.h"
#include "./../port/VoltageRange.h"
 
//----------------------------------------------------------------------------------------
 
/* ***************************************************************************************
 * Namespace
 */
namespace mcxa153::chip::port {
  class Port;
  extern Register       &PORT0;
  extern Register       &PORT1;
  extern Register       &PORT2;
  extern Register       &PORT3;
  extern Register *const PORT[4];
}  // namespace mcxa153::chip::port
 
/* ***************************************************************************************
 * Class/Interface/Struct/Enum
 */
 
class mcxa153::chip::port::Port : public ufm::lang::NonInstantiable {
  /* *************************************************************************************
   * Variable
   */
 
  /* *************************************************************************************
   * Abstract Method
   */
 
  /* *************************************************************************************
   * Construct Method
   */
 protected:
  virtual ~Port(void) override = default;
 
  /* *************************************************************************************
   * Operator Method
   */
 
  /* *************************************************************************************
   * Override Method
   */
 
  /* *************************************************************************************
   * Public Method
   */
 
  /* *************************************************************************************
   * Protected Method
   */
 
  /* *************************************************************************************
   * Private Method
   */
 
  /* *************************************************************************************
   * Static Variable
   */
 
  /* *************************************************************************************
   * Static Method
   */
 public:
  static inline Version setVersionInfo(Register &base) {
    Version result = Version();
    uint32  verid  = base.verid;
    result.feature = static_cast<uint16>(verid);
    result.minor   = static_cast<uint8>(verid >> +Shift::VERID_MINOR);
    result.major   = static_cast<uint8>(verid >> +Shift::VERID_MAJOR);
    return result;
  }
 
  static inline void secletPortVoltageRange(Register &base, VoltageRange range) {
    base.config = +range;
    return;
  }
 
  static inline void setPinConfig(Register &base, uint32 pin, const Config &config) {
    uint32 addr = reinterpret_cast<uint32>(&base.pcr[pin]);
 
    *reinterpret_cast<volatile uint16 *>(addr) = +config;
    return;
  }
 
  static inline void setMultiplePinsConfig(Register     &base,
                                           uint32        mask,
                                           const Config &config) {
    uint16 pcrl = +config;
 
    if (0U != (mask & 0xffffU)) base.gpclr = ((mask & 0xffffU) << 16) | pcrl;
 
    if (0U != (mask >> 16)) base.gpchr = (mask & 0xffff0000U) | pcrl;
 
    return;
  }
 
  static inline void setPinMux(Register &base, uint32 pin, Mux mux) {
    base.pcr[pin] = (base.pcr[pin] & ~+Mask::PCR_MUX) | Port::PCR_MUX(+mux);
    return;
  }
 
  static inline void setPinDriveStrength(Register &base, uint32 pin, uint8 strength) {
    base.pcr[pin] = (base.pcr[pin] & ~+Mask::PCR_DSE) | Port::PCR_DSE(+strength);
    return;
  }
 
  static inline void enablePinDoubleDriveStrength(Register &base,
                                                  uint32    pin,
                                                  bool      enable) {
    base.pcr[pin] = (base.pcr[pin] & ~+Mask::PCR_DSE1) | Port::PCR_DSE1(enable);
    return;
  }
 
  static inline void setPinPullValue(Register &base, uint32 pin, uint8 value) {
    base.pcr[pin] = (base.pcr[pin] & ~+Mask::PCR_PV) | Port::PCR_PV(value);
    return;
  }
 
  static inline constexpr uint32 VERID_FEATURE(uint32 value) {
    return ((value << +Shift::VERID_FEATURE) & +Mask::VERID_FEATURE);
  }
 
  static inline constexpr uint32 VERID_MINOR(uint32 value) {
    return ((value << +Shift::VERID_MINOR) & +Mask::VERID_MINOR);
  }
 
  static inline constexpr uint32 VERID_MAJOR(uint32 value) {
    return ((value << +Shift::VERID_MAJOR) & +Mask::VERID_MAJOR);
  }
 
  static inline constexpr uint32 GPCLR_GPWD(uint32 value) {
    return ((value << +Shift::GPCLR_GPWD) & +Mask::GPCLR_GPWD);
  }
 
  static inline constexpr uint32 GPCLR_GPWE0(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE0) & +Mask::GPCLR_GPWE0);
  }
 
  static inline constexpr uint32 GPCLR_GPWE1(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE1) & +Mask::GPCLR_GPWE1);
  }
 
  static inline constexpr uint32 GPCLR_GPWE2(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE2) & +Mask::GPCLR_GPWE2);
  }
 
  static inline constexpr uint32 GPCLR_GPWE3(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE3) & +Mask::GPCLR_GPWE3);
  }
 
  static inline constexpr uint32 GPCLR_GPWE4(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE4) & +Mask::GPCLR_GPWE4);
  }
 
  static inline constexpr uint32 GPCLR_GPWE5(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE5) & +Mask::GPCLR_GPWE5);
  }
 
  static inline constexpr uint32 GPCLR_GPWE6(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE6) & +Mask::GPCLR_GPWE6);
  }
 
  static inline constexpr uint32 GPCLR_GPWE7(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE7) & +Mask::GPCLR_GPWE7);
  }
 
  static inline constexpr uint32 GPCLR_GPWE8(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE8) & +Mask::GPCLR_GPWE8);
  }
 
  static inline constexpr uint32 GPCLR_GPWE9(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE9) & +Mask::GPCLR_GPWE9);
  }
 
  static inline constexpr uint32 GPCLR_GPWE10(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE10) & +Mask::GPCLR_GPWE10);
  }
 
  static inline constexpr uint32 GPCLR_GPWE11(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE11) & +Mask::GPCLR_GPWE11);
  }
 
  static inline constexpr uint32 GPCLR_GPWE12(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE12) & +Mask::GPCLR_GPWE12);
  }
 
  static inline constexpr uint32 GPCLR_GPWE13(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE13) & +Mask::GPCLR_GPWE13);
  }
 
  static inline constexpr uint32 GPCLR_GPWE14(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE14) & +Mask::GPCLR_GPWE14);
  }
 
  static inline constexpr uint32 GPCLR_GPWE15(uint32 value) {
    return ((value << +Shift::GPCLR_GPWE15) & +Mask::GPCLR_GPWE15);
  }
 
  static inline constexpr uint32 GPCHR_GPWD(uint32 value) {
    return ((value << +Shift::GPCHR_GPWD) & +Mask::GPCHR_GPWD);
  }
 
  static inline constexpr uint32 GPCHR_GPWE16(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE16) & +Mask::GPCHR_GPWE16);
  }
 
  static inline constexpr uint32 GPCHR_GPWE17(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE17) & +Mask::GPCHR_GPWE17);
  }
 
  static inline constexpr uint32 GPCHR_GPWE18(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE18) & +Mask::GPCHR_GPWE18);
  }
 
  static inline constexpr uint32 GPCHR_GPWE19(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE19) & +Mask::GPCHR_GPWE19);
  }
 
  static inline constexpr uint32 GPCHR_GPWE20(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE20) & +Mask::GPCHR_GPWE20);
  }
 
  static inline constexpr uint32 GPCHR_GPWE21(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE21) & +Mask::GPCHR_GPWE21);
  }
 
  static inline constexpr uint32 GPCHR_GPWE22(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE22) & +Mask::GPCHR_GPWE22);
  }
 
  static inline constexpr uint32 GPCHR_GPWE23(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE23) & +Mask::GPCHR_GPWE23);
  }
 
  static inline constexpr uint32 GPCHR_GPWE24(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE24) & +Mask::GPCHR_GPWE24);
  }
 
  static inline constexpr uint32 GPCHR_GPWE25(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE25) & +Mask::GPCHR_GPWE25);
  }
 
  static inline constexpr uint32 GPCHR_GPWE26(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE26) & +Mask::GPCHR_GPWE26);
  }
 
  static inline constexpr uint32 GPCHR_GPWE27(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE27) & +Mask::GPCHR_GPWE27);
  }
 
  static inline constexpr uint32 GPCHR_GPWE28(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE28) & +Mask::GPCHR_GPWE28);
  }
 
  static inline constexpr uint32 GPCHR_GPWE29(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE29) & +Mask::GPCHR_GPWE29);
  }
 
  static inline constexpr uint32 GPCHR_GPWE30(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE30) & +Mask::GPCHR_GPWE30);
  }
 
  static inline constexpr uint32 GPCHR_GPWE31(uint32 value) {
    return ((value << +Shift::GPCHR_GPWE31) & +Mask::GPCHR_GPWE31);
  }
 
  static inline constexpr uint32 CONFIG_RANGE(uint32 value) {
    return ((value << +Shift::CONFIG_RANGE) & +Mask::CONFIG_RANGE);
  }
 
  static inline constexpr uint32 CALIB0_NCAL(uint32 value) {
    return ((value << +Shift::CALIB0_NCAL) & +Mask::CALIB0_NCAL);
  }
 
  static inline constexpr uint32 CALIB0_PCAL(uint32 value) {
    return ((value << +Shift::CALIB0_PCAL) & +Mask::CALIB0_PCAL);
  }
 
  static inline constexpr uint32 CALIB1_NCAL(uint32 value) {
    return ((value << +Shift::CALIB1_NCAL) & +Mask::CALIB1_NCAL);
  }
 
  static inline constexpr uint32 CALIB1_PCAL(uint32 value) {
    return ((value << +Shift::CALIB1_PCAL) & +Mask::CALIB1_PCAL);
  }
 
  static inline constexpr uint32 PCR_PS(uint32 value) {
    return ((value << +Shift::PCR_PS) & +Mask::PCR_PS);
  }
 
  static inline constexpr uint32 PCR_PE(uint32 value) {
    return ((value << +Shift::PCR_PE) & +Mask::PCR_PE);
  }
 
  static inline constexpr uint32 PCR_PV(uint32 value) {
    return ((value << +Shift::PCR_PV) & +Mask::PCR_PV);
  }
 
  static inline constexpr uint32 PCR_SRE(uint32 value) {
    return ((value << +Shift::PCR_SRE) & +Mask::PCR_SRE);
  }
 
  static inline constexpr uint32 PCR_PFE(uint32 value) {
    return ((value << +Shift::PCR_PFE) & +Mask::PCR_PFE);
  }
 
  static inline constexpr uint32 PCR_ODE(uint32 value) {
    return ((value << +Shift::PCR_ODE) & +Mask::PCR_ODE);
  }
 
  static inline constexpr uint32 PCR_DSE(uint32 value) {
    return ((value << +Shift::PCR_DSE) & +Mask::PCR_DSE);
  }
 
  static inline constexpr uint32 PCR_DSE1(uint32 value) {
    return ((value << +Shift::PCR_DSE1) & +Mask::PCR_DSE1);
  }
 
  static inline constexpr uint32 PCR_MUX(uint32 value) {
    return ((value << +Shift::PCR_MUX) & +Mask::PCR_MUX);
  } /* Merged from fields with different position or width, of widths (2, 3, 4), largest
       definition used */
  static inline constexpr uint32 PCR_IBE(uint32 value) {
    return ((value << +Shift::PCR_IBE) & +Mask::PCR_IBE);
  }
 
  static inline constexpr uint32 PCR_INV(uint32 value) {
    return ((value << +Shift::PCR_INV) & +Mask::PCR_INV);
  }
 
  static inline constexpr uint32 PCR_LK(uint32 value) {
    return ((value << +Shift::PCR_LK) & +Mask::PCR_LK);
  }
};
 
/* ***************************************************************************************
 * End of file
 */
 
#endif /* MCXA153_E90553C9_D130_4FFC_BA1B_364E7D24DAD1 */