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公開方法(Public Methods) | 靜態公開方法(Static Public Methods) | 全部成員列表
chip::trdc::TRDC 類別 參考文件final
類別chip::trdc::TRDC的繼承圖:
mframe::lang::Object mframe::lang::Interface

公開方法(Public Methods)

virtual ~TRDC (void) override
 Destroy the object.
 
- 公開方法(Public Methods) 繼承自 mframe::lang::Object
 Object (void)
 Construct a new Object object.
 
virtual ~Object (void) override
 Destroy the Object object.
 
void * operator new (size_t n)
 
void * operator new (size_t n, void *p)
 
mframe::lang::Object & getObject (void) override
 取得類Object
 
void delay (int milliseconds) const
 函數 delay 等待內核滴答中指定的時間段。 對於1的值，系統等待直到下一個計時器滴答發生。 實際時間延遲最多可能比指定時間少一個計時器滴答聲，即在下一個系統滴答聲發生之前立即調用 osDelay(1)，線程會立即重新安排。
 
bool equals (Object *object) const
 函數 delay 等待內核滴答中指定的時間段。 對於1的值，系統等待直到下一個計時器滴答發生。 實際時間延遲最多可能比指定時間少一個計時器滴答聲，即在下一個系統滴答聲發生之前立即調用 osDelay(1)，線程會立即重新安排。
 
bool equals (Object &object) const
 函數 delay 等待內核滴答中指定的時間段。 對於1的值，系統等待直到下一個計時器滴答發生。 實際時間延遲最多可能比指定時間少一個計時器滴答聲，即在下一個系統滴答聲發生之前立即調用 osDelay(1)，線程會立即重新安排。
 
void wait (void) const
 導致當前線程等待，直到另一個線程調用此對象的notify()方法或notifyAll()方法，或指定的時間 已過。
 
bool wait (int timeout) const
 導致當前線程等待，直到另一個線程調用此對象的 notify()方法或 notifyAll()方法，或其他一些線 程中斷當前線程，或一定量的實時時間。
 
bool yield (void) const
 函數yield()將控制權傳遞給處於READY狀態且具有相同優先級的下一個線程。 如果在READY狀態下沒有其他優先級相同的線程，則當前線程繼續執行，不會發生線程切換。
 
int lock (void) const
 核心鎖定，在調用unlock以前將不會進行執行緒切換
 
int unlock (void) const
 核心解鎖。
 
mframe::sys::Thread * currentThread (void) const
 取得當前的執行緒
 
virtual int hashcode (void) const
 返回對象的哈希碼值。支持這種方法是為了散列表，如HashMap提供的那樣。
 
- 公開方法(Public Methods) 繼承自 mframe::lang::Interface
virtual ~Interface (void)=default
 Destroy the struct object.
 

靜態公開方法(Static Public Methods)

static constexpr uint32 MEM_GLBCFG_NBLKS (uint32 value)
 MBC_INDEX_MBC_MEM_GLBCFG - NBLKS.
 
static constexpr uint32 MEM_GLBCFG_SIZE_LOG2 (uint32 value)
 MBC_INDEX_MBC_MEM_GLBCFG - SIZE_LOG2.
 
static constexpr uint32 MEM_GLBCFG_CLRE (uint32 value)
 MBC_INDEX_MBC_MEM_GLBCFG - CLRE.
 
static constexpr uint32 MEMN_GLBAC_NUX (uint32 value)
 MBC_INDEX_MBC_MEMN_GLBAC - NUX.
 
static constexpr uint32 MEMN_GLBAC_NUW (uint32 value)
 MBC_INDEX_MBC_MEMN_GLBAC - NUW.
 
static constexpr uint32 MEMN_GLBAC_NUR (uint32 value)
 MBC_INDEX_MBC_MEMN_GLBAC - NUR.
 
static constexpr uint32 MEMN_GLBAC_NPX (uint32 value)
 MBC_INDEX_MBC_MEMN_GLBAC - NPX.
 
static constexpr uint32 MEMN_GLBAC_NPW (uint32 value)
 MBC_INDEX_MBC_MEMN_GLBAC - NPW.
 
static constexpr uint32 MEMN_GLBAC_NPR (uint32 value)
 MBC_INDEX_MBC_MEMN_GLBAC - NPR.
 
static constexpr uint32 MEMN_GLBAC_SUX (uint32 value)
 MBC_INDEX_MBC_MEMN_GLBAC - SUX.
 
static constexpr uint32 MEMN_GLBAC_SUW (uint32 value)
 MBC_INDEX_MBC_MEMN_GLBAC - SUW.
 
static constexpr uint32 MEMN_GLBAC_SUR (uint32 value)
 MBC_INDEX_MBC_MEMN_GLBAC - SUR.
 
static constexpr uint32 MEMN_GLBAC_SPX (uint32 value)
 MBC_INDEX_MBC_MEMN_GLBAC - SPX.
 
static constexpr uint32 MEMN_GLBAC_SPW (uint32 value)
 MBC_INDEX_MBC_MEMN_GLBAC - SPW.
 
static constexpr uint32 MEMN_GLBAC_SPR (uint32 value)
 MBC_INDEX_MBC_MEMN_GLBAC - SPR.
 
static constexpr uint32 MEMN_GLBAC_LK (uint32 value)
 MBC_INDEX_MBC_MEMN_GLBAC - LK.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL0 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL0.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE0 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE0.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL1 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL1.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE1 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE1.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL2 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL2.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE2 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE2.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL3 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL3.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE3 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE3.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL4 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL4.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE4 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE4.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL5 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL5.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE5 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE5.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL6 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL6.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE6 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE6.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL7 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL7.
 
static constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE7 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE7.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL0 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL0.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE0 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE0.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL1 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL1.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE1 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE1.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL2 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL2.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE2 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE2.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL3 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL3.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE3 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE3.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL4 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL4.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE4 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE4.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL5 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL5.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE5 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE5.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL6 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL6.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE6 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE6.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL7 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL7.
 
static constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE7 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE7.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL0 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL0.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE0 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE0.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL1 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL1.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE1 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE1.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL2 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL2.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE2 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE2.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL3 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL3.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE3 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE3.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL4 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL4.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE4 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE4.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL5 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL5.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE5 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE5.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL6 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL6.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE6 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE6.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL7 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL7.
 
static constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE7 (uint32 value)
 MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE7.
 

函式成員說明文件

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL0()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL0 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL0.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL1()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL1 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL1.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL2()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL2 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL2.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL3()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL3 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL3.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL4()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL4 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL4.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL5()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL5 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL5.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL6()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL6 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL6.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL7()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL7 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - MBACSEL7.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE0()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE0 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE0.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE1()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE1 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE1.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE2()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE2 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE2.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE3()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE3 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE3.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE4()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE4 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE4.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE5()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE5 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE5.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE6()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE6 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE6.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE7()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE7 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W - NSE7.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL0()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL0 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL0.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL1()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL1 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL1.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL2()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL2 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL2.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL3()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL3 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL3.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL4()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL4 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL4.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL5()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL5 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL5.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL6()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL6 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL6.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL7()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL7 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - MBACSEL7.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE0()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE0 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE0.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE1()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE1 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE1.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE2()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE2 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE2.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE3()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE3 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE3.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE4()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE4 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE4.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE5()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE5 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE5.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE6()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE6 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE6.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE7()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE7 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W - NSE7.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL0()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL0 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL0.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL1()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL1 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL1.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL2()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL2 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL2.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL3()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL3 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL3.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL4()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL4 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL4.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL5()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL5 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL5.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL6()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL6 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL6.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL7()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL7 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - MBACSEL7.

MBC Memory Block Configuration Word - Memory Block Access Control Select for block B

  • [0b000]select MBC_MEMN_GLBAC0 access control policy for block B
  • [0b001]select MBC_MEMN_GLBAC1 access control policy for block B
  • [0b010]select MBC_MEMN_GLBAC2 access control policy for block B
  • [0b011]select MBC_MEMN_GLBAC3 access control policy for block B
  • [0b100]select MBC_MEMN_GLBAC4 access control policy for block B
  • [0b101]select MBC_MEMN_GLBAC5 access control policy for block B
  • [0b110]select MBC_MEMN_GLBAC6 access control policy for block B
  • [0b111]select MBC_MEMN_GLBAC7 access control policy for block B

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE0()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE0 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE0.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE1()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE1 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE1.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE2()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE2 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE2.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE3()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE3 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE3.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE4()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE4 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE4.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE5()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE5 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE5.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE6()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE6 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE6.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE7()

static constexpr uint32 chip::trdc::TRDC::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE7 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W - NSE7.

MBC Memory Block Configuration Word - NonSecure Enable for block B

  • [0b0]Secure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed.
  • [0b1]Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]).

◆ MEM_GLBCFG_CLRE()

static constexpr uint32 chip::trdc::TRDC::MEM_GLBCFG_CLRE ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEM_GLBCFG - CLRE.

MBC Global Configuration Register - Clear Error

◆ MEM_GLBCFG_NBLKS()

static constexpr uint32 chip::trdc::TRDC::MEM_GLBCFG_NBLKS ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEM_GLBCFG - NBLKS.

MBC Global Configuration Register - Number of blocks in this memory

◆ MEM_GLBCFG_SIZE_LOG2()

static constexpr uint32 chip::trdc::TRDC::MEM_GLBCFG_SIZE_LOG2 ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEM_GLBCFG - SIZE_LOG2.

MBC Global Configuration Register - Log2 size per block

◆ MEMN_GLBAC_LK()

static constexpr uint32 chip::trdc::TRDC::MEMN_GLBAC_LK ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEMN_GLBAC - LK.

MBC Global Access Control - LOCK

  • [0b0]This register is not locked and can be altered.
  • [0b1]This register is locked and cannot be altered.

◆ MEMN_GLBAC_NPR()

static constexpr uint32 chip::trdc::TRDC::MEMN_GLBAC_NPR ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEMN_GLBAC - NPR.

MBC Global Access Control - NonsecurePriv Read

  • [0b0]Read access is not allowed in Nonsecure Privilege mode.
  • [0b1]Read access is allowed in Nonsecure Privilege mode.

◆ MEMN_GLBAC_NPW()

static constexpr uint32 chip::trdc::TRDC::MEMN_GLBAC_NPW ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEMN_GLBAC - NPW.

MBC Global Access Control - NonsecurePriv Write

  • [0b0]Write access is not allowed in Nonsecure Privilege mode.
  • [0b1]Write access is allowed in Nonsecure Privilege mode.

◆ MEMN_GLBAC_NPX()

static constexpr uint32 chip::trdc::TRDC::MEMN_GLBAC_NPX ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEMN_GLBAC - NPX.

MBC Global Access Control - NonsecurePriv Execute

  • [0b0]Execute access is not allowed in Nonsecure Privilege mode.
  • [0b1]Execute access is allowed in Nonsecure Privilege mode.

◆ MEMN_GLBAC_NUR()

static constexpr uint32 chip::trdc::TRDC::MEMN_GLBAC_NUR ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEMN_GLBAC - NUR.

MBC Global Access Control - NonsecureUser Read

  • [0b0]Read access is not allowed in Nonsecure User mode.
  • [0b1]Read access is allowed in Nonsecure User mode.

◆ MEMN_GLBAC_NUW()

static constexpr uint32 chip::trdc::TRDC::MEMN_GLBAC_NUW ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEMN_GLBAC - NUW.

MBC Global Access Control - NonsecureUser Write

  • [0b0]Write access is not allowed in Nonsecure User mode.
  • [0b1]Write access is allowed in Nonsecure User mode.

◆ MEMN_GLBAC_NUX()

static constexpr uint32 chip::trdc::TRDC::MEMN_GLBAC_NUX ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEMN_GLBAC - NUX.

MBC Global Access Control - NonsecureUser Execute

  • [0b0]Execute access is not allowed in Nonsecure User mode.
  • [0b1]Execute access is allowed in Nonsecure User mode.

◆ MEMN_GLBAC_SPR()

static constexpr uint32 chip::trdc::TRDC::MEMN_GLBAC_SPR ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEMN_GLBAC - SPR.

MBC Global Access Control - SecurePriv Read

  • [0b0]Read access is not allowed in Secure Privilege mode.
  • [0b1]Read access is allowed in Secure Privilege mode.

◆ MEMN_GLBAC_SPW()

static constexpr uint32 chip::trdc::TRDC::MEMN_GLBAC_SPW ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEMN_GLBAC - SPW.

MBC Global Access Control - SecurePriv Write

  • [0b0]Write access is not allowed in Secure Privilege mode.
  • [0b1]Write access is allowed in Secure Privilege mode.

◆ MEMN_GLBAC_SPX()

static constexpr uint32 chip::trdc::TRDC::MEMN_GLBAC_SPX ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEMN_GLBAC - SPX.

MBC Global Access Control - SecurePriv Execute

  • [0b0]Execute access is not allowed in Secure Privilege mode.
  • [0b1]Execute access is allowed in Secure Privilege mode.

◆ MEMN_GLBAC_SUR()

static constexpr uint32 chip::trdc::TRDC::MEMN_GLBAC_SUR ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEMN_GLBAC - SUR.

MBC Global Access Control - SecureUser Read

  • [0b0]Read access is not allowed in Secure User mode.
  • [0b1]Read access is allowed in Secure User mode.

◆ MEMN_GLBAC_SUW()

static constexpr uint32 chip::trdc::TRDC::MEMN_GLBAC_SUW ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEMN_GLBAC - SUW.

MBC Global Access Control - SecureUser Write

  • [0b0]Write access is not allowed in Secure User mode.
  • [0b1]Write access is allowed in Secure User mode.

◆ MEMN_GLBAC_SUX()

static constexpr uint32 chip::trdc::TRDC::MEMN_GLBAC_SUX ( uint32 value)
inlinestaticconstexpr

MBC_INDEX_MBC_MEMN_GLBAC - SUX.

MBC Global Access Control - SecureUser Execute

  • [0b0]Execute access is not allowed in Secure User mode.
  • [0b1]Execute access is allowed in Secure User mode.
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