TRDC.h

 
#ifndef CHIP_CB7AA75F_23B9_4FB2_82E1_237F40054A61
#define CHIP_CB7AA75F_23B9_4FB2_82E1_237F40054A61
 
/* ***************************************************************************************
 * Include
 */
 
//----------------------------------------------------------------------------------------
#include "mframe.h"
 
//----------------------------------------------------------------------------------------
#include "./Count.h"
#include "./Mask.h"
#include "./Register.h"
#include "./Shift.h"
 
/* ***************************************************************************************
 * Namespace
 */
namespace chip::trdc {
  class TRDC;
}
 
/* ***************************************************************************************
 * Class/Interface/Struct/Enum
 */
class chip::trdc::TRDC final : public mframe::lang::Object {
  /* *************************************************************************************
   * Variable
   */
 
  /* *************************************************************************************
   * Abstract Method
   */
 
  /* *************************************************************************************
   * Construct Method
   */
 private:
  TRDC(void);
 
 public:
  virtual ~TRDC(void) override;
 
  /* *************************************************************************************
   * Operator Method
   */
 
  /* *************************************************************************************
   * Public Method <Override>
   */
 
  /* *************************************************************************************
   * Public Method
   */
 
  /* *************************************************************************************
   * Protected Method
   */
 
  /* *************************************************************************************
   * Private Method
   */
 
  /* *************************************************************************************
   * Static Variable
   */
 
  /* *************************************************************************************
   * Static Method
   */
 public:
  static inline constexpr uint32 MEM_GLBCFG_NBLKS(uint32 value) {
    return ((value << +chip::trdc::Shift::MEM_GLBCFG_NBLKS) &
            +chip::trdc::Mask::MEM_GLBCFG_NBLKS);
  }
 
  static inline constexpr uint32 MEM_GLBCFG_SIZE_LOG2(uint32 value) {
    return ((value << +chip::trdc::Shift::MEM_GLBCFG_SIZE_LOG2) &
            +chip::trdc::Mask::MEM_GLBCFG_SIZE_LOG2);
  }
 
  static inline constexpr uint32 MEM_GLBCFG_CLRE(uint32 value) {
    return ((value << +chip::trdc::Shift::MEM_GLBCFG_CLRE) &
            +chip::trdc::Mask::MEM_GLBCFG_CLRE);
  }
 
  static inline constexpr uint32 MEMN_GLBAC_NUX(uint32 value) {
    return ((value << +chip::trdc::Shift::MEMN_GLBAC_NUX) &
            +chip::trdc::Mask::MEMN_GLBAC_NUX);
  }
 
  static inline constexpr uint32 MEMN_GLBAC_NUW(uint32 value) {
    return ((value << +chip::trdc::Shift::MEMN_GLBAC_NUW) &
            +chip::trdc::Mask::MEMN_GLBAC_NUW);
  }
 
  static inline constexpr uint32 MEMN_GLBAC_NUR(uint32 value) {
    return ((value << +chip::trdc::Shift::MEMN_GLBAC_NUR) &
            +chip::trdc::Mask::MEMN_GLBAC_NUR);
  }
 
  static inline constexpr uint32 MEMN_GLBAC_NPX(uint32 value) {
    return ((value << +chip::trdc::Shift::MEMN_GLBAC_NPX) &
            +chip::trdc::Mask::MEMN_GLBAC_NPX);
  }
 
  static inline constexpr uint32 MEMN_GLBAC_NPW(uint32 value) {
    return ((value << +chip::trdc::Shift::MEMN_GLBAC_NPW) &
            +chip::trdc::Mask::MEMN_GLBAC_NPW);
  }
 
  static inline constexpr uint32 MEMN_GLBAC_NPR(uint32 value) {
    return ((value << +chip::trdc::Shift::MEMN_GLBAC_NPR) &
            +chip::trdc::Mask::MEMN_GLBAC_NPR);
  }
 
  static inline constexpr uint32 MEMN_GLBAC_SUX(uint32 value) {
    return ((value << +chip::trdc::Shift::MEMN_GLBAC_SUX) &
            +chip::trdc::Mask::MEMN_GLBAC_SUX);
  }
 
  static inline constexpr uint32 MEMN_GLBAC_SUW(uint32 value) {
    return ((value << +chip::trdc::Shift::MEMN_GLBAC_SUW) &
            +chip::trdc::Mask::MEMN_GLBAC_SUW);
  }
 
  static inline constexpr uint32 MEMN_GLBAC_SUR(uint32 value) {
    return ((value << +chip::trdc::Shift::MEMN_GLBAC_SUR) &
            +chip::trdc::Mask::MEMN_GLBAC_SUR);
  }
 
  static inline constexpr uint32 MEMN_GLBAC_SPX(uint32 value) {
    return ((value << +chip::trdc::Shift::MEMN_GLBAC_SPX) &
            +chip::trdc::Mask::MEMN_GLBAC_SPX);
  }
 
  static inline constexpr uint32 MEMN_GLBAC_SPW(uint32 value) {
    return ((value << +chip::trdc::Shift::MEMN_GLBAC_SPW) &
            +chip::trdc::Mask::MEMN_GLBAC_SPW);
  }
 
  static inline constexpr uint32 MEMN_GLBAC_SPR(uint32 value) {
    return ((value << +chip::trdc::Shift::MEMN_GLBAC_SPR) &
            +chip::trdc::Mask::MEMN_GLBAC_SPR);
  }
 
  static inline constexpr uint32 MEMN_GLBAC_LK(uint32 value) {
    return ((value << +chip::trdc::Shift::MEMN_GLBAC_LK) &
            +chip::trdc::Mask::MEMN_GLBAC_LK);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL0(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL0) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL0);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE0(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE0) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE0);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL1(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL1) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL1);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE1(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE1) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE1);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL2(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL2) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL2);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE2(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE2) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE2);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL3(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL3) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL3);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE3(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE3) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE3);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL4(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL4) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL4);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE4(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE4) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE4);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL5(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL5) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL5);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE5(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE5) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE5);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL6(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL6) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL6);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE6(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE6) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE6);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL7(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL7) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_MBACSEL7);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE7(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE7) &
            +chip::trdc::Mask::INDEX_DOM0_MEM0_BLK_CFG_W_MBC_DOM0_MEM0_BLK_CFG_W_NSE7);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL0(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL0) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL0);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE0(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE0) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE0);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL1(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL1) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL1);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE1(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE1) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE1);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL2(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL2) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL2);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE2(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE2) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE2);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL3(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL3) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL3);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE3(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE3) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE3);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL4(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL4) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL4);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE4(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE4) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE4);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL5(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL5) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL5);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE5(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE5) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE5);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL6(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL6) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL6);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE6(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE6) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE6);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL7(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL7) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_MBACSEL7);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE7(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE7) &
            +chip::trdc::Mask::INDEX_DOM0_MEM1_BLK_CFG_W_MBC_DOM0_MEM1_BLK_CFG_W_NSE7);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL0(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL0) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL0);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE0(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE0) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE0);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL1(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL1) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL1);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE1(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE1) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE1);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL2(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL2) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL2);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE2(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE2) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE2);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL3(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL3) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL3);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE3(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE3) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE3);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL4(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL4) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL4);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE4(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE4) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE4);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL5(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL5) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL5);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE5(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE5) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE5);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL6(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL6) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL6);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE6(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE6) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE6);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL7(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL7) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_MBACSEL7);
  }
 
  static inline constexpr uint32 INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE7(uint32 value) {
    return ((value << +chip::trdc::Shift::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE7) &
            +chip::trdc::Mask::INDEX_DOM0_MEM2_BLK_CFG_W_MBC_DOM0_MEM2_BLK_CFG_W_NSE7);
  }
};
 
/* ***************************************************************************************
 * End of file
 */
 
#endif /* CHIP_CB7AA75F_23B9_4FB2_82E1_237F40054A61 */