類別chip::lpi2c::LPI2C的繼承圖:

公開方法(Public Methods)
	LPI2C (void)
	Construct a new object.

virtual	~LPI2C (void) override
	Destroy the object.

公開方法(Public Methods) 繼承自 mframe::lang::Object
	Object (void)
	Construct a new Object object.

virtual	~Object (void) override
	Destroy the Object object.

void *	operator new (size_t n)

void *	operator new (size_t n, void *p)

mframe::lang::Object &	getObject (void) override
	取得類Object

void	delay (int milliseconds) const
	函數 delay 等待內核滴答中指定的時間段。對於1的值，系統等待直到下一個計時器滴答發生。實際時間延遲最多可能比指定時間少一個計時器滴答聲，即在下一個系統滴答聲發生之前立即調用 osDelay(1)，線程會立即重新安排。

bool	equals (Object *object) const
	函數 delay 等待內核滴答中指定的時間段。對於1的值，系統等待直到下一個計時器滴答發生。實際時間延遲最多可能比指定時間少一個計時器滴答聲，即在下一個系統滴答聲發生之前立即調用 osDelay(1)，線程會立即重新安排。

bool	equals (Object &object) const
	函數 delay 等待內核滴答中指定的時間段。對於1的值，系統等待直到下一個計時器滴答發生。實際時間延遲最多可能比指定時間少一個計時器滴答聲，即在下一個系統滴答聲發生之前立即調用 osDelay(1)，線程會立即重新安排。

void	wait (void) const
	導致當前線程等待，直到另一個線程調用此對象的notify()方法或notifyAll()方法，或指定的時間已過。

bool	wait (int timeout) const
	導致當前線程等待，直到另一個線程調用此對象的 notify()方法或 notifyAll()方法，或其他一些線程中斷當前線程，或一定量的實時時間。

bool	yield (void) const
	函數yield()將控制權傳遞給處於READY狀態且具有相同優先級的下一個線程。如果在READY狀態下沒有其他優先級相同的線程，則當前線程繼續執行，不會發生線程切換。

int	lock (void) const
	核心鎖定，在調用unlock以前將不會進行執行緒切換

int	unlock (void) const
	核心解鎖。

mframe::sys::Thread *	currentThread (void) const
	取得當前的執行緒

virtual int	hashcode (void) const
	返回對象的哈希碼值。支持這種方法是為了散列表，如HashMap提供的那樣。

公開方法(Public Methods) 繼承自 mframe::lang::Interface
virtual	~Interface (void)=default
	Destroy the struct object.

靜態公開方法(Static Public Methods)
static constexpr uint32	VERID_FEATURE (uint32 value)
	VERID - FEATURE.

static constexpr uint32	VERID_MINOR (uint32 value)
	VERID - MINOR.

static constexpr uint32	VERID_MAJOR (uint32 value)
	VERID - MAJOR.

static constexpr uint32	PARAM_MTXFIFO (uint32 value)
	PARAM - MTXFIFO.

static constexpr uint32	PARAM_MRXFIFO (uint32 value)
	PARAM - MRXFIFO.

static constexpr uint32	MCR_MEN (uint32 value)
	MCR - MEN.

static constexpr uint32	MCR_RST (uint32 value)
	MCR - RST.

static constexpr uint32	MCR_DOZEN (uint32 value)
	MCR - DOZEN.

static constexpr uint32	MCR_DBGEN (uint32 value)
	MCR - DBGEN.

static constexpr uint32	MCR_RTF (uint32 value)
	MCR - RTF.

static constexpr uint32	MCR_RRF (uint32 value)
	MCR - RRF.

static constexpr uint32	MSR_TDF (uint32 value)
	MSR - TDF.

static constexpr uint32	MSR_RDF (uint32 value)
	MSR - RDF.

static constexpr uint32	MSR_EPF (uint32 value)
	MSR - EPF.

static constexpr uint32	MSR_SDF (uint32 value)
	MSR - SDF.

static constexpr uint32	MSR_NDF (uint32 value)
	MSR - NDF.

static constexpr uint32	MSR_ALF (uint32 value)
	MSR - ALF.

static constexpr uint32	MSR_FEF (uint32 value)
	MSR - FEF.

static constexpr uint32	MSR_PLTF (uint32 value)
	MSR - PLTF.

static constexpr uint32	MSR_DMF (uint32 value)
	MSR - DMF.

static constexpr uint32	MSR_STF (uint32 value)
	MSR - STF.

static constexpr uint32	MSR_MBF (uint32 value)
	MSR - MBF.

static constexpr uint32	MSR_BBF (uint32 value)
	MSR - BBF.

static constexpr uint32	MIER_TDIE (uint32 value)
	MIER - TDIE.

static constexpr uint32	MIER_RDIE (uint32 value)
	MIER - RDIE.

static constexpr uint32	MIER_EPIE (uint32 value)
	MIER - EPIE.

static constexpr uint32	MIER_SDIE (uint32 value)
	MIER - SDIE.

static constexpr uint32	MIER_NDIE (uint32 value)
	MIER - NDIE.

static constexpr uint32	MIER_ALIE (uint32 value)
	MIER - ALIE.

static constexpr uint32	MIER_FEIE (uint32 value)
	MIER - FEIE.

static constexpr uint32	MIER_PLTIE (uint32 value)
	MIER - PLTIE.

static constexpr uint32	MIER_DMIE (uint32 value)
	MIER - DMIE.

static constexpr uint32	MIER_STIE (uint32 value)
	MIER - STIE.

static constexpr uint32	MDER_TDDE (uint32 value)
	MDER - TDDE.

static constexpr uint32	MDER_RDDE (uint32 value)
	MDER - RDDE.

static constexpr uint32	MCFGR0_HREN (uint32 value)
	MCFGR0 - HREN.

static constexpr uint32	MCFGR0_HRPOL (uint32 value)
	MCFGR0 - HRPOL.

static constexpr uint32	MCFGR0_HRSEL (uint32 value)
	MCFGR0 - HRSEL.

static constexpr uint32	MCFGR0_HRDIR (uint32 value)
	MCFGR0 - HRDIR.

static constexpr uint32	MCFGR0_CIRFIFO (uint32 value)
	MCFGR0 - CIRFIFO.

static constexpr uint32	MCFGR0_RDMO (uint32 value)
	MCFGR0 - RDMO.

static constexpr uint32	MCFGR0_RELAX (uint32 value)
	MCFGR0 - RELAX.

static constexpr uint32	MCFGR0_ABORT (uint32 value)
	MCFGR0 - ABORT.

static constexpr uint32	MCFGR1_PRESCALE (uint32 value)
	MCFGR1 - PRESCALE.

static constexpr uint32	MCFGR1_AUTOSTOP (uint32 value)
	MCFGR1 - AUTOSTOP.

static constexpr uint32	MCFGR1_IGNACK (uint32 value)
	MCFGR1 - IGNACK.

static constexpr uint32	MCFGR1_TIMECFG (uint32 value)
	MCFGR1 - TIMECFG.

static constexpr uint32	MCFGR1_STOPCFG (uint32 value)
	MCFGR1 - STOPCFG.

static constexpr uint32	MCFGR1_STARTCFG (uint32 value)
	MCFGR1 - STARTCFG.

static constexpr uint32	MCFGR1_MATCFG (uint32 value)
	MCFGR1 - MATCFG.

static constexpr uint32	MCFGR1_PINCFG (uint32 value)
	MCFGR1 - PINCFG.

static constexpr uint32	MCFGR2_BUSIDLE (uint32 value)
	MCFGR2 - BUSIDLE.

static constexpr uint32	MCFGR2_FILTSCL (uint32 value)
	MCFGR2 - FILTSCL.

static constexpr uint32	MCFGR2_FILTSDA (uint32 value)
	MCFGR2 - FILTSDA.

static constexpr uint32	MCFGR3_PINLOW (uint32 value)
	MCFGR3 - PINLOW.

static constexpr uint32	MDMR_MATCH0 (uint32 value)
	MDMR - MATCH0.

static constexpr uint32	MDMR_MATCH1 (uint32 value)
	MDMR - MATCH1.

static constexpr uint32	MCCR0_CLKLO (uint32 value)
	MCCR0 - CLKLO.

static constexpr uint32	MCCR0_CLKHI (uint32 value)
	MCCR0 - CLKHI.

static constexpr uint32	MCCR0_SETHOLD (uint32 value)
	MCCR0 - SETHOLD.

static constexpr uint32	MCCR0_DATAVD (uint32 value)
	MCCR0 - DATAVD.

static constexpr uint32	MCCR1_CLKLO (uint32 value)
	MCCR1 - CLKLO.

static constexpr uint32	MCCR1_CLKHI (uint32 value)
	MCCR1 - CLKHI.

static constexpr uint32	MCCR1_SETHOLD (uint32 value)
	MCCR1 - SETHOLD.

static constexpr uint32	MCCR1_DATAVD (uint32 value)
	MCCR1 - DATAVD.

static constexpr uint32	MFCR_TXWATER (uint32 value)
	MFCR - TXWATER.

static constexpr uint32	MFCR_RXWATER (uint32 value)
	MFCR - RXWATER.

static constexpr uint32	MFSR_TXCOUNT (uint32 value)
	MFSR - TXCOUNT.

static constexpr uint32	MFSR_RXCOUNT (uint32 value)
	MFSR - RXCOUNT.

static constexpr uint32	MTDR_DATA (uint32 value)
	MTDR - DATA.

static constexpr uint32	MTDR_CMD (uint32 value)
	MTDR - CMD.

static constexpr uint32	MRDR_DATA (uint32 value)
	MRDR - DATA.

static constexpr uint32	MRDR_RXEMPTY (uint32 value)
	MRDR - RXEMPTY.

static constexpr uint32	MRDROR_DATA (uint32 value)
	MRDROR - DATA.

static constexpr uint32	MRDROR_RXEMPTY (uint32 value)
	MRDROR - RXEMPTY.

static constexpr uint32	SCR_SEN (uint32 value)
	SCR - SEN.

static constexpr uint32	SCR_RST (uint32 value)
	SCR - RST.

static constexpr uint32	SCR_FILTEN (uint32 value)
	SCR - FILTEN.

static constexpr uint32	SCR_FILTDZ (uint32 value)
	SCR - FILTDZ.

static constexpr uint32	SCR_RTF (uint32 value)
	SCR - RTF.

static constexpr uint32	SCR_RRF (uint32 value)
	SCR - RRF.

static constexpr uint32	SSR_TDF (uint32 value)
	SSR - TDF.

static constexpr uint32	SSR_RDF (uint32 value)
	SSR - RDF.

static constexpr uint32	SSR_AVF (uint32 value)
	SSR - AVF.

static constexpr uint32	SSR_TAF (uint32 value)
	SSR - TAF.

static constexpr uint32	SSR_RSF (uint32 value)
	SSR - RSF.

static constexpr uint32	SSR_SDF (uint32 value)
	SSR - SDF.

static constexpr uint32	SSR_BEF (uint32 value)
	SSR - BEF.

static constexpr uint32	SSR_FEF (uint32 value)
	SSR - FEF.

static constexpr uint32	SSR_AM0F (uint32 value)
	SSR - AM0F.

static constexpr uint32	SSR_AM1F (uint32 value)
	SSR - AM1F.

static constexpr uint32	SSR_GCF (uint32 value)
	SSR - GCF.

static constexpr uint32	SSR_SARF (uint32 value)
	SSR - SARF.

static constexpr uint32	SSR_SBF (uint32 value)
	SSR - SBF.

static constexpr uint32	SSR_BBF (uint32 value)
	SSR - BBF.

static constexpr uint32	SIER_TDIE (uint32 value)
	SIER - TDIE.

static constexpr uint32	SIER_RDIE (uint32 value)
	SIER - RDIE.

static constexpr uint32	SIER_AVIE (uint32 value)
	SIER - AVIE.

static constexpr uint32	SIER_TAIE (uint32 value)
	SIER - TAIE.

static constexpr uint32	SIER_RSIE (uint32 value)
	SIER - RSIE.

static constexpr uint32	SIER_SDIE (uint32 value)
	SIER - SDIE.

static constexpr uint32	SIER_BEIE (uint32 value)
	SIER - BEIE.

static constexpr uint32	SIER_FEIE (uint32 value)
	SIER - FEIE.

static constexpr uint32	SIER_AM0IE (uint32 value)
	SIER - AM0IE.

static constexpr uint32	SIER_AM1IE (uint32 value)
	SIER - AM1IE.

static constexpr uint32	SIER_GCIE (uint32 value)
	SIER - GCIE.

static constexpr uint32	SIER_SARIE (uint32 value)
	SIER - SARIE.

static constexpr uint32	SDER_TDDE (uint32 value)
	SDER - TDDE.

static constexpr uint32	SDER_RDDE (uint32 value)
	SDER - RDDE.

static constexpr uint32	SDER_AVDE (uint32 value)
	SDER - AVDE.

static constexpr uint32	SDER_RSDE (uint32 value)
	SDER - RSDE.

static constexpr uint32	SDER_SDDE (uint32 value)
	SDER - SDDE.

static constexpr uint32	SCFGR0_RDREQ (uint32 value)
	SCFGR0 - RDREQ.

static constexpr uint32	SCFGR0_RDACK (uint32 value)
	SCFGR0 - RDACK.

static constexpr uint32	SCFGR1_ADRSTALL (uint32 value)
	SCFGR1 - ADRSTALL.

static constexpr uint32	SCFGR1_RXSTALL (uint32 value)
	SCFGR1 - RXSTALL.

static constexpr uint32	SCFGR1_TXDSTALL (uint32 value)
	SCFGR1 - TXDSTALL.

static constexpr uint32	SCFGR1_ACKSTALL (uint32 value)
	SCFGR1 - ACKSTALL.

static constexpr uint32	SCFGR1_RXNACK (uint32 value)
	SCFGR1 - RXNACK.

static constexpr uint32	SCFGR1_GCEN (uint32 value)
	SCFGR1 - GCEN.

static constexpr uint32	SCFGR1_SAEN (uint32 value)
	SCFGR1 - SAEN.

static constexpr uint32	SCFGR1_TXCFG (uint32 value)
	SCFGR1 - TXCFG.

static constexpr uint32	SCFGR1_RXCFG (uint32 value)
	SCFGR1 - RXCFG.

static constexpr uint32	SCFGR1_IGNACK (uint32 value)
	SCFGR1 - IGNACK.

static constexpr uint32	SCFGR1_HSMEN (uint32 value)
	SCFGR1 - HSMEN.

static constexpr uint32	SCFGR1_ADDRCFG (uint32 value)
	SCFGR1 - ADDRCFG.

static constexpr uint32	SCFGR1_RXALL (uint32 value)
	SCFGR1 - RXALL.

static constexpr uint32	SCFGR1_RSCFG (uint32 value)
	SCFGR1 - RSCFG.

static constexpr uint32	SCFGR1_SDCFG (uint32 value)
	SCFGR1 - SDCFG.

static constexpr uint32	SCFGR2_CLKHOLD (uint32 value)
	SCFGR2 - CLKHOLD.

static constexpr uint32	SCFGR2_DATAVD (uint32 value)
	SCFGR2 - DATAVD.

static constexpr uint32	SCFGR2_FILTSCL (uint32 value)
	SCFGR2 - FILTSCL.

static constexpr uint32	SCFGR2_FILTSDA (uint32 value)
	SCFGR2 - FILTSDA.

static constexpr uint32	SAMR_ADDR0 (uint32 value)
	SAMR - ADDR0.

static constexpr uint32	SAMR_ADDR1 (uint32 value)
	SAMR - ADDR1.

static constexpr uint32	SASR_RADDR (uint32 value)
	SASR -RADDR.

static constexpr uint32	SASR_ANV (uint32 value)
	SASR -ANV.

static constexpr uint32	STAR_TXNACK (uint32 value)
	STAR - TXNACK.

static constexpr uint32	STDR_DATA (uint32 value)
	STDR - DATA.

static constexpr uint32	SRDR_DATA (uint32 value)
	SRDR - DATA.

static constexpr uint32	SRDR_RADDR (uint32 value)
	SRDR - RADDR.

static constexpr uint32	SRDR_RXEMPTY (uint32 value)
	SRDR - RXEMPTY.

static constexpr uint32	SRDR_SOF (uint32 value)
	SRDR - SOF.

static constexpr uint32	SRDROR_DATA (uint32 value)
	SRDROR - DATA.

static constexpr uint32	SRDROR_RADDR (uint32 value)
	SRDROR - RADDR.

static constexpr uint32	SRDROR_RXEMPTY (uint32 value)
	SRDROR - RXEMPTY.

static constexpr uint32	SRDROR_SOF (uint32 value)
	SRDROR - SOF.

函式成員說明文件

◆ MCCR0_CLKHI()

static constexpr uint32 chip::lpi2c::LPI2C::MCCR0_CLKHI ( uint32 value )

inlinestaticconstexpr

MCCR0 - CLKHI.

Controller Clock Configuration 0 - Clock High Period

◆ MCCR0_CLKLO()

static constexpr uint32 chip::lpi2c::LPI2C::MCCR0_CLKLO ( uint32 value )

inlinestaticconstexpr

MCCR0 - CLKLO.

Controller Clock Configuration 0 - Clock Low Period

◆ MCCR0_DATAVD()

static constexpr uint32 chip::lpi2c::LPI2C::MCCR0_DATAVD ( uint32 value )

inlinestaticconstexpr

MCCR0 - DATAVD.

Controller Clock Configuration 0 - Data Valid Delay

◆ MCCR0_SETHOLD()

static constexpr uint32 chip::lpi2c::LPI2C::MCCR0_SETHOLD ( uint32 value )

inlinestaticconstexpr

MCCR0 - SETHOLD.

Controller Clock Configuration 0 - Setup Hold Delay

◆ MCCR1_CLKHI()

static constexpr uint32 chip::lpi2c::LPI2C::MCCR1_CLKHI ( uint32 value )

inlinestaticconstexpr

MCCR1 - CLKHI.

Controller Clock Configuration 1 - Clock High Period

◆ MCCR1_CLKLO()

static constexpr uint32 chip::lpi2c::LPI2C::MCCR1_CLKLO ( uint32 value )

inlinestaticconstexpr

MCCR1 - CLKLO.

Controller Clock Configuration 1 - Clock Low Period

◆ MCCR1_DATAVD()

static constexpr uint32 chip::lpi2c::LPI2C::MCCR1_DATAVD ( uint32 value )

inlinestaticconstexpr

MCCR1 - DATAVD.

Controller Clock Configuration 1 - Data Valid Delay

◆ MCCR1_SETHOLD()

static constexpr uint32 chip::lpi2c::LPI2C::MCCR1_SETHOLD ( uint32 value )

inlinestaticconstexpr

MCCR1 - SETHOLD.

Controller Clock Configuration 1 - Setup Hold Delay

◆ MCFGR0_ABORT()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR0_ABORT ( uint32 value )

inlinestaticconstexpr

MCFGR0 - ABORT.

Controller Configuration 0 - Abort Transfer

[0b0] Normal transfer
[0b1] Abort existing transfer and do not start a new one

◆ MCFGR0_CIRFIFO()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR0_CIRFIFO ( uint32 value )

inlinestaticconstexpr

MCFGR0 - CIRFIFO.

Controller Configuration 0 - Circular FIFO Enable

[0b0] Disable
[0b1] Enable

◆ MCFGR0_HRDIR()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR0_HRDIR ( uint32 value )

inlinestaticconstexpr

MCFGR0 - HRDIR.

Controller Configuration 0 - Host Request Direction

[0b0] HREQ pin is input (for LPI2C controller)
[0b1] HREQ pin is output (for LPI2C target)

◆ MCFGR0_HREN()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR0_HREN ( uint32 value )

inlinestaticconstexpr

MCFGR0 - HREN.

Controller Configuration 0 - Host Request Enable

[0b0] Disable
[0b1] Enable

◆ MCFGR0_HRPOL()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR0_HRPOL ( uint32 value )

inlinestaticconstexpr

MCFGR0 - HRPOL.

Controller Configuration 0 - Host Request Polarity

[0b0] Active low
[0b1] Active high

◆ MCFGR0_HRSEL()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR0_HRSEL ( uint32 value )

inlinestaticconstexpr

MCFGR0 - HRSEL.

Controller Configuration 0 - Host Request Select

[0b0] Host request input is pin HREQ
[0b1] Host request input is input trigger

◆ MCFGR0_RDMO()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR0_RDMO ( uint32 value )

inlinestaticconstexpr

MCFGR0 - RDMO.

Controller Configuration 0 - Receive Data Match Only

[0b0] Received data is stored in the receive FIFO
[0b1] Received data is discarded unless MSR[DMF] is set

◆ MCFGR0_RELAX()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR0_RELAX ( uint32 value )

inlinestaticconstexpr

MCFGR0 - RELAX.

Controller Configuration 0 - Relaxed Mode

[0b0] Normal transfer
[0b1] Relaxed transfer

◆ MCFGR1_AUTOSTOP()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR1_AUTOSTOP ( uint32 value )

inlinestaticconstexpr

MCFGR1 - AUTOSTOP.

Controller Configuration 1 - Automatic Stop Generation

[0b0] No effect
[0b1] Stop automatically generated

◆ MCFGR1_IGNACK()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR1_IGNACK ( uint32 value )

inlinestaticconstexpr

MCFGR1 - IGNACK.

Controller Configuration 1 - Ignore NACK

[0b0] No effect
[0b1] Treat a received NACK as an ACK

◆ MCFGR1_MATCFG()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR1_MATCFG ( uint32 value )

inlinestaticconstexpr

MCFGR1 - MATCFG.

Controller Configuration 1 - Match Configuration

[0b000] Match is disabled
[0b001] Reserved
[0b010] Match is enabled: first data word equals MDMR[MATCH0] OR MDMR[MATCH1]
[0b011] Match is enabled: any data word equals MDMR[MATCH0] OR MDMR[MATCH1]
[0b100] Match is enabled: (first data word equals MDMR[MATCH0]) AND (second data word equals MDMR[MATCH1)
[0b101] Match is enabled: (any data word equals MDMR[MATCH0]) AND (next data word equals MDMR[MATCH1)
[0b110] Match is enabled: (first data word AND MDMR[MATCH1]) equals (MDMR[MATCH0] AND MDMR[MATCH1])
[0b111] Match is enabled: (any data word AND MDMR[MATCH1]) equals (MDMR[MATCH0] AND MDMR[MATCH1])

◆ MCFGR1_PINCFG()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR1_PINCFG ( uint32 value )

inlinestaticconstexpr

MCFGR1 - PINCFG.

Controller Configuration 1 - Pin Configuration

[0b000] Two-pin open drain mode
[0b001] Two-pin output only mode (Ultra-Fast mode)
[0b010] Two-pin push-pull mode
[0b011] Four-pin push-pull mode
[0b100] Two-pin open-drain mode with separate LPI2C target
[0b101] Two-pin output only mode (Ultra-Fast mode) with separate LPI2C target
[0b110] Two-pin push-pull mode with separate LPI2C target
[0b111] Four-pin push-pull mode (inverted outputs)

◆ MCFGR1_PRESCALE()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR1_PRESCALE ( uint32 value )

inlinestaticconstexpr

MCFGR1 - PRESCALE.

Controller Configuration 1 - Prescaler

[0b000] Divide by 1
[0b001] Divide by 2
[0b010] Divide by 4
[0b011] Divide by 8
[0b100] Divide by 16
[0b101] Divide by 32
[0b110] Divide by 64
[0b111] Divide by 128

◆ MCFGR1_STARTCFG()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR1_STARTCFG ( uint32 value )

inlinestaticconstexpr

MCFGR1 - STARTCFG.

Controller Configuration 1 - Start Configuration

[0b0] Sets when both I2C bus and LPI2C controller are idle
[0b1] Sets when I2C bus is idle

◆ MCFGR1_STOPCFG()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR1_STOPCFG ( uint32 value )

inlinestaticconstexpr

MCFGR1 - STOPCFG.

Controller Configuration 1 - Stop Configuration

[0b0] Any Stop condition
[0b1] Last Stop condition

◆ MCFGR1_TIMECFG()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR1_TIMECFG ( uint32 value )

inlinestaticconstexpr

MCFGR1 - TIMECFG.

Controller Configuration 1 - Timeout Configuration

[0b0] SCL
[0b1] SCL or SDA

◆ MCFGR2_BUSIDLE()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR2_BUSIDLE ( uint32 value )

inlinestaticconstexpr

MCFGR2 - BUSIDLE.

Controller Configuration 2 - Bus Idle Timeout

◆ MCFGR2_FILTSCL()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR2_FILTSCL ( uint32 value )

inlinestaticconstexpr

MCFGR2 - FILTSCL.

Controller Configuration 2 - Glitch Filter SCL

◆ MCFGR2_FILTSDA()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR2_FILTSDA ( uint32 value )

inlinestaticconstexpr

MCFGR2 - FILTSDA.

Controller Configuration 2 - Glitch Filter SDA

◆ MCFGR3_PINLOW()

static constexpr uint32 chip::lpi2c::LPI2C::MCFGR3_PINLOW ( uint32 value )

inlinestaticconstexpr

MCFGR3 - PINLOW.

Controller Configuration 3 - Pin Low Timeout

◆ MCR_DBGEN()

static constexpr uint32 chip::lpi2c::LPI2C::MCR_DBGEN ( uint32 value )

inlinestaticconstexpr

MCR - DBGEN.

Controller Control - Debug Enable

[0b0] Disable
[0b1] Enable

◆ MCR_DOZEN()

static constexpr uint32 chip::lpi2c::LPI2C::MCR_DOZEN ( uint32 value )

inlinestaticconstexpr

MCR - DOZEN.

Controller Control - Doze Mode Enable

[0b0] Enable
[0b1] Disable

◆ MCR_MEN()

static constexpr uint32 chip::lpi2c::LPI2C::MCR_MEN ( uint32 value )

inlinestaticconstexpr

MCR - MEN.

Controller Control - Controller Enable

[0b0] Disable
[0b1] Enable

◆ MCR_RRF()

static constexpr uint32 chip::lpi2c::LPI2C::MCR_RRF ( uint32 value )

inlinestaticconstexpr

MCR - RRF.

Controller Control - Reset Receive FIFO

[0b0] No effect
[0b1] Reset receive FIFO

◆ MCR_RST()

static constexpr uint32 chip::lpi2c::LPI2C::MCR_RST ( uint32 value )

inlinestaticconstexpr

MCR - RST.

Controller Control - Software Reset

[0b0] No effect
[0b1] Reset

◆ MCR_RTF()

static constexpr uint32 chip::lpi2c::LPI2C::MCR_RTF ( uint32 value )

inlinestaticconstexpr

MCR - RTF.

Controller Control - Reset Transmit FIFO

[0b0] No effect
[0b1] Reset transmit FIFO

◆ MDER_RDDE()

static constexpr uint32 chip::lpi2c::LPI2C::MDER_RDDE ( uint32 value )

inlinestaticconstexpr

MDER - RDDE.

Controller DMA Enable - Receive Data DMA Enable

[0b0] Disable
[0b1] Enable

◆ MDER_TDDE()

static constexpr uint32 chip::lpi2c::LPI2C::MDER_TDDE ( uint32 value )

inlinestaticconstexpr

MDER - TDDE.

Controller DMA Enable - Transmit Data DMA Enable

[0b0] Disable
[0b1] Enable

◆ MDMR_MATCH0()

static constexpr uint32 chip::lpi2c::LPI2C::MDMR_MATCH0 ( uint32 value )

inlinestaticconstexpr

MDMR - MATCH0.

Controller Data Match - Match 0 Value

◆ MDMR_MATCH1()

static constexpr uint32 chip::lpi2c::LPI2C::MDMR_MATCH1 ( uint32 value )

inlinestaticconstexpr

MDMR - MATCH1.

Controller Data Match - Match 1 Value

◆ MFCR_RXWATER()

static constexpr uint32 chip::lpi2c::LPI2C::MFCR_RXWATER ( uint32 value )

inlinestaticconstexpr

MFCR - RXWATER.

Controller FIFO Control - Receive FIFO Watermark

◆ MFCR_TXWATER()

static constexpr uint32 chip::lpi2c::LPI2C::MFCR_TXWATER ( uint32 value )

inlinestaticconstexpr

MFCR - TXWATER.

Controller FIFO Control - Transmit FIFO Watermark

◆ MFSR_RXCOUNT()

static constexpr uint32 chip::lpi2c::LPI2C::MFSR_RXCOUNT ( uint32 value )

inlinestaticconstexpr

MFSR - RXCOUNT.

Controller FIFO Status - Receive FIFO Count

◆ MFSR_TXCOUNT()

static constexpr uint32 chip::lpi2c::LPI2C::MFSR_TXCOUNT ( uint32 value )

inlinestaticconstexpr

MFSR - TXCOUNT.

Controller FIFO Status - Transmit FIFO Count

◆ MIER_ALIE()

static constexpr uint32 chip::lpi2c::LPI2C::MIER_ALIE ( uint32 value )

inlinestaticconstexpr

MIER - ALIE.

Controller Interrupt Enable - Arbitration Lost Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ MIER_DMIE()

static constexpr uint32 chip::lpi2c::LPI2C::MIER_DMIE ( uint32 value )

inlinestaticconstexpr

MIER - DMIE.

Controller Interrupt Enable - Data Match Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ MIER_EPIE()

static constexpr uint32 chip::lpi2c::LPI2C::MIER_EPIE ( uint32 value )

inlinestaticconstexpr

MIER - EPIE.

Controller Interrupt Enable - End Packet Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ MIER_FEIE()

static constexpr uint32 chip::lpi2c::LPI2C::MIER_FEIE ( uint32 value )

inlinestaticconstexpr

MIER - FEIE.

Controller Interrupt Enable - FIFO Error Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ MIER_NDIE()

static constexpr uint32 chip::lpi2c::LPI2C::MIER_NDIE ( uint32 value )

inlinestaticconstexpr

MIER - NDIE.

Controller Interrupt Enable - NACK Detect Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ MIER_PLTIE()

static constexpr uint32 chip::lpi2c::LPI2C::MIER_PLTIE ( uint32 value )

inlinestaticconstexpr

MIER - PLTIE.

Controller Interrupt Enable - Pin Low Timeout Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ MIER_RDIE()

static constexpr uint32 chip::lpi2c::LPI2C::MIER_RDIE ( uint32 value )

inlinestaticconstexpr

MIER - RDIE.

Controller Interrupt Enable - Receive Data Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ MIER_SDIE()

static constexpr uint32 chip::lpi2c::LPI2C::MIER_SDIE ( uint32 value )

inlinestaticconstexpr

MIER - SDIE.

Controller Interrupt Enable - Stop Detect Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ MIER_STIE()

static constexpr uint32 chip::lpi2c::LPI2C::MIER_STIE ( uint32 value )

inlinestaticconstexpr

MIER - STIE.

Controller Interrupt Enable - Start Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ MIER_TDIE()

static constexpr uint32 chip::lpi2c::LPI2C::MIER_TDIE ( uint32 value )

inlinestaticconstexpr

MIER - TDIE.

Controller Interrupt Enable - Transmit Data Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ MRDR_DATA()

static constexpr uint32 chip::lpi2c::LPI2C::MRDR_DATA ( uint32 value )

inlinestaticconstexpr

MRDR - DATA.

Controller Receive Data - Receive Data

◆ MRDR_RXEMPTY()

static constexpr uint32 chip::lpi2c::LPI2C::MRDR_RXEMPTY ( uint32 value )

inlinestaticconstexpr

MRDR - RXEMPTY.

Controller Receive Data - Receive Empty

[0b0] Not empty
[0b1] Empty

◆ MRDROR_DATA()

static constexpr uint32 chip::lpi2c::LPI2C::MRDROR_DATA ( uint32 value )

inlinestaticconstexpr

MRDROR - DATA.

Controller Receive Data Read Only - Receive Data

◆ MRDROR_RXEMPTY()

static constexpr uint32 chip::lpi2c::LPI2C::MRDROR_RXEMPTY ( uint32 value )

inlinestaticconstexpr

MRDROR - RXEMPTY.

Controller Receive Data Read Only - RX Empty

[0b0] Not empty
[0b1] Empty

◆ MSR_ALF()

static constexpr uint32 chip::lpi2c::LPI2C::MSR_ALF ( uint32 value )

inlinestaticconstexpr

MSR - ALF.

Controller Status - Arbitration Lost Flag

[0b0] Controller did not lose arbitration
[0b1] Controller lost arbitration
[0b0] No effect
[0b1] Clear the flag

◆ MSR_BBF()

static constexpr uint32 chip::lpi2c::LPI2C::MSR_BBF ( uint32 value )

inlinestaticconstexpr

MSR - BBF.

Controller Status - Bus Busy Flag

[0b0] Idle
[0b1] Busy

◆ MSR_DMF()

static constexpr uint32 chip::lpi2c::LPI2C::MSR_DMF ( uint32 value )

inlinestaticconstexpr

MSR - DMF.

Controller Status - Data Match Flag

[0b0] Matching data not received
[0b1] Matching data received
[0b0] No effect
[0b1] Clear the flag

◆ MSR_EPF()

static constexpr uint32 chip::lpi2c::LPI2C::MSR_EPF ( uint32 value )

inlinestaticconstexpr

MSR - EPF.

Controller Status - End Packet Flag

[0b0] No Stop or repeated Start generated
[0b1] Stop or repeated Start generated
[0b0] No effect
[0b1] Clear the flag

◆ MSR_FEF()

static constexpr uint32 chip::lpi2c::LPI2C::MSR_FEF ( uint32 value )

inlinestaticconstexpr

MSR - FEF.

Controller Status - FIFO Error Flag

[0b0] No FIFO error
[0b1] FIFO error
[0b0] No effect
[0b1] Clear the flag

◆ MSR_MBF()

static constexpr uint32 chip::lpi2c::LPI2C::MSR_MBF ( uint32 value )

inlinestaticconstexpr

MSR - MBF.

Controller Status - Controller Busy Flag

[0b0] Idle
[0b1] Busy

◆ MSR_NDF()

static constexpr uint32 chip::lpi2c::LPI2C::MSR_NDF ( uint32 value )

inlinestaticconstexpr

MSR - NDF.

Controller Status - NACK Detect Flag

[0b0] No unexpected NACK detected
[0b1] Unexpected NACK detected
[0b0] No effect
[0b1] Clear the flag

◆ MSR_PLTF()

static constexpr uint32 chip::lpi2c::LPI2C::MSR_PLTF ( uint32 value )

inlinestaticconstexpr

MSR - PLTF.

Controller Status - Pin Low Timeout Flag

[0b0] Pin low timeout did not occur
[0b1] Pin low timeout occurred
[0b0] No effect
[0b1] Clear the flag

◆ MSR_RDF()

static constexpr uint32 chip::lpi2c::LPI2C::MSR_RDF ( uint32 value )

inlinestaticconstexpr

MSR - RDF.

Controller Status - Receive Data Flag

[0b0] Receive data not ready
[0b1] Receive data ready

◆ MSR_SDF()

static constexpr uint32 chip::lpi2c::LPI2C::MSR_SDF ( uint32 value )

inlinestaticconstexpr

MSR - SDF.

Controller Status - Stop Detect Flag

[0b0] No Stop condition generated
[0b1] Stop condition generated
[0b0] No effect
[0b1] Clear the flag

◆ MSR_STF()

static constexpr uint32 chip::lpi2c::LPI2C::MSR_STF ( uint32 value )

inlinestaticconstexpr

MSR - STF.

Controller Status - Start Flag

[0b0] Start condition not detected
[0b1] Start condition detected
[0b0] No effect
[0b1] Clear the flag

◆ MSR_TDF()

static constexpr uint32 chip::lpi2c::LPI2C::MSR_TDF ( uint32 value )

inlinestaticconstexpr

MSR - TDF.

Controller Status - Transmit Data Flag

[0b0] Transmit data not requested
[0b1] Transmit data requested

◆ MTDR_CMD()

static constexpr uint32 chip::lpi2c::LPI2C::MTDR_CMD ( uint32 value )

inlinestaticconstexpr

MTDR - CMD.

Controller Transmit Data - Command Data

[0b000] Transmit the value in DATA[7:0]
[0b001] Receive (DATA[7:0] + 1) bytes
[0b010] Generate Stop condition on I2C bus
[0b011] Receive and discard (DATA[7:0] + 1) bytes
[0b100] Generate (repeated) Start on the I2C bus and transmit the address in DATA[7:0]
[0b101] Generate (repeated) Start on the I2C bus and transmit the address in DATA[7:0] (this transfer expects a NACK to be returned)
[0b110] Generate (repeated) Start on the I2C bus and transmit the address in DATA[7:0] using HS mode
[0b111] Generate (repeated) Start on the I2C bus and transmit the address in DATA[7:0] using HS mode (this transfer expects a NACK to be returned)

◆ MTDR_DATA()

static constexpr uint32 chip::lpi2c::LPI2C::MTDR_DATA ( uint32 value )

inlinestaticconstexpr

MTDR - DATA.

Controller Transmit Data - Transmit Data

◆ PARAM_MRXFIFO()

static constexpr uint32 chip::lpi2c::LPI2C::PARAM_MRXFIFO ( uint32 value )

inlinestaticconstexpr

PARAM - MRXFIFO.

Parameter - Controller Receive FIFO Size

◆ PARAM_MTXFIFO()

static constexpr uint32 chip::lpi2c::LPI2C::PARAM_MTXFIFO ( uint32 value )

inlinestaticconstexpr

PARAM - MTXFIFO.

Parameter - Controller Transmit FIFO Size

◆ SAMR_ADDR0()

static constexpr uint32 chip::lpi2c::LPI2C::SAMR_ADDR0 ( uint32 value )

inlinestaticconstexpr

SAMR - ADDR0.

Target Address Match - Address 0 Value

◆ SAMR_ADDR1()

static constexpr uint32 chip::lpi2c::LPI2C::SAMR_ADDR1 ( uint32 value )

inlinestaticconstexpr

SAMR - ADDR1.

Target Address Match - Address 1 Value

◆ SASR_ANV()

static constexpr uint32 chip::lpi2c::LPI2C::SASR_ANV ( uint32 value )

inlinestaticconstexpr

SASR -ANV.

Target Address Status - Address Not Valid

[0b0] Valid
[0b1] Not valid

◆ SASR_RADDR()

static constexpr uint32 chip::lpi2c::LPI2C::SASR_RADDR ( uint32 value )

inlinestaticconstexpr

SASR -RADDR.

Target Address Status - Received Address

◆ SCFGR0_RDACK()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR0_RDACK ( uint32 value )

inlinestaticconstexpr

SCFGR0 - RDACK.

Target Configuration 0 - Read Acknowledge Flag

[0b0] Read Request not acknowledged
[0b1] Read Request acknowledged

◆ SCFGR0_RDREQ()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR0_RDREQ ( uint32 value )

inlinestaticconstexpr

SCFGR0 - RDREQ.

Target Configuration 0 - Read Request

[0b0] Disable
[0b1] Enable

◆ SCFGR1_ACKSTALL()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_ACKSTALL ( uint32 value )

inlinestaticconstexpr

SCFGR1 - ACKSTALL.

Target Configuration 1 - ACK SCL Stall

[0b0] Disable
[0b1] Enable

◆ SCFGR1_ADDRCFG()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_ADDRCFG ( uint32 value )

inlinestaticconstexpr

SCFGR1 - ADDRCFG.

Target Configuration 1 - Address Configuration

[0b000] Address match 0 (7-bit)
[0b001] Address match 0 (10-bit)
[0b010] Address match 0 (7-bit) or address match 1 (7-bit)
[0b011] Address match 0 (10-bit) or address match 1 (10-bit)
[0b100] Address match 0 (7-bit) or address match 1 (10-bit)
[0b101] Address match 0 (10-bit) or address match 1 (7-bit)
[0b110] From address match 0 (7-bit) to address match 1 (7-bit)
[0b111] From address match 0 (10-bit) to address match 1 (10-bit)

◆ SCFGR1_ADRSTALL()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_ADRSTALL ( uint32 value )

inlinestaticconstexpr

SCFGR1 - ADRSTALL.

Target Configuration 1 - Address SCL Stall

[0b0] Disable
[0b1] Enable

◆ SCFGR1_GCEN()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_GCEN ( uint32 value )

inlinestaticconstexpr

SCFGR1 - GCEN.

Target Configuration 1 - General Call Enable

[0b0] Disable
[0b1] Enable

◆ SCFGR1_HSMEN()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_HSMEN ( uint32 value )

inlinestaticconstexpr

SCFGR1 - HSMEN.

Target Configuration 1 - HS Mode Enable

[0b0] Disable
[0b1] Enable

◆ SCFGR1_IGNACK()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_IGNACK ( uint32 value )

inlinestaticconstexpr

SCFGR1 - IGNACK.

Target Configuration 1 - Ignore NACK

[0b0] End transfer on NACK
[0b1] Do not end transfer on NACK

◆ SCFGR1_RSCFG()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_RSCFG ( uint32 value )

inlinestaticconstexpr

SCFGR1 - RSCFG.

Target Configuration 1 - Repeated Start Configuration

[0b0] Any repeated Start condition following an address match
[0b1] Any repeated Start condition

◆ SCFGR1_RXALL()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_RXALL ( uint32 value )

inlinestaticconstexpr

SCFGR1 - RXALL.

Target Configuration 1 - Receive All

[0b0] Disable
[0b1] Enable

◆ SCFGR1_RXCFG()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_RXCFG ( uint32 value )

inlinestaticconstexpr

SCFGR1 - RXCFG.

Target Configuration 1 - Receive Data Configuration

[0b0] Return received data, clear MSR[RDF]
[0b1] Return SASR and clear SSR[AVF] when SSR[AVF] is set, return received data and clear MSR[RDF] when SSR[AFV] is not set

◆ SCFGR1_RXNACK()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_RXNACK ( uint32 value )

inlinestaticconstexpr

SCFGR1 - RXNACK.

Target Configuration 1 - Receive NACK

[0b0] ACK or NACK always determined by STAR[TXNACK]
[0b1] NACK always generated on address overrun or receive data overrun, otherwise ACK or NACK is determined by STAR[TXNACK]

◆ SCFGR1_RXSTALL()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_RXSTALL ( uint32 value )

inlinestaticconstexpr

SCFGR1 - RXSTALL.

Target Configuration 1 - RX SCL Stall

[0b0] Disable
[0b1] Enable

◆ SCFGR1_SAEN()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_SAEN ( uint32 value )

inlinestaticconstexpr

SCFGR1 - SAEN.

Target Configuration 1 - SMBus Alert Enable

[0b0] Disable
[0b1] Enable

◆ SCFGR1_SDCFG()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_SDCFG ( uint32 value )

inlinestaticconstexpr

SCFGR1 - SDCFG.

Target Configuration 1 - Stop Detect Configuration

[0b0] Any Stop condition following an address match
[0b1] Any Stop condition

◆ SCFGR1_TXCFG()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_TXCFG ( uint32 value )

inlinestaticconstexpr

SCFGR1 - TXCFG.

Target Configuration 1 - Transmit Flag Configuration

[0b0] MSR[TDF] is set only during a target-transmit transfer when STDR is empty
[0b1] MSR[TDF] is set whenever STDR is empty

◆ SCFGR1_TXDSTALL()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR1_TXDSTALL ( uint32 value )

inlinestaticconstexpr

SCFGR1 - TXDSTALL.

Target Configuration 1 - Transmit Data SCL Stall

[0b0] Disable
[0b1] Enable

◆ SCFGR2_CLKHOLD()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR2_CLKHOLD ( uint32 value )

inlinestaticconstexpr

SCFGR2 - CLKHOLD.

Target Configuration 2 - Clock Hold Time

◆ SCFGR2_DATAVD()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR2_DATAVD ( uint32 value )

inlinestaticconstexpr

SCFGR2 - DATAVD.

Target Configuration 2 - Data Valid Delay

◆ SCFGR2_FILTSCL()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR2_FILTSCL ( uint32 value )

inlinestaticconstexpr

SCFGR2 - FILTSCL.

Target Configuration 2 - Glitch Filter SCL

◆ SCFGR2_FILTSDA()

static constexpr uint32 chip::lpi2c::LPI2C::SCFGR2_FILTSDA ( uint32 value )

inlinestaticconstexpr

SCFGR2 - FILTSDA.

Target Configuration 2 - Glitch Filter SDA

◆ SCR_FILTDZ()

static constexpr uint32 chip::lpi2c::LPI2C::SCR_FILTDZ ( uint32 value )

inlinestaticconstexpr

SCR - FILTDZ.

Target Control - Filter Doze Enable

[0b0] Enable
[0b1] Disable

◆ SCR_FILTEN()

static constexpr uint32 chip::lpi2c::LPI2C::SCR_FILTEN ( uint32 value )

inlinestaticconstexpr

SCR - FILTEN.

Target Control - Filter Enable

[0b0] Disable
[0b1] Enable

◆ SCR_RRF()

static constexpr uint32 chip::lpi2c::LPI2C::SCR_RRF ( uint32 value )

inlinestaticconstexpr

SCR - RRF.

Target Control - Reset Receive FIFO

[0b0] No effect
[0b1] SRDR is now empty

◆ SCR_RST()

static constexpr uint32 chip::lpi2c::LPI2C::SCR_RST ( uint32 value )

inlinestaticconstexpr

SCR - RST.

Target Control - Software Reset

[0b0] Not reset
[0b1] Reset

◆ SCR_RTF()

static constexpr uint32 chip::lpi2c::LPI2C::SCR_RTF ( uint32 value )

inlinestaticconstexpr

SCR - RTF.

Target Control - Reset Transmit FIFO

[0b0] No effect
[0b1] STDR is now empty

◆ SCR_SEN()

static constexpr uint32 chip::lpi2c::LPI2C::SCR_SEN ( uint32 value )

inlinestaticconstexpr

SCR - SEN.

Target Control - Target Enable

[0b0] Disable
[0b1] Enable

◆ SDER_AVDE()

static constexpr uint32 chip::lpi2c::LPI2C::SDER_AVDE ( uint32 value )

inlinestaticconstexpr

SDER - AVDE.

Target DMA Enable - Address Valid DMA Enable

[0b0] Disable
[0b1] Enable

◆ SDER_RDDE()

static constexpr uint32 chip::lpi2c::LPI2C::SDER_RDDE ( uint32 value )

inlinestaticconstexpr

SDER - RDDE.

Target DMA Enable - Receive Data DMA Enable

[0b0] Disable DMA request
[0b1] Enable DMA request

◆ SDER_RSDE()

static constexpr uint32 chip::lpi2c::LPI2C::SDER_RSDE ( uint32 value )

inlinestaticconstexpr

SDER - RSDE.

Target DMA Enable - Repeated Start DMA Enable

[0b0] Disable
[0b1] Enable

◆ SDER_SDDE()

static constexpr uint32 chip::lpi2c::LPI2C::SDER_SDDE ( uint32 value )

inlinestaticconstexpr

SDER - SDDE.

Target DMA Enable - Stop Detect DMA Enable

[0b0] Disable
[0b1] Enable

◆ SDER_TDDE()

static constexpr uint32 chip::lpi2c::LPI2C::SDER_TDDE ( uint32 value )

inlinestaticconstexpr

SDER - TDDE.

Target DMA Enable - Transmit Data DMA Enable

[0b0] Disable
[0b1] Enable

◆ SIER_AM0IE()

static constexpr uint32 chip::lpi2c::LPI2C::SIER_AM0IE ( uint32 value )

inlinestaticconstexpr

SIER - AM0IE.

Target Interrupt Enable - Address Match 0 Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ SIER_AM1IE()

static constexpr uint32 chip::lpi2c::LPI2C::SIER_AM1IE ( uint32 value )

inlinestaticconstexpr

SIER - AM1IE.

Target Interrupt Enable - Address Match 1 Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ SIER_AVIE()

static constexpr uint32 chip::lpi2c::LPI2C::SIER_AVIE ( uint32 value )

inlinestaticconstexpr

SIER - AVIE.

Target Interrupt Enable - Address Valid Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ SIER_BEIE()

static constexpr uint32 chip::lpi2c::LPI2C::SIER_BEIE ( uint32 value )

inlinestaticconstexpr

SIER - BEIE.

Target Interrupt Enable - Bit Error Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ SIER_FEIE()

static constexpr uint32 chip::lpi2c::LPI2C::SIER_FEIE ( uint32 value )

inlinestaticconstexpr

SIER - FEIE.

Target Interrupt Enable - FIFO Error Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ SIER_GCIE()

static constexpr uint32 chip::lpi2c::LPI2C::SIER_GCIE ( uint32 value )

inlinestaticconstexpr

SIER - GCIE.

Target Interrupt Enable - General Call Interrupt Enable

[0b0] Disabled
[0b1] Enabled

◆ SIER_RDIE()

static constexpr uint32 chip::lpi2c::LPI2C::SIER_RDIE ( uint32 value )

inlinestaticconstexpr

SIER - RDIE.

Target Interrupt Enable - Receive Data Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ SIER_RSIE()

static constexpr uint32 chip::lpi2c::LPI2C::SIER_RSIE ( uint32 value )

inlinestaticconstexpr

SIER - RSIE.

Target Interrupt Enable - Repeated Start Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ SIER_SARIE()

static constexpr uint32 chip::lpi2c::LPI2C::SIER_SARIE ( uint32 value )

inlinestaticconstexpr

SIER - SARIE.

Target Interrupt Enable - SMBus Alert Response Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ SIER_SDIE()

static constexpr uint32 chip::lpi2c::LPI2C::SIER_SDIE ( uint32 value )

inlinestaticconstexpr

SIER - SDIE.

Target Interrupt Enable - Stop Detect Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ SIER_TAIE()

static constexpr uint32 chip::lpi2c::LPI2C::SIER_TAIE ( uint32 value )

inlinestaticconstexpr

SIER - TAIE.

Target Interrupt Enable - Transmit ACK Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ SIER_TDIE()

static constexpr uint32 chip::lpi2c::LPI2C::SIER_TDIE ( uint32 value )

inlinestaticconstexpr

SIER - TDIE.

Target Interrupt Enable - Transmit Data Interrupt Enable

[0b0] Disable
[0b1] Enable

◆ SRDR_DATA()

static constexpr uint32 chip::lpi2c::LPI2C::SRDR_DATA ( uint32 value )

inlinestaticconstexpr

SRDR - DATA.

Target Receive Data - Received Data

◆ SRDR_RADDR()

static constexpr uint32 chip::lpi2c::LPI2C::SRDR_RADDR ( uint32 value )

inlinestaticconstexpr

SRDR - RADDR.

Target Receive Data - Received Address

◆ SRDR_RXEMPTY()

static constexpr uint32 chip::lpi2c::LPI2C::SRDR_RXEMPTY ( uint32 value )

inlinestaticconstexpr

SRDR - RXEMPTY.

Target Receive Data - Receive Empty

[0b0] Not empty
[0b1] Empty

◆ SRDR_SOF()

static constexpr uint32 chip::lpi2c::LPI2C::SRDR_SOF ( uint32 value )

inlinestaticconstexpr

SRDR - SOF.

Target Receive Data - Start of Frame

[0b0] Not first
[0b1] First

◆ SRDROR_DATA()

static constexpr uint32 chip::lpi2c::LPI2C::SRDROR_DATA ( uint32 value )

inlinestaticconstexpr

SRDROR - DATA.

Target Receive Data Read Only - Receive Data

◆ SRDROR_RADDR()

static constexpr uint32 chip::lpi2c::LPI2C::SRDROR_RADDR ( uint32 value )

inlinestaticconstexpr

SRDROR - RADDR.

Target Receive Data Read Only - Received Address

◆ SRDROR_RXEMPTY()

static constexpr uint32 chip::lpi2c::LPI2C::SRDROR_RXEMPTY ( uint32 value )

inlinestaticconstexpr

SRDROR - RXEMPTY.

Target Receive Data Read Only - Receive Empty

[0b0] Not empty
[0b1] Empty

◆ SRDROR_SOF()

static constexpr uint32 chip::lpi2c::LPI2C::SRDROR_SOF ( uint32 value )

inlinestaticconstexpr

SRDROR - SOF.

Target Receive Data Read Only - Start of Frame

[0b0] Not the first
[0b1] First

◆ SSR_AM0F()

static constexpr uint32 chip::lpi2c::LPI2C::SSR_AM0F ( uint32 value )

inlinestaticconstexpr

SSR - AM0F.

Target Status - Address Match 0 Flag

[0b0] ADDR0 matching address not received
[0b1] ADDR0 matching address received

◆ SSR_AM1F()

static constexpr uint32 chip::lpi2c::LPI2C::SSR_AM1F ( uint32 value )

inlinestaticconstexpr

SSR - AM1F.

Target Status - Address Match 1 Flag

[0b0] Matching address not received
[0b1] Matching address received

◆ SSR_AVF()

static constexpr uint32 chip::lpi2c::LPI2C::SSR_AVF ( uint32 value )

inlinestaticconstexpr

SSR - AVF.

Target Status - Address Valid Flag

[0b0] Not valid
[0b1] Valid

◆ SSR_BBF()

static constexpr uint32 chip::lpi2c::LPI2C::SSR_BBF ( uint32 value )

inlinestaticconstexpr

SSR - BBF.

Target Status - Bus Busy Flag

[0b0] Idle
[0b1] Busy

◆ SSR_BEF()

static constexpr uint32 chip::lpi2c::LPI2C::SSR_BEF ( uint32 value )

inlinestaticconstexpr

SSR - BEF.

Target Status - Bit Error Flag

[0b0] No bit error occurred
[0b1] Bit error occurred
[0b0] No effect
[0b1] Clear the flag

◆ SSR_FEF()

static constexpr uint32 chip::lpi2c::LPI2C::SSR_FEF ( uint32 value )

inlinestaticconstexpr

SSR - FEF.

Target Status - FIFO Error Flag

[0b0] No FIFO error
[0b1] FIFO error
[0b0] No effect
[0b1] Clear the flag

◆ SSR_GCF()

static constexpr uint32 chip::lpi2c::LPI2C::SSR_GCF ( uint32 value )

inlinestaticconstexpr

SSR - GCF.

Target Status - General Call Flag

[0b0] General call address disabled or not detected
[0b1] General call address detected

◆ SSR_RDF()

static constexpr uint32 chip::lpi2c::LPI2C::SSR_RDF ( uint32 value )

inlinestaticconstexpr

SSR - RDF.

Target Status - Receive Data Flag

[0b0] Not ready
[0b1] Ready

◆ SSR_RSF()

static constexpr uint32 chip::lpi2c::LPI2C::SSR_RSF ( uint32 value )

inlinestaticconstexpr

SSR - RSF.

Target Status - Repeated Start Flag

[0b0] No repeated Start detected
[0b1] Repeated Start detected
[0b0] No effect
[0b1] Clear the flag

◆ SSR_SARF()

static constexpr uint32 chip::lpi2c::LPI2C::SSR_SARF ( uint32 value )

inlinestaticconstexpr

SSR - SARF.

Target Status - SMBus Alert Response Flag

[0b0] Disabled or not detected
[0b1] Enabled and detected

◆ SSR_SBF()

static constexpr uint32 chip::lpi2c::LPI2C::SSR_SBF ( uint32 value )

inlinestaticconstexpr

SSR - SBF.

Target Status - Target Busy Flag

[0b0] Idle
[0b1] Busy

◆ SSR_SDF()

static constexpr uint32 chip::lpi2c::LPI2C::SSR_SDF ( uint32 value )

inlinestaticconstexpr

SSR - SDF.

Target Status - Stop Detect Flag

[0b0] No Stop detected
[0b1] Stop detected
[0b0] No effect
[0b1] Clear the flag

◆ SSR_TAF()

static constexpr uint32 chip::lpi2c::LPI2C::SSR_TAF ( uint32 value )

inlinestaticconstexpr

SSR - TAF.

Target Status - Transmit ACK Flag

[0b0] Not required
[0b1] Required

◆ SSR_TDF()

static constexpr uint32 chip::lpi2c::LPI2C::SSR_TDF ( uint32 value )

inlinestaticconstexpr

SSR - TDF.

Target Status - Transmit Data Flag

[0b0] Transmit data not requested
[0b1] Transmit data is requested

◆ STAR_TXNACK()

static constexpr uint32 chip::lpi2c::LPI2C::STAR_TXNACK ( uint32 value )

inlinestaticconstexpr

STAR - TXNACK.

Target Transmit ACK - Transmit NACK

[0b0] Transmit ACK
[0b1] Transmit NACK

◆ STDR_DATA()

static constexpr uint32 chip::lpi2c::LPI2C::STDR_DATA ( uint32 value )

inlinestaticconstexpr

STDR - DATA.

Target Transmit Data - Transmit Data

◆ VERID_FEATURE()

static constexpr uint32 chip::lpi2c::LPI2C::VERID_FEATURE ( uint32 value )

inlinestaticconstexpr

VERID - FEATURE.

Version ID - Feature Specification Number

[0b0000000000000010] Controller only, with standard feature set
[0b0000000000000011] Controller and target, with standard feature set

◆ VERID_MAJOR()

static constexpr uint32 chip::lpi2c::LPI2C::VERID_MAJOR ( uint32 value )

inlinestaticconstexpr

VERID - MAJOR.

Version ID - Major Version Number

◆ VERID_MINOR()

static constexpr uint32 chip::lpi2c::LPI2C::VERID_MINOR ( uint32 value )

inlinestaticconstexpr

VERID - MINOR.

Version ID - Minor Version Number

此類別(class) 文件是由下列檔案中產生:

LPI2C.h

公開方法(Public Methods)

靜態公開方法(Static Public Methods)

函式成員說明文件

◆ MCCR0_CLKHI()

◆ MCCR0_CLKLO()

◆ MCCR0_DATAVD()

◆ MCCR0_SETHOLD()

◆ MCCR1_CLKHI()

◆ MCCR1_CLKLO()

◆ MCCR1_DATAVD()

◆ MCCR1_SETHOLD()

◆ MCFGR0_ABORT()

◆ MCFGR0_CIRFIFO()

◆ MCFGR0_HRDIR()

◆ MCFGR0_HREN()

◆ MCFGR0_HRPOL()

◆ MCFGR0_HRSEL()

◆ MCFGR0_RDMO()

◆ MCFGR0_RELAX()

◆ MCFGR1_AUTOSTOP()

◆ MCFGR1_IGNACK()

◆ MCFGR1_MATCFG()

◆ MCFGR1_PINCFG()

◆ MCFGR1_PRESCALE()

◆ MCFGR1_STARTCFG()

◆ MCFGR1_STOPCFG()

◆ MCFGR1_TIMECFG()

◆ MCFGR2_BUSIDLE()

◆ MCFGR2_FILTSCL()

◆ MCFGR2_FILTSDA()

◆ MCFGR3_PINLOW()

◆ MCR_DBGEN()

◆ MCR_DOZEN()

◆ MCR_MEN()

◆ MCR_RRF()

◆ MCR_RST()

◆ MCR_RTF()

◆ MDER_RDDE()

◆ MDER_TDDE()

◆ MDMR_MATCH0()

◆ MDMR_MATCH1()

◆ MFCR_RXWATER()

◆ MFCR_TXWATER()

◆ MFSR_RXCOUNT()

◆ MFSR_TXCOUNT()

◆ MIER_ALIE()

◆ MIER_DMIE()

◆ MIER_EPIE()

◆ MIER_FEIE()

◆ MIER_NDIE()

◆ MIER_PLTIE()

◆ MIER_RDIE()

◆ MIER_SDIE()

◆ MIER_STIE()

◆ MIER_TDIE()

◆ MRDR_DATA()

◆ MRDR_RXEMPTY()

◆ MRDROR_DATA()

◆ MRDROR_RXEMPTY()

◆ MSR_ALF()

◆ MSR_BBF()

◆ MSR_DMF()

◆ MSR_EPF()

◆ MSR_FEF()

◆ MSR_MBF()

◆ MSR_NDF()

◆ MSR_PLTF()

◆ MSR_RDF()

◆ MSR_SDF()

◆ MSR_STF()

◆ MSR_TDF()

◆ MTDR_CMD()

◆ MTDR_DATA()

◆ PARAM_MRXFIFO()

◆ PARAM_MTXFIFO()

◆ SAMR_ADDR0()

◆ SAMR_ADDR1()

◆ SASR_ANV()

◆ SASR_RADDR()

◆ SCFGR0_RDACK()