chip::port::Register 結構 參考文件

公開屬性
__I uint32	verid
uint8	reserved_0 [12]
__O uint32	gpclr
__O uint32	gpchr
uint8	reserved_1 [8]
__IO uint32	config
uint8	reserved_2 [60]
__IO uint32	calib0
__IO uint32	calib1
uint8	reserved_3 [24]
__IO uint32	pcr [32]

資料成員說明文件

calib0

__IO uint32 chip::port::Register::calib0

Calibration 0, offset: 0x60, available only on: PORT1, PORT3 (missing on PORT0, PORT2)

calib1

__IO uint32 chip::port::Register::calib1

Calibration 1, offset: 0x64, available only on: PORT1, PORT3 (missing on PORT0, PORT2)

config

__IO uint32 chip::port::Register::config

Configuration, offset: 0x20

gpchr

__O uint32 chip::port::Register::gpchr

Global Pin Control High, offset: 0x14

gpclr

__O uint32 chip::port::Register::gpclr

Global Pin Control Low, offset: 0x10

pcr

__IO uint32 chip::port::Register::pcr[32]

Pin Control 0..Pin Control 31, array offset: 0x80, array step: 0x4, irregular array, not all indices are valid

reserved_0

uint8 chip::port::Register::reserved_0[12]

reserved

reserved_1

uint8 chip::port::Register::reserved_1[8]

reserved

reserved_2

uint8 chip::port::Register::reserved_2[60]

reserved

reserved_3

uint8 chip::port::Register::reserved_3[24]

reserved

verid

__I uint32 chip::port::Register::verid

Version ID, offset: 0x0

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此結構(structure) 文件是由下列檔案中產生:

• port/Register.h