chip::lpi2c::Register 結構 參考文件

公開屬性
__I uint32	verid
__I uint32	param
uint8	reserved0 [8]
__IO uint32	mcr
__IO uint32	msr
__IO uint32	mier
__IO uint32	mder
__IO uint32	mcfgr0
__IO uint32	mcfgr1
__IO uint32	mcfgr2
__IO uint32	mcfgr3
uint8	reserved1 [16]
__IO uint32	mdmr
uint8	reserved2 [4]
__IO uint32	mccr0
uint8	reserved3 [4]
__IO uint32	mccr1
uint8	reserved4 [4]
__IO uint32	mfcr
__I uint32	mfsr
__O uint32	mtdr
uint8	reserved5 [12]
__I uint32	mrdr
uint8	reserved6 [4]
__I uint32	mrdror
uint8	reserved7 [148]
__IO uint32	scr
__IO uint32	ssr
__IO uint32	sier
__IO uint32	sder
__IO uint32	scfgr0
__IO uint32	scfgr1
__IO uint32	scfgr2
uint8	reserved8 [20]
__IO uint32	samr
uint8	reserved9 [12]
__I uint32	sasr
__IO uint32	star
uint8	reserved10 [8]
__O uint32	stdr
uint8	reserved11 [12]
__I uint32	srdr
uint8	reserved12 [4]
__I uint32	srdror

資料成員說明文件

mccr0

__IO uint32 chip::lpi2c::Register::mccr0

Controller Clock Configuration 0, offset: 0x48

mccr1

__IO uint32 chip::lpi2c::Register::mccr1

Controller Clock Configuration 1, offset: 0x50

mcfgr0

__IO uint32 chip::lpi2c::Register::mcfgr0

Controller Configuration 0, offset: 0x20

mcfgr1

__IO uint32 chip::lpi2c::Register::mcfgr1

Controller Configuration 1, offset: 0x24

mcfgr2

__IO uint32 chip::lpi2c::Register::mcfgr2

Controller Configuration 2, offset: 0x28

mcfgr3

__IO uint32 chip::lpi2c::Register::mcfgr3

Controller Configuration 3, offset: 0x2C

mcr

__IO uint32 chip::lpi2c::Register::mcr

Controller Control, offset: 0x10

mder

__IO uint32 chip::lpi2c::Register::mder

Controller DMA Enable, offset: 0x1C

mdmr

__IO uint32 chip::lpi2c::Register::mdmr

Controller Data Match, offset: 0x40

mfcr

__IO uint32 chip::lpi2c::Register::mfcr

Controller FIFO Control, offset: 0x58

mfsr

__I uint32 chip::lpi2c::Register::mfsr

Controller FIFO Status, offset: 0x5C

mier

__IO uint32 chip::lpi2c::Register::mier

Controller Interrupt Enable, offset: 0x18

mrdr

__I uint32 chip::lpi2c::Register::mrdr

Controller Receive Data, offset: 0x70

mrdror

__I uint32 chip::lpi2c::Register::mrdror

Controller Receive Data Read Only, offset: 0x78

msr

__IO uint32 chip::lpi2c::Register::msr

Controller Status, offset: 0x14

mtdr

__O uint32 chip::lpi2c::Register::mtdr

Controller Transmit Data, offset: 0x60

param

__I uint32 chip::lpi2c::Register::param

Parameter, offset: 0x4

reserved0

uint8 chip::lpi2c::Register::reserved0[8]

Reserved 0

reserved1

uint8 chip::lpi2c::Register::reserved1[16]

Reserved 1

reserved10

uint8 chip::lpi2c::Register::reserved10[8]

Reserved 10

reserved11

uint8 chip::lpi2c::Register::reserved11[12]

Reserved 11

reserved12

uint8 chip::lpi2c::Register::reserved12[4]

Reserved 12

reserved2

uint8 chip::lpi2c::Register::reserved2[4]

Reserved 2

reserved3

uint8 chip::lpi2c::Register::reserved3[4]

Reserved 3

reserved4

uint8 chip::lpi2c::Register::reserved4[4]

Reserved 4

reserved5

uint8 chip::lpi2c::Register::reserved5[12]

Reserved 5

reserved6

uint8 chip::lpi2c::Register::reserved6[4]

Reserved 6

reserved7

uint8 chip::lpi2c::Register::reserved7[148]

Reserved 7

reserved8

uint8 chip::lpi2c::Register::reserved8[20]

Reserved 8

reserved9

uint8 chip::lpi2c::Register::reserved9[12]

Reserved 9

samr

__IO uint32 chip::lpi2c::Register::samr

Target Address Match, offset: 0x140

sasr

__I uint32 chip::lpi2c::Register::sasr

Target Address Status, offset: 0x150

scfgr0

__IO uint32 chip::lpi2c::Register::scfgr0

Target Configuration 0, offset: 0x120

scfgr1

__IO uint32 chip::lpi2c::Register::scfgr1

Target Configuration 1, offset: 0x124

scfgr2

__IO uint32 chip::lpi2c::Register::scfgr2

Target Configuration 2, offset: 0x128

scr

__IO uint32 chip::lpi2c::Register::scr

Target Control, offset: 0x110

sder

__IO uint32 chip::lpi2c::Register::sder

Target DMA Enable, offset: 0x11C

sier

__IO uint32 chip::lpi2c::Register::sier

Target Interrupt Enable, offset: 0x118

srdr

__I uint32 chip::lpi2c::Register::srdr

Target Receive Data, offset: 0x170

srdror

__I uint32 chip::lpi2c::Register::srdror

Target Receive Data Read Only, offset: 0x178

ssr

__IO uint32 chip::lpi2c::Register::ssr

Target Status, offset: 0x114

star

__IO uint32 chip::lpi2c::Register::star

Target Transmit ACK, offset: 0x154

stdr

__O uint32 chip::lpi2c::Register::stdr

Target Transmit Data, offset: 0x160

verid

__I uint32 chip::lpi2c::Register::verid

Version ID, offset: 0x0

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此結構(structure) 文件是由下列檔案中產生:

• lpi2c/Register.h