mrcc/Register.h

 
#ifndef CHIP_822433DA_165B_4605_8547_BC4794113FC2
#define CHIP_822433DA_165B_4605_8547_BC4794113FC2
 
/* ***************************************************************************************
 * Include
 */
 
//----------------------------------------------------------------------------------------
#include "mframe.h"
 
//----------------------------------------------------------------------------------------
 
/* ***************************************************************************************
 * Namespace
 */
namespace chip::mrcc {
  struct Register;
}  // namespace chip::mrcc
 
/* ***************************************************************************************
 * Class/Interface/Struct/Enum
 */
struct chip::mrcc::Register {
  __IO uint32 mrcc_glb_rst0;          
  __O uint32  mrcc_glb_rst0_set;      
  __O uint32  mrcc_glb_rst0_clr;      
  uint8       reserved_0[4];          
  __IO uint32 mrcc_glb_rst1;          
  __O uint32  mrcc_glb_rst1_set;      
  __O uint32  mrcc_glb_rst1_clr;      
  uint8       reserved_1[36];         
  __IO uint32 mrcc_glb_cc0;           
  __O uint32  mrcc_glb_cc0_set;       
  __O uint32  mrcc_glb_cc0_clr;       
  uint8       reserved_2[4];          
  __IO uint32 mrcc_glb_cc1;           
  __O uint32  mrcc_glb_cc1_set;       
  __O uint32  mrcc_glb_cc1_clr;       
  uint8       reserved_3[36];         
  __IO uint32 mrcc_glb_acc0;          
  __IO uint32 mrcc_glb_acc1;          
  uint8       reserved_4[24];         
  __IO uint32 mrcc_i3c0_fclk_clksel;  
  __IO uint32 mrcc_i3c0_fclk_clkdiv;  
  __IO uint32 mrcc_ctimer0_clksel;    
  __IO uint32 mrcc_ctimer0_clkdiv;    
  __IO uint32 mrcc_ctimer1_clksel;    
  __IO uint32 mrcc_ctimer1_clkdiv;    
  __IO uint32 mrcc_ctimer2_clksel;    
  __IO uint32 mrcc_ctimer2_clkdiv;    
  uint8       reserved_5[4];          
  __IO uint32 mrcc_wwdt0_clkdiv;      
  __IO uint32 mrcc_lpi2c0_clksel;     
  __IO uint32 mrcc_lpi2c0_clkdiv;     
  __IO uint32 mrcc_lpspi0_clksel;     
  __IO uint32 mrcc_lpspi0_clkdiv;     
  __IO uint32 mrcc_lpspi1_clksel;     
  __IO uint32 mrcc_lpspi1_clkdiv;     
  __IO uint32 mrcc_lpuart0_clksel;    
  __IO uint32 mrcc_lpuart0_clkdiv;    
  __IO uint32 mrcc_lpuart1_clksel;    
  __IO uint32 mrcc_lpuart1_clkdiv;    
  __IO uint32 mrcc_lpuart2_clksel;    
  __IO uint32 mrcc_lpuart2_clkdiv;    
  __IO uint32 mrcc_usb0_clksel;       
  uint8       reserved_6[4];          
  __IO uint32 mrcc_lptmr0_clksel;     
  __IO uint32 mrcc_lptmr0_clkdiv;     
  __IO uint32 mrcc_ostimer0_clksel;   
  uint8       reserved_7[4];          
  __IO uint32 mrcc_adc0_clksel;       
  __IO uint32 mrcc_adc0_clkdiv;       
  uint8       reserved_8[4];          
  __IO uint32 mrcc_cmp0_func_clkdiv;  
  __IO uint32 mrcc_cmp0_rr_clksel;    
  __IO uint32 mrcc_cmp0_rr_clkdiv;    
  uint8       reserved_9[4];          
  __IO uint32 mrcc_cmp1_func_clkdiv;  
  __IO uint32 mrcc_cmp1_rr_clksel;    
  __IO uint32 mrcc_cmp1_rr_clkdiv;    
  __IO uint32 mrcc_dbg_trace_clksel;  
  __IO uint32 mrcc_dbg_trace_clkdiv;  
  __IO uint32 mrcc_clkout_clksel;     
  __IO uint32 mrcc_clkout_clkdiv;     
  __IO uint32 mrcc_systick_clksel;    
  __IO uint32 mrcc_systick_clkdiv;    
  uint8       reserved_10[4];         
  __IO uint32 mrcc_fro_hf_div_clkdiv; 
};
 
/* ***************************************************************************************
 * End of file
 */
 
#endif /* CHIP_822433DA_165B_4605_8547_BC4794113FC2 */