7#ifndef MCXA153_9193612F_EA8D_416E_83A8_5B473A8360B2
8#define MCXA153_9193612F_EA8D_416E_83A8_5B473A8360B2
PORT (Pin Multiplexing and Control) Peripheral Register Structure.
Definition port/Register.h:53
uint8 reserved_3[24]
Reserved Space (0x68-0x7F)
Definition port/Register.h:263
__I uint32 verid
Version ID Register.
Definition port/Register.h:77
uint8 reserved_1[8]
Reserved Space (0x18-0x1F)
Definition port/Register.h:161
uint8 reserved_0[12]
Reserved Space (0x4-0xF)
Definition port/Register.h:93
__IO uint32 config
Configuration Register.
Definition port/Register.h:181
__IO uint32 calib1
Calibration 1 Register.
Definition port/Register.h:247
__O uint32 gpchr
Global Pin Control High Register.
Definition port/Register.h:145
__IO uint32 calib0
Calibration 0 Register.
Definition port/Register.h:222
__O uint32 gpclr
Global Pin Control Low Register.
Definition port/Register.h:119
uint8 reserved_2[60]
Reserved Space (0x24-0x5F)
Definition port/Register.h:197