MCXA153 TRDC (Trusted Resource Domain Controller) Register Structure (TRDC寄存器結構) 更多...

#include <Register.h>

公開屬性
struct {

__IO uint32 mbc_mem_glbcfg [4]
	MBC Global Configuration Register Array (MBC全域配置寄存器陣列) 更多...

__IO uint32 mbc_nse_blk_index
	MBC Non-Secure Enable Block Index Register (MBC非安全使能區塊索引寄存器) 更多...

__O uint32 mbc_nse_blk_set
	MBC Non-Secure Enable Block Set Register (MBC非安全使能區塊設定寄存器) 更多...

__O uint32 mbc_nse_blk_clr
	MBC Non-Secure Enable Block Clear Register (MBC非安全使能區塊清除寄存器) 更多...

__O uint32 mbc_nse_blk_clr_all
	MBC Non-Secure Enable Block Clear All Register (MBC非安全使能區塊全部清除寄存器) 更多...

__IO uint32 mbc_memn_glbac [8]
	MBC Global Access Control Register Array (MBC全域存取控制寄存器陣列) 更多...

__IO uint32 mbc_dom0_mem0_blk_cfg_w [2]
	MBC Domain 0 Memory 0 Block Configuration Word Array (MBC域0記憶體0區塊配置字陣列) 更多...

uint8 reserved_0 [248]
	Reserved space for Domain 0 Memory 0 (域0記憶體0保留空間) 更多...

__IO uint32 mbc_dom0_mem0_blk_nse_w [1]
	MBC Domain 0 Memory 0 Block Non-Secure Enable Word Array (MBC域0記憶體0區塊非安全使能字陣列) 更多...

uint8 reserved_1 [60]
	Reserved space after Memory 0 NSE configuration (記憶體0 NSE配置後的保留空間) 更多...

__IO uint32 mbc_dom0_mem1_blk_cfg_w [1]
	MBC Domain 0 Memory 1 Block Configuration Word Array (MBC域0記憶體1區塊配置字陣列) 更多...

uint8 reserved_2 [28]
	Reserved space for Domain 0 Memory 1 (域0記憶體1保留空間) 更多...

__IO uint32 mbc_dom0_mem1_blk_nse_w [1]
	MBC Domain 0 Memory 1 Block Non-Secure Enable Word Array (MBC域0記憶體1區塊非安全使能字陣列) 更多...

uint8 reserved_3 [4]
	Reserved space after Memory 1 NSE configuration (記憶體1 NSE配置後的保留空間) 更多...

__IO uint32 mbc_dom0_mem2_blk_cfg_w [1]
	MBC Domain 0 Memory 2 Block Configuration Word Array (MBC域0記憶體2區塊配置字陣列) 更多...

uint8 reserved_4 [28]
	Reserved space for Domain 0 Memory 2 (域0記憶體2保留空間) 更多...

__IO uint32 mbc_dom0_mem2_blk_nse_w [1]
	MBC Domain 0 Memory 2 Block Non-Secure Enable Word Array (MBC域0記憶體2區塊非安全使能字陣列) 更多...

}	mbc_index [1]
	MBC Index Array (MBC索引陣列)

詳細描述

MCXA153 TRDC (Trusted Resource Domain Controller) Register Structure (TRDC寄存器結構)

This structure provides access to TRDC MBC (Memory Block Controller) registers, which implement ARM TrustZone security architecture for memory access control. The TRDC controls access permissions to on-chip internal memory and flash regions. 這個結構提供TRDC MBC（記憶體區塊控制器）寄存器的存取，實現ARM TrustZone安全架構的記憶體存取控制。

Base Address: 0x40130000 Memory Region: AHB Peripheral Bus Access: Secure only (depending on configuration)

Key Security Features (主要安全功能):

Hardware-enforced memory isolation (硬體強制記憶體隔離)
Block-granular access control (區塊粒度存取控制)
Secure/Non-secure domain separation (安全/非安全域分離)
Read/Write/Execute permission management (讀/寫/執行權限管理)
Configuration lock mechanisms (配置鎖定機制)

Memory Architecture (記憶體架構):

MEM0: Main flash (8KB blocks) - 主要快閃記憶體
MEM1: IFR0 (8KB blocks) - 資訊快閃區域0
MEM2: IFR1 (2KB blocks) - 資訊快閃區域1
Domain 0: Primary security domain - 主要安全域

Security Considerations (安全考量):

All flash access treated as secure user level (所有快閃存取視為安全使用者級別)
SUR/SUW/SUX bits control flash permissions (SUR/SUW/SUX位元控制快閃權限)
NSE (Non-Secure Enable) should not be set (不應設定NSE位元)
Access violations generate interrupts (存取違規產生中斷)
Configuration registers can be locked (配置寄存器可被鎖定)

Register Categories (寄存器分類):

Global Configuration: mbc_mem_glbcfg[] (全域配置)
Global Access Control: mbc_memn_glbac[] (全域存取控制)
Block Configuration: mbc_dom*_mem*_blk_cfg_w[] (區塊配置)
Non-Secure Enable: mbc_*_nse_* (非安全使能)
Block Index Control: mbc_nse_blk_* (區塊索引控制)

註: TRDC提供硬體級安全隔離，是ARM TrustZone技術在NXP晶片上的實現

警告: 錯誤配置可能導致系統無法存取必要的記憶體區域

注意: 部分配置一旦鎖定就無法修改，直到系統重置

參閱: ARM TrustZone for Armv8-M Architecture Specification; NXP MCXA153 Reference Manual Chapter 45 - TRDC

Memory Block Checker(MBC)

45.1 Chip-specific MBC information

45.1.1 Module instances

該晶片上有1個MBC模組和1個Domain。MBCm_DOMd_BLK_CFG_W中的m和d為0。快閃記憶體控制器(FMC)和AHB 矩陣之間。 MBC可以控制每個flash的讀取、寫入、執行權限區塊，並且可以鎖定配置。

45.1.2 MBC memory blocks

MBC的粒徑如下表所示。

MEM0 | Main flash | 8K
MEM1 | IFR0 | 8K
MEM2 | IFR1 | 2K

45.1.3 Security considerations

當有對Flash的存取時，該晶片上的MBC無法區分安全權限、安全用戶、非安全權限和非安全用戶，且MBC將所有對Flash的存取視為安全用戶等級。因此，MBC 全域存取控制暫存器中的 SUR/SUW/SUW 位元控制著快閃記憶體的權限。使用者不應設定 MBC 全域存取控制暫存器中的非安全性啟用 (NSE) 位元。

MBC控制對Flash的讀取、寫入和執行權限。如果存取沒有對快閃記憶體區域的權限，MBC 將產生中斷。 DomainX錯誤暫存器物理上位於區塊檢查器中。

45.2 Overview

記憶體區塊檢查器(MBC)基於固定大小的區塊格式實現片上內部記憶體的存取控制。MBC為針對片上儲存空間的系統匯流排引用提供硬體存取控制。

MBC 使用具有固定大小區塊格式的預先編程區域描述符及其相關存取權限，同時監視系統匯流排事務並評估每次傳輸的適當性。具有足夠存取控制權限的記憶體參考已完成，而未對應到任何區域描述符或權限不足的參考則以存取錯誤回應終止。

45.2.1 Block diagram

記憶體區塊檢查器 (MBC) 基於固定大小的區塊格式實現片上內部記憶體和從屬週邊裝置的存取控制。

45.2.2 Features

定義對片上記憶體 MBC 中定義的從屬目標的存取權限。

45.3 Functional description

本節提供有關 MBC 的操作和實施的更多詳細資訊。

45.3.1 Memory Block Checker (MBC)

記憶體區塊檢查器為針對片上內部記憶體的系統匯流排引用提供存取控制。 MBC 使用定義每個區塊存取權限的程式區塊配置暫存器，同時監視系統匯流排事務並評估每次傳輸的適當性。允許具有足夠存取權限的記憶體引用完成，而沒有足夠權限的引用則以存取錯誤回應終止。

請參閱特定於晶片的部分，以確定該裝置支援的每個子記憶體的區塊數量和大小。每個MBCm_DOMd_BLK_CFG_W 包含八個存取控制結構。每個結構由 3 位 MBACSEL（記憶體區塊存取控制選擇）組成。 MBACSEL 欄位選擇 MBCm_MEMN_GLBACr 暫存器，該暫存器控制對相應區塊的讀取/寫入/執行/鎖定存取。下表提供了八種可能的存取控制組合。

如果您正在尋找不同的存取組合，例如允許寫入和執行但阻止讀取，您可以修改未鎖定的設定寄存器之一（MBC0_MEMN_GLBAC0 或 MBC0_MEMN_GLBAC4 或 MBC0_MEMN_GLBAC5）至 0x0000_3300

資料成員說明文件

◆ mbc_dom0_mem0_blk_cfg_w

__IO uint32 mcxa153::chip::trdc::Register::mbc_dom0_mem0_blk_cfg_w[2]

MBC Domain 0 Memory 0 Block Configuration Word Array (MBC域0記憶體0區塊配置字陣列)

Configuration words for Domain 0 Memory 0 (Main flash) block access control. Each word contains multiple MBACSEL (Memory Block Access Control Selection) fields that reference the global access control registers. 域0記憶體0（主快閃記憶體）區塊存取控制的配置字。

Configuration Format:

Each word contains 8 blocks worth of configuration (4 blocks per 32-bit word x 2 words)
Each block uses 3-bit MBACSEL field
MBACSEL selects which GLBAC register controls that block
Additional NSE (Non-Secure Enable) bit per block

註: Main flash uses 8KB blocks

警告: Incorrect MBACSEL values may prevent code execution MBC Memory Block Configuration Word, array offset: 0x40, array step: index*0x1CC, index2*0x4

◆ mbc_dom0_mem0_blk_nse_w

__IO uint32 mcxa153::chip::trdc::Register::mbc_dom0_mem0_blk_nse_w[1]

MBC Domain 0 Memory 0 Block Non-Secure Enable Word Array (MBC域0記憶體0區塊非安全使能字陣列)

Non-secure enable control for Domain 0 Memory 0 blocks. Each bit enables non-secure access for the corresponding block. 域0記憶體0區塊的非安全使能控制。

註: Usually should remain 0 for flash regions per security guidelines

警告: Enabling non-secure access may compromise system security MBC Memory Block NonSecure Enable Word, array offset: 0x140, array step: index*0x1CC, index2*0x4

◆ mbc_dom0_mem1_blk_cfg_w

__IO uint32 mcxa153::chip::trdc::Register::mbc_dom0_mem1_blk_cfg_w[1]

MBC Domain 0 Memory 1 Block Configuration Word Array (MBC域0記憶體1區塊配置字陣列)

Configuration word for Domain 0 Memory 1 (IFR0) block access control. IFR0 typically contains boot configuration and security settings. 域0記憶體1（IFR0）區塊存取控制的配置字。

註: IFR0 uses 8KB blocks and contains critical boot information

注意: Misconfiguration may prevent secure boot operation MBC Memory Block Configuration Word, array offset: 0x180, array step: index*0x1CC, index2*0x4

◆ mbc_dom0_mem1_blk_nse_w

__IO uint32 mcxa153::chip::trdc::Register::mbc_dom0_mem1_blk_nse_w[1]

MBC Domain 0 Memory 1 Block Non-Secure Enable Word Array (MBC域0記憶體1區塊非安全使能字陣列)

Non-secure enable control for Domain 0 Memory 1 (IFR0) blocks. Controls non-secure access to boot configuration area. 域0記憶體1（IFR0）區塊的非安全使能控制。

警告: IFR0 contains sensitive boot and security configuration

注意: Non-secure access to IFR0 should be carefully controlled MBC Memory Block NonSecure Enable Word, array offset: 0x1A0, array step: index*0x1CC, index2*0x4

◆ mbc_dom0_mem2_blk_cfg_w

__IO uint32 mcxa153::chip::trdc::Register::mbc_dom0_mem2_blk_cfg_w[1]

MBC Domain 0 Memory 2 Block Configuration Word Array (MBC域0記憶體2區塊配置字陣列)

Configuration word for Domain 0 Memory 2 (IFR1) block access control. IFR1 contains additional information flash storage. 域0記憶體2（IFR1）區塊存取控制的配置字。

註: IFR1 uses smaller 2KB blocks compared to other regions; IFR1 may contain user configuration or calibration data MBC Memory Block Configuration Word, array offset: 0x1A8, array step: index*0x1CC, index2*0x4

◆ mbc_dom0_mem2_blk_nse_w

__IO uint32 mcxa153::chip::trdc::Register::mbc_dom0_mem2_blk_nse_w[1]

MBC Domain 0 Memory 2 Block Non-Secure Enable Word Array (MBC域0記憶體2區塊非安全使能字陣列)

Non-secure enable control for Domain 0 Memory 2 (IFR1) blocks. Controls non-secure access to information flash region 1. 域0記憶體2（IFR1）區塊的非安全使能控制。

註: IFR1 access permissions may affect application configuration storage MBC Memory Block NonSecure Enable Word, array offset: 0x1C8, array step: index*0x1CC, index2*0x4

◆ [struct]

struct { ... } mcxa153::chip::trdc::Register::mbc_index[1]

MBC Index Array (MBC索引陣列)

Array of MBC (Memory Block Controller) instances. This device has 1 MBC module controlling 3 memory regions (MEM0, MEM1, MEM2) within Domain 0. MBC模組陣列，此裝置有1個MBC模組控制Domain 0內的3個記憶體區域。

Array Size: 1 (single MBC instance) Memory Regions: 3 (MEM0, MEM1, MEM2) Domain Count: 1 (Domain 0)

◆ mbc_mem_glbcfg

__IO uint32 mcxa153::chip::trdc::Register::mbc_mem_glbcfg[4]

MBC Global Configuration Register Array (MBC全域配置寄存器陣列)

Contains global configuration for each memory region controlled by this MBC. Each register configures block count, block size, and error control for the corresponding memory region. 包含此MBC控制的每個記憶體區域的全域配置。

Register Layout:

[0] MEM0 Configuration (Main flash, 8KB blocks)
[1] MEM1 Configuration (IFR0, 8KB blocks)
[2] MEM2 Configuration (IFR1, 2KB blocks)
[3] Reserved/Future use

Key Fields:

NBLKS: Number of blocks in memory region
SIZE_LOG2: Log2 of block size
CLRE: Clear error flags

註: 配置錯誤可能導致記憶體區域無法存取 MBC Global Configuration Register, array offset: 0x0, array step: index*0x1CC, index2*0x4

◆ mbc_memn_glbac

__IO uint32 mcxa153::chip::trdc::Register::mbc_memn_glbac[8]

MBC Global Access Control Register Array (MBC全域存取控制寄存器陣列)

Array of global access control registers defining access permissions for different security levels and privilege modes. 全域存取控制寄存器陣列，定義不同安全級別和特權模式的存取權限。

Access Control Matrix:

[0-2] Standard access control patterns
[3] Reserved
[4-5] Customizable access control
[6-7] Reserved for future use

Permission Bits:

SUR/SUW/SUX: Secure User Read/Write/Execute
SPR/SPW/SPX: Secure Privileged Read/Write/Execute
NUR/NUW/NUX: Non-secure User Read/Write/Execute
NPR/NPW/NPX: Non-secure Privileged Read/Write/Execute
LK: Lock bit to prevent further modifications

註: For this device, all flash access is treated as secure user level

警告: NSE (Non-Secure Enable) bit should not be set for flash regions MBC Global Access Control, array offset: 0x20, array step: index*0x1CC, index2*0x4

◆ mbc_nse_blk_clr

__O uint32 mcxa153::chip::trdc::Register::mbc_nse_blk_clr

MBC Non-Secure Enable Block Clear Register (MBC非安全使能區塊清除寄存器)

Write-only register to clear non-secure enable bits for selected blocks. Writing 1 to a bit position disables non-secure access for that block. 唯寫寄存器，用於清除選定區塊的非安全使能位元。

註: Write-only register, reading returns undefined values

警告: Clearing NSE bits may prevent non-secure code from accessing required memory MBC NonSecure Enable Block Clear, array offset: 0x18, array step: 0x1CC

◆ mbc_nse_blk_clr_all

__O uint32 mcxa153::chip::trdc::Register::mbc_nse_blk_clr_all

MBC Non-Secure Enable Block Clear All Register (MBC非安全使能區塊全部清除寄存器)

Write-only register to clear all non-secure enable bits at once. Any write to this register disables non-secure access to all blocks. 唯寫寄存器，用於一次清除所有非安全使能位元。

註: Write-only register, any value written has the same effect

警告: This operation affects all memory blocks simultaneously MBC NonSecure Enable Block Clear All, array offset: 0x1C, array step: 0x1CC

◆ mbc_nse_blk_index

__IO uint32 mcxa153::chip::trdc::Register::mbc_nse_blk_index

MBC Non-Secure Enable Block Index Register (MBC非安全使能區塊索引寄存器)

Specifies the block index for non-secure enable operations. Used to select which memory blocks can be accessed by non-secure code. 指定非安全使能操作的區塊索引，用於選擇哪些記憶體區塊可被非安全程式碼存取。

警告: Improper configuration may compromise system security

註: This register works with SET/CLR registers for atomic operations MBC NonSecure Enable Block Index, array offset: 0x10, array step: 0x1CC

◆ mbc_nse_blk_set

__O uint32 mcxa153::chip::trdc::Register::mbc_nse_blk_set

MBC Non-Secure Enable Block Set Register (MBC非安全使能區塊設定寄存器)

Write-only register to set non-secure enable bits for selected blocks. Writing 1 to a bit position enables non-secure access for that block. 唯寫寄存器，用於設定選定區塊的非安全使能位元。

註: Write-only register, reading returns undefined values

注意: Once set, blocks become accessible to non-secure code MBC NonSecure Enable Block Set, array offset: 0x14, array step: 0x1CC

◆ reserved_0

uint8 mcxa153::chip::trdc::Register::reserved_0[248]

Reserved space for Domain 0 Memory 0 (域0記憶體0保留空間)

Reserved memory region for alignment and future expansion. 248 bytes reserved after Memory 0 block configuration.

◆ reserved_1

uint8 mcxa153::chip::trdc::Register::reserved_1[60]

Reserved space after Memory 0 NSE configuration (記憶體0 NSE配置後的保留空間)

60 bytes reserved for alignment and future use.

◆ reserved_2

uint8 mcxa153::chip::trdc::Register::reserved_2[28]

Reserved space for Domain 0 Memory 1 (域0記憶體1保留空間)

28 bytes reserved after Memory 1 block configuration.

◆ reserved_3

uint8 mcxa153::chip::trdc::Register::reserved_3[4]

Reserved space after Memory 1 NSE configuration (記憶體1 NSE配置後的保留空間)

4 bytes reserved for alignment.

◆ reserved_4

uint8 mcxa153::chip::trdc::Register::reserved_4[28]

Reserved space for Domain 0 Memory 2 (域0記憶體2保留空間)

28 bytes reserved after Memory 2 block configuration.

此結構(structure) 文件是由下列檔案中產生:

trdc/Register.h

公開屬性