GPIO_Peripheral_Access_Layer GPIO Peripheral Access Layer. 更多...

#include <Register.h>

公開屬性
__I uint32	verid

__I uint32	param

uint8	reserved_0 [56]

__IO uint32	pdor

__O uint32	psor

__O uint32	pcor

__O uint32	ptor

__I uint32	pdir

__IO uint32	pddr

__IO uint32	pidr

uint8	reserved_1 [4]

__IO uint8	pdr [32]

__IO uint32	icr [32]

__O uint32	giclr

__O uint32	gichr

uint8	reserved_2 [24]

__IO uint32	isfr [1]

詳細描述

GPIO_Peripheral_Access_Layer GPIO Peripheral Access Layer.

資料成員說明文件

◆ gichr

__O uint32 chip::gpio::Register::gichr

Global Interrupt Control High, offset: 0x104

◆ giclr

__O uint32 chip::gpio::Register::giclr

Global Interrupt Control Low, offset: 0x100

◆ icr

__IO uint32 chip::gpio::Register::icr[32]

Interrupt Control 0..Interrupt Control 31, array offset: 0x80, array step: 0x4

◆ isfr

__IO uint32 chip::gpio::Register::isfr[1]

Interrupt Status Flag, array offset: 0x120, array step: 0x4

◆ param

__I uint32 chip::gpio::Register::param

Parameter, offset: 0x4

◆ pcor

__O uint32 chip::gpio::Register::pcor

Port Clear Output, offset: 0x48

◆ pddr

__IO uint32 chip::gpio::Register::pddr

Port Data Direction, offset: 0x54

◆ pdir

__I uint32 chip::gpio::Register::pdir

Port Data Input, offset: 0x50

◆ pdor

__IO uint32 chip::gpio::Register::pdor

Port Data Output, offset: 0x40

◆ pdr

__IO uint8 chip::gpio::Register::pdr[32]

Pin Data, array offset: 0x60, array step: 0x1

◆ pidr

__IO uint32 chip::gpio::Register::pidr

Port Input Disable, offset: 0x58

◆ psor

__O uint32 chip::gpio::Register::psor

Port Set Output, offset: 0x44

◆ ptor

__O uint32 chip::gpio::Register::ptor

Port Toggle Output, offset: 0x4C

◆ verid

__I uint32 chip::gpio::Register::verid

Version ID, offset: 0x0

此結構(structure) 文件是由下列檔案中產生:

gpio/Register.h

公開屬性