mFrame
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複合項目 | |
class | Reset |
列舉型態 | |
enum struct | Control : unsigned short { INPUTMUX0 = (0U | (0U)) , I3C0 = (0U | (1U)) , CTIMER0 = (0U | (2U)) , CTIMER1 = (0U | (3U)) , CTIMER2 = (0U | (4U)) , FREQME = (0U | (5U)) , UTICK0 = (0U | (6U)) , DMA = (0U | (8U)) , AOI0 = (0U | (9U)) , CRC = (0U | (10U)) , EIM = (0U | (11U)) , ERM = (0U | (12U)) , LPI2C0 = (0U | (16U)) , LPSPI0 = (0U | (17U)) , LPSPI1 = (0U | (18U)) , LPUART0 = (0U | (19U)) , LPUART1 = (0U | (20U)) , LPUART2 = (0U | (21U)) , USB0 = (0U | (22U)) , QDC0 = (0U | (23U)) , FLEXPWM0 = (0U | (24U)) , OSTIMER0 = (0U | (25U)) , ADC0 = (0U | (26U)) , CMP1 = (0U | (28U)) , PORT0 = (0U | (29U)) , PORT1 = (0U | (30U)) , PORT2 = (0U | (31U)) , PORT3 = ((1U << 8U) | (0U)) , ATX0 = ((1U << 8U) | (1U)) , GPIO0 = ((1U << 8U) | (5U)) , GPIO1 = ((1U << 8U) | (6U)) , GPIO2 = ((1U << 8U) | (7U)) , GPIO3 = ((1U << 8U) | (8U)) , NOT_AVAIL = (0xFFFFU) } |
函式 | |
constexpr unsigned short | operator+ (Control e) |
Copyright (c) 2020 ZxyKira All rights reserved.
SPDX-License-Identifier: MIT
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strong |