LPSPI.h

 
#ifndef MCXA153_583C3F5F_8E58_4CB0_A8F8_21DC5B4205F9
#define MCXA153_583C3F5F_8E58_4CB0_A8F8_21DC5B4205F9
 
/* ***************************************************************************************
 * Include
 */
#include "mframe.h"
 
//----------------------------------------------------------------------------------------
#include "./../Processor.h"
#include "./../lpspi/Mask.h"
#include "./../lpspi/Register.h"
#include "./../lpspi/Shift.h"
 
//----------------------------------------------------------------------------------------
 
/* ***************************************************************************************
 * Namespace
 */
namespace mcxa153::chip::lpspi {
  class LPSPI;
  Register* const LPSPI0 =
      reinterpret_cast<Register*>(mcxa153::chip::Processor::BASE_LPSPI0);
      
  Register* const LPSPI1 =
      reinterpret_cast<Register*>(mcxa153::chip::Processor::BASE_LPSPI1);
}  // namespace mcxa153::chip::lpspi
 
/* ***************************************************************************************
 * Class/Interface/Struct/Enum
 */
 
class mcxa153::chip::lpspi::LPSPI : public ufm::lang::NonInstantiable {
  /* *************************************************************************************
   * Variable
   */
 
  /* *************************************************************************************
   * Abstract Method
   */
 
  /* *************************************************************************************
   * Construct Method
   */
 protected:
  virtual ~LPSPI(void) override = default;
 
  /* *************************************************************************************
   * Operator Method
   */
 
  /* *************************************************************************************
   * Override Method
   */
 
  /* *************************************************************************************
   * Public Method
   */
 
  /* *************************************************************************************
   * Protected Method
   */
 
  /* *************************************************************************************
   * Private Method
   */
 
  /* *************************************************************************************
   * Static Variable
   */
 
  /* *************************************************************************************
   * Static Method
   */
 public:
  static inline constexpr uint32 VERID_FEATURE(uint32 value) {
    return ((value << +Shift::VERID_FEATURE) & +Mask::VERID_FEATURE);
  }
 
  static inline constexpr uint32 VERID_MINOR(uint32 value) {
    return ((value << +Shift::VERID_MINOR) & +Mask::VERID_MINOR);
  }
 
  static inline constexpr uint32 VERID_MAJOR(uint32 value) {
    return ((value << +Shift::VERID_MAJOR) & +Mask::VERID_MAJOR);
  }
 
  static inline constexpr uint32 PARAM_TXFIFO(uint32 value) {
    return ((value << +Shift::PARAM_TXFIFO) & +Mask::PARAM_TXFIFO);
  }
 
  static inline constexpr uint32 PARAM_RXFIFO(uint32 value) {
    return ((value << +Shift::PARAM_RXFIFO) & +Mask::PARAM_RXFIFO);
  }
 
  static inline constexpr uint32 PARAM_PCSNUM(uint32 value) {
    return ((value << +Shift::PARAM_PCSNUM) & +Mask::PARAM_PCSNUM);
  }
 
  static inline constexpr uint32 CR_MEN(uint32 value) {
    return ((value << +Shift::CR_MEN) & +Mask::CR_MEN);
  }
 
  static inline constexpr uint32 CR_RST(uint32 value) {
    return ((value << +Shift::CR_RST) & +Mask::CR_RST);
  }
 
  static inline constexpr uint32 CR_DBGEN(uint32 value) {
    return ((value << +Shift::CR_DBGEN) & +Mask::CR_DBGEN);
  }
 
  static inline constexpr uint32 CR_RTF(uint32 value) {
    return ((value << +Shift::CR_RTF) & +Mask::CR_RTF);
  }
 
  static inline constexpr uint32 CR_RRF(uint32 value) {
    return ((value << +Shift::CR_RRF) & +Mask::CR_RRF);
  }
 
  static inline constexpr uint32 SR_TDF(uint32 value) {
    return ((value << +Shift::SR_TDF) & +Mask::SR_TDF);
  }
 
  static inline constexpr uint32 SR_RDF(uint32 value) {
    return ((value << +Shift::SR_RDF) & +Mask::SR_RDF);
  }
 
  static inline constexpr uint32 SR_WCF(uint32 value) {
    return ((value << +Shift::SR_WCF) & +Mask::SR_WCF);
  }
 
  static inline constexpr uint32 SR_FCF(uint32 value) {
    return ((value << +Shift::SR_FCF) & +Mask::SR_FCF);
  }
 
  static inline constexpr uint32 SR_TCF(uint32 value) {
    return ((value << +Shift::SR_TCF) & +Mask::SR_TCF);
  }
 
  static inline constexpr uint32 SR_TEF(uint32 value) {
    return ((value << +Shift::SR_TEF) & +Mask::SR_TEF);
  }
 
  static inline constexpr uint32 SR_REF(uint32 value) {
    return ((value << +Shift::SR_REF) & +Mask::SR_REF);
  }
 
  static inline constexpr uint32 SR_DMF(uint32 value) {
    return ((value << +Shift::SR_DMF) & +Mask::SR_DMF);
  }
 
  static inline constexpr uint32 SR_MBF(uint32 value) {
    return ((value << +Shift::SR_MBF) & +Mask::SR_MBF);
  }
 
  static inline constexpr uint32 IER_TDIE(uint32 value) {
    return ((value << +Shift::IER_TDIE) & +Mask::IER_TDIE);
  }
 
  static inline constexpr uint32 IER_RDIE(uint32 value) {
    return ((value << +Shift::IER_RDIE) & +Mask::IER_RDIE);
  }
 
  static inline constexpr uint32 IER_WCIE(uint32 value) {
    return ((value << +Shift::IER_WCIE) & +Mask::IER_WCIE);
  }
 
  static inline constexpr uint32 IER_FCIE(uint32 value) {
    return ((value << +Shift::IER_FCIE) & +Mask::IER_FCIE);
  }
 
  static inline constexpr uint32 IER_TCIE(uint32 value) {
    return ((value << +Shift::IER_TCIE) & +Mask::IER_TCIE);
  }
 
  static inline constexpr uint32 IER_TEIE(uint32 value) {
    return ((value << +Shift::IER_TEIE) & +Mask::IER_TEIE);
  }
 
  static inline constexpr uint32 IER_REIE(uint32 value) {
    return ((value << +Shift::IER_REIE) & +Mask::IER_REIE);
  }
 
  static inline constexpr uint32 IER_DMIE(uint32 value) {
    return ((value << +Shift::IER_DMIE) & +Mask::IER_DMIE);
  }
 
  static inline constexpr uint32 DER_TDDE(uint32 value) {
    return ((value << +Shift::DER_TDDE) & +Mask::DER_TDDE);
  }
 
  static inline constexpr uint32 DER_RDDE(uint32 value) {
    return ((value << +Shift::DER_RDDE) & +Mask::DER_RDDE);
  }
 
  static inline constexpr uint32 DER_FCDE(uint32 value) {
    return ((value << +Shift::DER_FCDE) & +Mask::DER_FCDE);
  }
 
  static inline constexpr uint32 CFGR0_HREN(uint32 value) {
    return ((value << +Shift::CFGR0_HREN) & +Mask::CFGR0_HREN);
  }
 
  static inline constexpr uint32 CFGR0_HRPOL(uint32 value) {
    return ((value << +Shift::CFGR0_HRPOL) & +Mask::CFGR0_HRPOL);
  }
 
  static inline constexpr uint32 CFGR0_HRSEL(uint32 value) {
    return ((value << +Shift::CFGR0_HRSEL) & +Mask::CFGR0_HRSEL);
  }
 
  static inline constexpr uint32 CFGR0_HRDIR(uint32 value) {
    return ((value << +Shift::CFGR0_HRDIR) & +Mask::CFGR0_HRDIR);
  }
 
  static inline constexpr uint32 CFGR0_CIRFIFO(uint32 value) {
    return ((value << +Shift::CFGR0_CIRFIFO) & +Mask::CFGR0_CIRFIFO);
  }
 
  static inline constexpr uint32 CFGR0_RDMO(uint32 value) {
    return ((value << +Shift::CFGR0_RDMO) & +Mask::CFGR0_RDMO);
  }
 
  static inline constexpr uint32 CFGR1_MASTER(uint32 value) {
    return ((value << +Shift::CFGR1_MASTER) & +Mask::CFGR1_MASTER);
  }
 
  static inline constexpr uint32 CFGR1_SAMPLE(uint32 value) {
    return ((value << +Shift::CFGR1_SAMPLE) & +Mask::CFGR1_SAMPLE);
  }
 
  static inline constexpr uint32 CFGR1_AUTOPCS(uint32 value) {
    return ((value << +Shift::CFGR1_AUTOPCS) & +Mask::CFGR1_AUTOPCS);
  }
 
  static inline constexpr uint32 CFGR1_NOSTALL(uint32 value) {
    return ((value << +Shift::CFGR1_NOSTALL) & +Mask::CFGR1_NOSTALL);
  }
 
  static inline constexpr uint32 CFGR1_PARTIAL(uint32 value) {
    return ((value << +Shift::CFGR1_PARTIAL) & +Mask::CFGR1_PARTIAL);
  }
 
  static inline constexpr uint32 CFGR1_PCSPOL(uint32 value) {
    return ((value << +Shift::CFGR1_PCSPOL) & +Mask::CFGR1_PCSPOL);
  }
 
  static inline constexpr uint32 CFGR1_MATCFG(uint32 value) {
    return ((value << +Shift::CFGR1_MATCFG) & +Mask::CFGR1_MATCFG);
  }
 
  static inline constexpr uint32 CFGR1_PINCFG(uint32 value) {
    return ((value << +Shift::CFGR1_PINCFG) & +Mask::CFGR1_PINCFG);
  }
 
  static inline constexpr uint32 CFGR1_OUTCFG(uint32 value) {
    return ((value << +Shift::CFGR1_OUTCFG) & +Mask::CFGR1_OUTCFG);
  }
 
  static inline constexpr uint32 CFGR1_PCSCFG(uint32 value) {
    return ((value << +Shift::CFGR1_PCSCFG) & +Mask::CFGR1_PCSCFG);
  }
 
  static inline constexpr uint32 DMR0_MATCH0(uint32 value) {
    return ((value << +Shift::DMR0_MATCH0) & +Mask::DMR0_MATCH0);
  }
 
  /*
   * @brief DMR1 - MATCH1
   *
   * Data Match 1 - Match 1 Value
   */
  static inline constexpr uint32 DMR1_MATCH1(uint32 value) {
    return ((value << +Shift::DMR1_MATCH1) & +Mask::DMR1_MATCH1);
  }
 
  static inline constexpr uint32 CCR_SCKDIV(uint32 value) {
    return ((value << +Shift::CCR_SCKDIV) & +Mask::CCR_SCKDIV);
  }
 
  static inline constexpr uint32 CCR_DBT(uint32 value) {
    return ((value << +Shift::CCR_DBT) & +Mask::CCR_DBT);
  }
 
  static inline constexpr uint32 CCR_PCSSCK(uint32 value) {
    return ((value << +Shift::CCR_PCSSCK) & +Mask::CCR_PCSSCK);
  }
 
  static inline constexpr uint32 CCR_SCKPCS(uint32 value) {
    return ((value << +Shift::CCR_SCKPCS) & +Mask::CCR_SCKPCS);
  }
 
  static inline constexpr uint32 CCR1_SCKSET(uint32 value) {
    return ((value << +Shift::CCR1_SCKSET) & +Mask::CCR1_SCKSET);
  }
 
  static inline constexpr uint32 CCR1_SCKHLD(uint32 value) {
    return ((value << +Shift::CCR1_SCKHLD) & +Mask::CCR1_SCKHLD);
  }
 
  static inline constexpr uint32 CCR1_PCSPCS(uint32 value) {
    return ((value << +Shift::CCR1_PCSPCS) & +Mask::CCR1_PCSPCS);
  }
 
  static inline constexpr uint32 CCR1_SCKSCK(uint32 value) {
    return ((value << +Shift::CCR1_SCKSCK) & +Mask::CCR1_SCKSCK);
  }
 
  static inline constexpr uint32 FCR_TXWATER(uint32 value) {
    return ((value << +Shift::FCR_TXWATER) & +Mask::FCR_TXWATER);
  }
 
  static inline constexpr uint32 FCR_RXWATER(uint32 value) {
    return ((value << +Shift::FCR_RXWATER) & +Mask::FCR_RXWATER);
  }
 
  static inline constexpr uint32 FSR_TXCOUNT(uint32 value) {
    return ((value << +Shift::FSR_TXCOUNT) & +Mask::FSR_TXCOUNT);
  }
 
  static inline constexpr uint32 FSR_RXCOUNT(uint32 value) {
    return ((value << +Shift::FSR_RXCOUNT) & +Mask::FSR_RXCOUNT);
  }
 
  static inline constexpr uint32 TCR_FRAMESZ(uint32 value) {
    return ((value << +Shift::TCR_FRAMESZ) & +Mask::TCR_FRAMESZ);
  }
 
  static inline constexpr uint32 TCR_WIDTH(uint32 value) {
    return ((value << +Shift::TCR_WIDTH) & +Mask::TCR_WIDTH);
  }
 
  static inline constexpr uint32 TCR_TXMSK(uint32 value) {
    return ((value << +Shift::TCR_TXMSK) & +Mask::TCR_TXMSK);
  }
 
  static inline constexpr uint32 TCR_RXMSK(uint32 value) {
    return ((value << +Shift::TCR_RXMSK) & +Mask::TCR_RXMSK);
  }
 
  static inline constexpr uint32 TCR_CONTC(uint32 value) {
    return ((value << +Shift::TCR_CONTC) & +Mask::TCR_CONTC);
  }
 
  static inline constexpr uint32 TCR_CONT(uint32 value) {
    return ((value << +Shift::TCR_CONT) & +Mask::TCR_CONT);
  }
 
  static inline constexpr uint32 TCR_BYSW(uint32 value) {
    return ((value << +Shift::TCR_BYSW) & +Mask::TCR_BYSW);
  }
 
  static inline constexpr uint32 TCR_LSBF(uint32 value) {
    return ((value << +Shift::TCR_LSBF) & +Mask::TCR_LSBF);
  }
 
  static inline constexpr uint32 TCR_PCS(uint32 value) {
    return ((value << +Shift::TCR_PCS) & +Mask::TCR_PCS);
  }
 
  static inline constexpr uint32 TCR_PRESCALE(uint32 value) {
    return ((value << +Shift::TCR_PRESCALE) & +Mask::TCR_PRESCALE);
  }
 
  static inline constexpr uint32 TCR_CPHA(uint32 value) {
    return ((value << +Shift::TCR_CPHA) & +Mask::TCR_CPHA);
  }
 
  static inline constexpr uint32 TCR_CPOL(uint32 value) {
    return ((value << +Shift::TCR_CPOL) & +Mask::TCR_CPOL);
  }
 
  static inline constexpr uint32 TDR_DATA(uint32 value) {
    return ((value << +Shift::TDR_DATA) & +Mask::TDR_DATA);
  }
 
  static inline constexpr uint32 RSR_SOF(uint32 value) {
    return ((value << +Shift::RSR_SOF) & +Mask::RSR_SOF);
  }
 
  static inline constexpr uint32 RSR_RXEMPTY(uint32 value) {
    return ((value << +Shift::RSR_RXEMPTY) & +Mask::RSR_RXEMPTY);
  }
 
  static inline constexpr uint32 RDR_DATA(uint32 value) {
    return ((value << +Shift::RDR_DATA) & +Mask::RDR_DATA);
  }
 
  static inline constexpr uint32 RDROR_DATA(uint32 value) {
    return ((value << +Shift::RDROR_DATA) & +Mask::RDROR_DATA);
  }
 
  static inline constexpr uint32 TCBR_DATA(uint32 value) {
    return ((value << +Shift::TCBR_DATA) & +Mask::TCBR_DATA);
  }
 
  static inline constexpr uint32 TDBR_DATA(uint32 value) {
    return ((value << +Shift::TDBR_DATA) & +Mask::TDBR_DATA);
  }
 
  static inline constexpr uint32 RDBR_DATA(uint32 value) {
    return ((value << +Shift::RDBR_DATA) & +Mask::RDBR_DATA);
  }
};
 
/* ***************************************************************************************
 * End of file
 */
 
#endif /* MCXA153_583C3F5F_8E58_4CB0_A8F8_21DC5B4205F9 */