mcxa153::core::glikey 命名空間(Namespace)參考文件

列舉型態
enum struct	Mask : unsigned int {   CTRL_0_WRITE_INDEX = 0x000000FFU , CTRL_0_RESERVED15 = 0x0000FF00U , CTRL_0_WR_EN_0 = 0x00030000U , CTRL_0_SFT_RST = 0x00040000U ,   CTRL_0_RESERVED31 = 0xFFF80000U , CTRL_1_READ_INDEX = 0x000000FFU , CTRL_1_RESERVED15 = 0x0000FF00U , CTRL_1_WR_EN_1 = 0x00030000U ,   CTRL_1_SFR_LOCK = 0x003C0000U , CTRL_1_RESERVED31 = 0xFFC00000U , INTR_CTRL_INT_EN = 0x00000001U , INTR_CTRL_INT_CLR = 0x00000002U ,   INTR_CTRL_INT_SET = 0x00000004U , INTR_CTRL_RESERVED31 = 0xFFFFFFF8U , STATUS_INT_STATUS = 0x00000001U , STATUS_LOCK_STATUS = 0x00000002U ,   STATUS_ERROR_STATUS = 0x0000001CU , STATUS_RESERVED18 = 0x0007FFE0U , STATUS_FSM_STATE = 0xFFF80000U , VERSION_RESERVED3 = 0x0000000FU ,   VERSION_RESERVED7 = 0x000000F0U , VERSION_RESERVED11 = 0x00000F00U , VERSION_RESERVED15 = 0x0000F000U , VERSION_RESERVED16 = 0x00030000U ,   VERSION_FSM_CONFIG = 0x00040000U , VERSION_INDEX_CONFIG = 0x07F80000U , VERSION_RESERVED31 = 0xF8000000U }
	GLIKEY_Register_Masks GLIKEY Register Masks. 更多...
enum struct	Shift : unsigned int {   CTRL_0_WRITE_INDEX = 0U , CTRL_0_RESERVED15 = 8U , CTRL_0_WR_EN_0 = 16U , CTRL_0_SFT_RST = 18U ,   CTRL_0_RESERVED31 = 19U , CTRL_1_READ_INDEX = 0U , CTRL_1_RESERVED15 = 8U , CTRL_1_WR_EN_1 = 16U ,   CTRL_1_SFR_LOCK = 18U , CTRL_1_RESERVED31 = 22U , INTR_CTRL_INT_EN = 0U , INTR_CTRL_INT_CLR = 1U ,   INTR_CTRL_INT_SET = 2U , INTR_CTRL_RESERVED31 = 3U , STATUS_INT_STATUS = 0U , STATUS_LOCK_STATUS = 1U ,   STATUS_ERROR_STATUS = 2U , STATUS_RESERVED18 = 5U , STATUS_FSM_STATE = 19U , VERSION_RESERVED3 = 0U ,   VERSION_RESERVED7 = 4U , VERSION_RESERVED11 = 8U , VERSION_RESERVED15 = 12U , VERSION_RESERVED16 = 16U ,   VERSION_FSM_CONFIG = 18U , VERSION_INDEX_CONFIG = 19U , VERSION_RESERVED31 = 27U }
	GLIKEY Shift Register - Hardware Register Bit Position Definition. 更多...

函式
constexpr unsigned int	operator+ (Mask e)
constexpr unsigned int	operator+ (Shift e)
	Shift Operator - Convert enum to unsigned int.

詳細描述

Copyright (c) 2020 ZxyKira All rights reserved.

SPDX-License-Identifier: MIT

列舉型態說明文件

Mask

enum struct mcxa153::core::glikey::Mask : unsigned int

strong

GLIKEY_Register_Masks GLIKEY Register Masks.

列舉值
CTRL_0_WRITE_INDEX	CTRL_0 - WRITE_INDEX. Control Register 0 SFR - Write Index
CTRL_0_RESERVED15	CTRL_0 - RESERVED15. Control Register 0 SFR - Reserved for Future Use
CTRL_0_WR_EN_0	CTRL_0 - WR_EN_0. Control Register 0 SFR - Write Enable 0
CTRL_0_SFT_RST	CTRL_0 - SFT_RST. Control Register 0 SFR - Soft reset for the core reset (SFR configuration will be preseved).This register reads as 0 [0b0]No effect [0b1]Triggers the soft reset
CTRL_0_RESERVED31	CTRL_0 - RESERVED31. Control Register 0 SFR - Reserved for Future Use
CTRL_1_READ_INDEX	CTRL_1 - READ_INDEX. Control Regsiter 1 SFR - Index status, Writing an index value to this register will request the block to return the lock status of this index.
CTRL_1_RESERVED15	CTRL_1 - RESERVED15. Control Regsiter 1 SFR - Reserved for Future Use
CTRL_1_WR_EN_1	CTRL_1 - WR_EN_1. Control Regsiter 1 SFR - Write Enable One
CTRL_1_SFR_LOCK	CTRL_1 - SFR_LOCK. Control Regsiter 1 SFR - LOCK register for GLIKEY
CTRL_1_RESERVED31	CTRL_1 - RESERVED31. Control Regsiter 1 SFR - Reserved for Future Use
INTR_CTRL_INT_EN	INTR_CTRL - INT_EN. Interrupt Control - Interrupt Enable. Writing a 1, Interrupt asserts on Interrupt output port
INTR_CTRL_INT_CLR	INTR_CTRL - INT_CLR. Interrupt Control - Interrupt Clear. Writing a 1 to this register creates a single interrupt clear pulse. This register reads as 0
INTR_CTRL_INT_SET	INTR_CTRL - INT_SET. Interrupt Control - Interrupt Set. Writing a 1 to this register asserts the interrupt. This register reads as 0 [0b0]No effect [0b1]Triggers interrupt
INTR_CTRL_RESERVED31	INTR_CTRL - RESERVED31. Interrupt Control - Reserved for Future Use
STATUS_INT_STATUS	STATUS - INT_STATUS. Status - Interrupt Status. [0b0]No effect [0b1]Triggers interrupt
STATUS_LOCK_STATUS	STATUS - LOCK_STATUS. Status - Provides the current lock status of indexes. [0b0]Current read index is not locked [0b1]Current read index is locked
STATUS_ERROR_STATUS	STATUS - ERROR_STATUS. Status - Status of the Error [0b000]No error [0b001]FSM error has occurred [0b010]Write index out of the bound (OOB) error [0b011]Write index OOB and FSM error [0b100]Read index OOB error [0b110]Write index and read index OOB error [0b111]Read index OOB, write index OOB, and FSM error
STATUS_RESERVED18	STATUS - RESERVED18. Status - Reserved for Future Use
STATUS_FSM_STATE	STATUS - FSM_STATE. Status - Status of FSM
VERSION_RESERVED3	VERSION - Reserved3. IP Version - Reserved
VERSION_RESERVED7	VERSION - Reserved7. IP Version - Reserved
VERSION_RESERVED11	VERSION - Reserved11. IP Version - Reserved
VERSION_RESERVED15	VERSION - Reserved15. IP Version - Reserved
VERSION_RESERVED16	VERSION - Reserved16. IP Version - Reserved
VERSION_FSM_CONFIG	VERSION - FSM_CONFIG. IP Version [0]4 step [1]8 step
VERSION_INDEX_CONFIG	VERSION - INDEX_CONFIG. IP Version - Configured number of addressable indexes
VERSION_RESERVED31	VERSION - Reserved31. IP Version - Reserved for Future Use

Shift

enum struct mcxa153::core::glikey::Shift : unsigned int

strong

GLIKEY Shift Register - Hardware Register Bit Position Definition.

GLIKEY Control and Status Register Bit Shift Definition GLIKEY控制與狀態寄存器位元位移定義

自

v1.0.0

列舉值
CTRL_0_WRITE_INDEX	CTRL_0 WRITE_INDEX - Write Index Control. Control Register 0 SFR Write Index Field 控制寄存器0 SFR寫入索引欄位
CTRL_0_RESERVED15	CTRL_0 RESERVED15 - Reserved Field. Control Register 0 SFR Reserved Field For Future Use 控制寄存器0 SFR保留欄位供未來使用
CTRL_0_WR_EN_0	CTRL_0 WR_EN_0 - Write Enable 0. Control Register 0 SFR Write Enable Field 控制寄存器0 SFR寫入啟用欄位
CTRL_0_SFT_RST	CTRL_0 SFT_RST - Soft Reset. Control Register 0 SFR Soft Reset Field 控制寄存器0 SFR軟重置欄位 [0b0] No effect 無效 [0b1] Triggers the soft reset 觸發軟重置
CTRL_0_RESERVED31	CTRL_0 RESERVED31 - Reserved Field. Control Register 0 SFR Reserved Field For Future Use 控制寄存器0 SFR保留欄位供未來使用
CTRL_1_READ_INDEX	CTRL_1 READ_INDEX - Read Index Control. Control Register 1 SFR Read Index Field 控制寄存器1 SFR讀取索引欄位
CTRL_1_RESERVED15	CTRL_1 RESERVED15 - Reserved Field. Control Register 1 SFR Reserved Field For Future Use 控制寄存器1 SFR保留欄位供未來使用
CTRL_1_WR_EN_1	CTRL_1 WR_EN_1 - Write Enable 1. Control Register 1 SFR Write Enable Field 控制寄存器1 SFR寫入啟用欄位
CTRL_1_SFR_LOCK	CTRL_1 SFR_LOCK - Lock Register. Control Register 1 SFR Lock Field 控制寄存器1 SFR鎖定欄位
CTRL_1_RESERVED31	CTRL_1 RESERVED31 - Reserved Field. Control Register 1 SFR Reserved Field For Future Use 控制寄存器1 SFR保留欄位供未來使用
INTR_CTRL_INT_EN	INTR_CTRL INT_EN - Interrupt Enable. Interrupt Control Register Interrupt Enable Field 中斷控制寄存器中斷啟用欄位
INTR_CTRL_INT_CLR	INTR_CTRL INT_CLR - Interrupt Clear. Interrupt Control Register Interrupt Clear Field 中斷控制寄存器中斷清除欄位
INTR_CTRL_INT_SET	INTR_CTRL INT_SET - Interrupt Set. Interrupt Control Register Interrupt Set Field 中斷控制寄存器中斷設置欄位 [0b0] No effect 無效 [0b1] Triggers interrupt 觸發中斷
INTR_CTRL_RESERVED31	INTR_CTRL RESERVED31 - Reserved Field. Interrupt Control Register Reserved Field For Future Use 中斷控制寄存器保留欄位供未來使用
STATUS_INT_STATUS	STATUS INT_STATUS - Interrupt Status. Status Register Interrupt Status Field 狀態寄存器中斷狀態欄位 [0b0] No effect 無效 [0b1] Triggers interrupt 觸發中斷
STATUS_LOCK_STATUS	STATUS LOCK_STATUS - Lock Status. Status Register Lock Status Field 狀態寄存器鎖定狀態欄位 [0b0] Current read index is not locked 當前讀取索引未鎖定 [0b1] Current read index is locked 當前讀取索引已鎖定
STATUS_ERROR_STATUS	STATUS ERROR_STATUS - Error Status. Status Register Error Status Field 狀態寄存器錯誤狀態欄位 [0b000] No error 無錯誤 [0b001] FSM error has occurred 發生FSM錯誤 [0b010] Write index out of the bound (OOB) error 寫入索引超出範圍錯誤 [0b011] Write index OOB and FSM error 寫入索引超出範圍及FSM錯誤 [0b100] Read index OOB error 讀取索引超出範圍錯誤 [0b110] Write index and read index OOB error 寫入索引及讀取索引超出範圍錯誤 [0b111] Read index OOB, write index OOB, and FSM error 讀取索引超出範圍、寫入索引超出範圍及FSM錯誤
STATUS_RESERVED18	STATUS RESERVED18 - Reserved Field. Status Register Reserved Field For Future Use 狀態寄存器保留欄位供未來使用
STATUS_FSM_STATE	STATUS FSM_STATE - FSM State. Status Register FSM State Field 狀態寄存器FSM狀態欄位
VERSION_RESERVED3	VERSION Reserved3 - Reserved Field. IP Version Reserved Field For Future Use IP版本保留欄位供未來使用
VERSION_RESERVED7	VERSION Reserved7 - Reserved Field. IP Version Reserved Field For Future Use IP版本保留欄位供未來使用
VERSION_RESERVED11	VERSION Reserved11 - Reserved Field. IP Version Reserved Field For Future Use IP版本保留欄位供未來使用
VERSION_RESERVED15	VERSION Reserved15 - Reserved Field. IP Version Reserved Field For Future Use IP版本保留欄位供未來使用
VERSION_RESERVED16	VERSION Reserved16 - Reserved Field. IP Version Reserved Field For Future Use IP版本保留欄位供未來使用
VERSION_FSM_CONFIG	VERSION FSM_CONFIG - FSM Configuration. IP Version FSM Configuration Field IP版本FSM配置欄位 [0b0] 4-step FSM 4步驟FSM [0b1] 8-step FSM 8步驟FSM
VERSION_INDEX_CONFIG	VERSION INDEX_CONFIG - Index Configuration. IP Version Addressable Index Configuration IP版本可定址索引配置
VERSION_RESERVED31	VERSION Reserved31 - Reserved Field. IP Version Reserved Field For Future Use IP版本保留欄位供未來使用

函式說明文件

operator+()

unsigned int mcxa153::core::glikey::operator+ ( Shift e )

constexpr

Shift Operator - Convert enum to unsigned int.

Convert Shift enumeration to unsigned integer value 將Shift列舉轉換為無符號整數值

參數

e	Shift enumeration value 列舉值

傳回值

constexpr unsigned int Converted unsigned integer 轉換後的無符號整數