ADCIN.h

 
#ifndef MCXA153_0753561E_648A_406F_8D83_D563EDF67C1D
#define MCXA153_0753561E_648A_406F_8D83_D563EDF67C1D
 
/* ***************************************************************************************
 * Include
 */
#include "mframe.h"
 
//----------------------------------------------------------------------------------------
#include "./../../../core/mux/Mux.h"
 
//----------------------------------------------------------------------------------------
 
/* ***************************************************************************************
 * Namespace
 */
namespace mcxa153::core::mux::adc0 {
  enum struct ADCIN : uint32;
 
  constexpr mcxa153::core::mux::Mux operator+(ADCIN e) {
    return static_cast<core::mux::Mux>(e);
  }
}  // namespace mcxa153::core::mux::adc0
 
/* ***************************************************************************************
 * Class/Interface/Struct/Enum
 */
 
enum struct mcxa153::core::mux::adc0::ADCIN : uint32 {
  A0  = +core::mux::Mux::P2_0_GPIO,
  A1  = +core::mux::Mux::P2_1_GPIO,
  A2  = +core::mux::Mux::P2_3_GPIO,
  A3  = +core::mux::Mux::P2_6_GPIO,
  A4  = +core::mux::Mux::P2_2_GPIO,
  A5  = +core::mux::Mux::P2_12_GPIO,
  A6  = +core::mux::Mux::P2_16_GPIO,
  A7  = +core::mux::Mux::P2_7_GPIO,
  A8  = +core::mux::Mux::P1_10_GPIO,
  A9  = +core::mux::Mux::P1_11_GPIO,
  A10 = +core::mux::Mux::P1_12_GPIO,
  A11 = +core::mux::Mux::P1_13_GPIO,
  A12 = +core::mux::Mux::P3_31_GPIO,
  A13 = +core::mux::Mux::P3_30_GPIO,
  A14 = +core::mux::Mux::P3_29_GPIO,
  A15 = +core::mux::Mux::P0_6_GPIO,
  A16 = +core::mux::Mux::P1_0_GPIO,
  A17 = +core::mux::Mux::P1_1_GPIO,
  A18 = +core::mux::Mux::P1_2_GPIO,
  A19 = +core::mux::Mux::P1_3_GPIO,
  A20 = +core::mux::Mux::P1_4_GPIO,
  A21 = +core::mux::Mux::P1_5_GPIO,
  A22 = +core::mux::Mux::P1_6_GPIO,
  A23 = +core::mux::Mux::P1_7_GPIO
};
 
/* ***************************************************************************************
 * End of file
 */
 
#endif /* MCXA153_0753561E_648A_406F_8D83_D563EDF67C1D */