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mcxa153::chip::ostimer::Register 結構 參考文件

OSTIMER (On-chip System Timer) Peripheral Register Structure. 更多...

#include <Register.h>

公開屬性

__I uint32 evtimerl
 Event Timer Low Register (32-bit)
 
__I uint32 evtimerh
 Event Timer High Register (10-bit effective)
 
__I uint32 capture_l
 Capture Low Register (32-bit)
 
__I uint32 capture_h
 Capture High Register (10-bit effective)
 
__IO uint32 match_l
 Match Low Register (32-bit)
 
__IO uint32 match_h
 Match High Register (10-bit effective)
 
uint8 reserved0 [4]
 Reserved Space.
 
__IO uint32 osevent_ctrl
 OSTIMER Event Control Register.
 

詳細描述

OSTIMER (On-chip System Timer) Peripheral Register Structure.

Memory-mapped register structure for accessing OSTIMER peripheral registers. The OSTIMER provides a 64-bit system timer with match and capture capabilities for precise timing operations and system scheduling.

OSTIMER周邊暫存器結構體,提供64位元系統計時器功能,具有匹配和捕獲能力, 用於精確計時操作和系統排程。

  • Base Address: Varies by implementation (typically in memory map)
  • Register Width: 32-bit aligned
  • Timer Resolution: 64-bit (42-bit effective)
  • Supports: Match interrupts, Capture events, Debug control
All register accesses should be aligned to 32-bit boundaries
Some registers are read-only, others are read-write
v1.0.0

資料成員說明文件

◆ capture_h

__I uint32 mcxa153::chip::ostimer::Register::capture_h

Capture High Register (10-bit effective)

Upper portion of captured timer value (only lower 10 bits valid). Combined with capture_l provides complete captured timer value.

捕獲計時器值的高位元部分(僅低10位元有效)

  • Offset: 0xC
  • Access: Read-Only (__I)
  • Width: 32-bit (only [9:0] bits used)
  • Reset: 0x00000000
  • Valid Range: 0x000 - 0x3FF
Only bits [9:0] contain valid captured data
Must be read together with capture_l for complete value

◆ capture_l

__I uint32 mcxa153::chip::ostimer::Register::capture_l

Capture Low Register (32-bit)

Lower 32-bit portion of captured timer value. Captures the current timer count when a capture event occurs.

捕獲計時器值的低32位元部分

  • Offset: 0x8
  • Access: Read-Only (__I)
  • Width: 32-bit
  • Reset: 0x00000000
Capture events can be triggered by external signals or software
Value represents timer state at moment of capture

◆ evtimerh

__I uint32 mcxa153::chip::ostimer::Register::evtimerh

Event Timer High Register (10-bit effective)

Upper portion of the 64-bit OSTIMER counter (only lower 10 bits valid). When combined with evtimerl, provides the complete timer count.

64位元OSTIMER計數器的高位元部分(僅低10位元有效)

  • Offset: 0x4
  • Access: Read-Only (__I)
  • Width: 32-bit (only [9:0] bits used)
  • Reset: 0x00000000
  • Valid Range: 0x000 - 0x3FF
Only bits [9:0] contain valid timer data
Upper bits [31:10] should be ignored

◆ evtimerl

__I uint32 mcxa153::chip::ostimer::Register::evtimerl

Event Timer Low Register (32-bit)

Lower 32-bit portion of the 64-bit OSTIMER counter. Contains the current timer count value that increments continuously.

64位元OSTIMER計數器的低32位元部分

  • Offset: 0x0
  • Access: Read-Only (__I)
  • Width: 32-bit
  • Reset: 0x00000000
Combined with evtimerh to form complete 42-bit timer value
Reads are atomic and represent instantaneous timer value

◆ match_h

__IO uint32 mcxa153::chip::ostimer::Register::match_h

Match High Register (10-bit effective)

Upper portion of timer match value (only lower 10 bits valid). Combined with match_l defines complete match compare value.

計時器匹配值的高位元部分(僅低10位元有效)

  • Offset: 0x14
  • Access: Read/Write (__IO)
  • Width: 32-bit (only [9:0] bits used)
  • Reset: 0x000003FF
  • Valid Range: 0x000 - 0x3FF
Only bits [9:0] should be written/are valid
Must be programmed together with match_l

◆ match_l

__IO uint32 mcxa153::chip::ostimer::Register::match_l

Match Low Register (32-bit)

Lower 32-bit portion of timer match value. When timer reaches this value (combined with match_h), generates match event.

計時器匹配值的低32位元部分

  • Offset: 0x10
  • Access: Read/Write (__IO)
  • Width: 32-bit
  • Reset: 0xFFFFFFFF
Check OSEVENT_CTRL.MATCH_WR_RDY before writing
Match events can trigger interrupts if enabled

◆ osevent_ctrl

__IO uint32 mcxa153::chip::ostimer::Register::osevent_ctrl

OSTIMER Event Control Register.

Control and status register for OSTIMER events, interrupts, and configuration. Contains interrupt flags, enable bits, write ready status, and debug control.

OSTIMER事件控制暫存器,用於中斷和配置控制

  • Offset: 0x1C
  • Access: Read/Write (__IO)
  • Width: 32-bit
  • Reset: 0x00000004 (MATCH_WR_RDY = 1)

Bit Fields:

  • [0] OSTIMER_INTRFLAG: Interrupt flag (write 1 to clear)
  • [1] OSTIMER_INTENA: Interrupt enable (0=disabled, 1=enabled)
  • [2] MATCH_WR_RDY: Match write ready flag (read-only)
  • [3] DEBUG_EN: Debug enable (0=halt in debug, 1=continue in debug)
  • [31:4] Reserved
Use appropriate bit masks from Mask.h for bit manipulation
參閱
mcxa153::chip::ostimer::Mask for bit field definitions

◆ reserved0

uint8 mcxa153::chip::ostimer::Register::reserved0[4]

Reserved Space.

Reserved memory space in the register map. These bytes should not be accessed.

暫存器映射中的保留記憶體空間

  • Offset: 0x18-0x1B
  • Size: 4 bytes
  • Access: Should not be accessed
警告
Do not read from or write to this reserved space

此結構(structure) 文件是由下列檔案中產生: