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port/Shift.h
1
7
#ifndef MCXA153_BBD6B536_1670_42A7_8CD2_2C94F33F057D
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#define MCXA153_BBD6B536_1670_42A7_8CD2_2C94F33F057D
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/* ***************************************************************************************
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* Include
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*/
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#include "mframe.h"
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//----------------------------------------------------------------------------------------
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//----------------------------------------------------------------------------------------
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/* ***************************************************************************************
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* Namespace
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*/
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namespace
mcxa153::chip::port
{
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enum struct
Shift
:
unsigned
int;
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34
constexpr
unsigned
int
operator+(
Shift
e) {
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return
static_cast<
unsigned
int
>
(e);
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}
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}
// namespace mcxa153::chip::port
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/* ***************************************************************************************
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* Class/Interface/Struct/Enum
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*/
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enum struct
mcxa153::chip::port::Shift
:
unsigned
int
{
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VERID_FEATURE = 0U,
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72
VERID_MINOR = 16U,
73
80
VERID_MAJOR = 24U,
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88
GPCLR_GPWD
= 0U,
89
100
GPCLR_GPWE0
= 16U,
101
112
GPCLR_GPWE1
= 17U,
113
124
GPCLR_GPWE2
= 18U,
125
136
GPCLR_GPWE3
= 19U,
137
148
GPCLR_GPWE4
= 20U,
149
160
GPCLR_GPWE5
= 21U,
161
172
GPCLR_GPWE6
= 22U,
173
184
GPCLR_GPWE7
= 23U,
185
196
GPCLR_GPWE8
= 24U,
197
208
GPCLR_GPWE9
= 25U,
209
220
GPCLR_GPWE10
= 26U,
221
232
GPCLR_GPWE11
= 27U,
233
244
GPCLR_GPWE12
= 28U,
245
256
GPCLR_GPWE13
= 29U,
257
268
GPCLR_GPWE14
= 30U,
269
280
GPCLR_GPWE15
= 31U,
281
288
GPCHR_GPWD
= 0U,
289
300
GPCHR_GPWE16
= 16U,
301
312
GPCHR_GPWE17
= 17U,
313
324
GPCHR_GPWE18
= 18U,
325
336
GPCHR_GPWE19
= 19U,
337
348
GPCHR_GPWE20
= 20U,
349
360
GPCHR_GPWE21
= 21U,
361
372
GPCHR_GPWE22
= 22U,
373
384
GPCHR_GPWE23
= 23U,
385
396
GPCHR_GPWE24
= 24U,
397
408
GPCHR_GPWE25
= 25U,
409
420
GPCHR_GPWE26
= 26U,
421
432
GPCHR_GPWE27
= 27U,
433
444
GPCHR_GPWE28
= 28U,
445
456
GPCHR_GPWE29
= 29U,
457
468
GPCHR_GPWE30
= 30U,
469
480
GPCHR_GPWE31
= 31U,
481
492
CONFIG_RANGE
= 0U,
493
500
CALIB0_NCAL
= 0U,
501
508
CALIB0_PCAL
= 16U,
509
516
CALIB1_NCAL
= 0U,
517
524
CALIB1_PCAL
= 16U,
525
536
PCR_PS
= 0U,
537
548
PCR_PE
= 1U,
549
560
PCR_PV
= 2U,
561
572
PCR_SRE
= 3U,
573
584
PCR_PFE
= 4U,
585
596
PCR_ODE
= 5U,
597
608
PCR_DSE
= 6U,
609
620
PCR_DSE1
= 7U,
621
656
PCR_MUX
= 8U,
657
668
PCR_IBE
= 12U,
669
680
PCR_INV
= 13U,
681
692
PCR_LK
= 15U
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};
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/* ***************************************************************************************
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* End of file
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*/
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#endif
/* MCXA153_BBD6B536_1670_42A7_8CD2_2C94F33F057D */
mcxa153::chip::port
Definition
Config.h:36
mcxa153::chip::port::Shift
Shift
Shift Enumeration for Port Control Register Bit Positions.
Definition
port/Shift.h:55
mcxa153::chip::port::Mask::GPCLR_GPWE13
@ GPCLR_GPWE13
GPCLR - GPWE13.
mcxa153::chip::port::Mask::PCR_IBE
@ PCR_IBE
PCR - IBE.
mcxa153::chip::port::Mask::GPCLR_GPWE15
@ GPCLR_GPWE15
GPCLR - GPWE15.
mcxa153::chip::port::Mask::GPCLR_GPWE8
@ GPCLR_GPWE8
GPCLR - GPWE8.
mcxa153::chip::port::Mask::PCR_DSE
@ PCR_DSE
PCR - DSE.
mcxa153::chip::port::Mask::GPCLR_GPWE3
@ GPCLR_GPWE3
GPCLR - GPWE3.
mcxa153::chip::port::Mask::PCR_PFE
@ PCR_PFE
PCR - PFE.
mcxa153::chip::port::Mask::GPCHR_GPWE25
@ GPCHR_GPWE25
GPCHR - GPWE25.
mcxa153::chip::port::Mask::GPCHR_GPWE23
@ GPCHR_GPWE23
GPCHR - GPWE23.
mcxa153::chip::port::Mask::PCR_PS
@ PCR_PS
PCR - PS.
mcxa153::chip::port::Mask::GPCLR_GPWE5
@ GPCLR_GPWE5
GPCLR - GPWE5.
mcxa153::chip::port::Mask::GPCHR_GPWE24
@ GPCHR_GPWE24
GPCHR - GPWE24.
mcxa153::chip::port::Mask::GPCHR_GPWE22
@ GPCHR_GPWE22
GPCHR - GPWE22.
mcxa153::chip::port::Mask::CALIB1_NCAL
@ CALIB1_NCAL
CALIB1 - NCAL.
mcxa153::chip::port::Mask::GPCLR_GPWE10
@ GPCLR_GPWE10
GPCLR - GPWE10.
mcxa153::chip::port::Mask::GPCHR_GPWE30
@ GPCHR_GPWE30
GPCHR - GPWE30.
mcxa153::chip::port::Mask::GPCHR_GPWD
@ GPCHR_GPWD
GPCHR - GPWD.
mcxa153::chip::port::Mask::CALIB0_PCAL
@ CALIB0_PCAL
CALIB0 - PCAL.
mcxa153::chip::port::Mask::GPCHR_GPWE20
@ GPCHR_GPWE20
GPCHR - GPWE20.
mcxa153::chip::port::Mask::PCR_INV
@ PCR_INV
PCR - INV.
mcxa153::chip::port::Mask::GPCHR_GPWE31
@ GPCHR_GPWE31
GPCHR - GPWE31.
mcxa153::chip::port::Mask::GPCLR_GPWE2
@ GPCLR_GPWE2
GPCLR - GPWE2.
mcxa153::chip::port::Mask::PCR_ODE
@ PCR_ODE
PCR - ODE.
mcxa153::chip::port::Mask::GPCLR_GPWE1
@ GPCLR_GPWE1
GPCLR - GPWE1.
mcxa153::chip::port::Mask::GPCLR_GPWE11
@ GPCLR_GPWE11
GPCLR - GPWE11.
mcxa153::chip::port::Mask::GPCLR_GPWE7
@ GPCLR_GPWE7
GPCLR - GPWE7.
mcxa153::chip::port::Mask::PCR_SRE
@ PCR_SRE
PCR - SRE.
mcxa153::chip::port::Mask::GPCLR_GPWE12
@ GPCLR_GPWE12
GPCLR - GPWE12.
mcxa153::chip::port::Mask::GPCLR_GPWE14
@ GPCLR_GPWE14
GPCLR - GPWE14.
mcxa153::chip::port::Mask::PCR_PV
@ PCR_PV
PCR - PV.
mcxa153::chip::port::Mask::PCR_MUX
@ PCR_MUX
PCR - MUX.
mcxa153::chip::port::Mask::GPCHR_GPWE28
@ GPCHR_GPWE28
GPCHR - GPWE28.
mcxa153::chip::port::Mask::GPCHR_GPWE27
@ GPCHR_GPWE27
GPCHR - GPWE27.
mcxa153::chip::port::Mask::GPCHR_GPWE16
@ GPCHR_GPWE16
GPCHR - GPWE16.
mcxa153::chip::port::Mask::GPCHR_GPWE19
@ GPCHR_GPWE19
GPCHR - GPWE19.
mcxa153::chip::port::Mask::CALIB0_NCAL
@ CALIB0_NCAL
CALIB0 - NCAL.
mcxa153::chip::port::Mask::GPCLR_GPWD
@ GPCLR_GPWD
GPCLR - GPWD.
mcxa153::chip::port::Mask::GPCHR_GPWE18
@ GPCHR_GPWE18
GPCHR - GPWE18.
mcxa153::chip::port::Mask::GPCLR_GPWE0
@ GPCLR_GPWE0
GPCLR - GPWE0.
mcxa153::chip::port::Mask::CALIB1_PCAL
@ CALIB1_PCAL
CALIB1 - PCAL.
mcxa153::chip::port::Mask::GPCHR_GPWE17
@ GPCHR_GPWE17
GPCHR - GPWE17.
mcxa153::chip::port::Mask::GPCLR_GPWE9
@ GPCLR_GPWE9
GPCLR - GPWE9.
mcxa153::chip::port::Mask::PCR_LK
@ PCR_LK
PCR - LK.
mcxa153::chip::port::Mask::GPCLR_GPWE4
@ GPCLR_GPWE4
GPCLR - GPWE4.
mcxa153::chip::port::Mask::PCR_DSE1
@ PCR_DSE1
PCR - DSE1.
mcxa153::chip::port::Mask::PCR_PE
@ PCR_PE
PCR - PE.
mcxa153::chip::port::Mask::GPCHR_GPWE26
@ GPCHR_GPWE26
GPCHR - GPWE26.
mcxa153::chip::port::Mask::CONFIG_RANGE
@ CONFIG_RANGE
CONFIG - RANGE.
mcxa153::chip::port::Mask::GPCHR_GPWE29
@ GPCHR_GPWE29
GPCHR - GPWE29.
mcxa153::chip::port::Mask::GPCHR_GPWE21
@ GPCHR_GPWE21
GPCHR - GPWE21.
mcxa153::chip::port::Mask::GPCLR_GPWE6
@ GPCLR_GPWE6
GPCLR - GPWE6.
src
mcxa153
src
mcxa153
chip
port
Shift.h
產生者:
1.11.0