34 INPUTMUX0 = (0U | (0U)),
36 CTIMER0 = (0U | (2U)),
37 CTIMER1 = (0U | (3U)),
38 CTIMER2 = (0U | (4U)),
46 LPI2C0 = (0U | (16U)),
47 LPSPI0 = (0U | (17U)),
48 LPSPI1 = (0U | (18U)),
49 LPUART0 = (0U | (19U)),
50 LPUART1 = (0U | (20U)),
51 LPUART2 = (0U | (21U)),
54 FLEXPWM0 = (0U | (24U)),
55 OSTIMER0 = (0U | (25U)),
61 PORT3 = ((1U << 8U) | (0U)),
62 ATX0 = ((1U << 8U) | (1U)),
63 GPIO0 = ((1U << 8U) | (5U)),
64 GPIO1 = ((1U << 8U) | (6U)),
65 GPIO2 = ((1U << 8U) | (7U)),
66 GPIO3 = ((1U << 8U) | (8U)),