gpio/Mask.h

 
#ifndef CHIP_877E35E6_0C95_4696_8789_9DBFDE3FE313
#define CHIP_877E35E6_0C95_4696_8789_9DBFDE3FE313
 
/* ***************************************************************************************
 * Include
 */
 
//----------------------------------------------------------------------------------------
#include "mframe.h"
 
//----------------------------------------------------------------------------------------
 
/* ***************************************************************************************
 * Namespace
 */
namespace chip::gpio {
  enum struct Mask : unsigned int;
 
  constexpr unsigned int operator+(Mask e) {
    return static_cast<unsigned int>(e);
  }
}  // namespace chip::gpio
 
/* ***************************************************************************************
 * Class/Interface/Struct/Enum
 */
enum struct chip::gpio::Mask : unsigned int {
  VERID_FEATURE = 0xFFFFU,
 
  VERID_MINOR = 0xFF0000U,
 
  VERID_MAJOR = 0xFF000000U,
 
  PARAM_IRQNUM = 0xFU,
 
  PDOR_PDO0 = 0x1U,
 
  PDOR_PDO1 = 0x2U,
 
  PDOR_PDO2 = 0x4U,
 
  PDOR_PDO3 = 0x8U,
 
  PDOR_PDO4 = 0x10U,
 
  PDOR_PDO5 = 0x20U,
 
  PDOR_PDO6 = 0x40U,
 
  PDOR_PDO7 = 0x80U,
 
  PDOR_PDO8 = 0x100U,
 
  PDOR_PDO9 = 0x200U,
 
  PDOR_PDO10 = 0x400U,
 
  PDOR_PDO11 = 0x800U,
 
  PDOR_PDO12 = 0x1000U,
 
  PDOR_PDO13 = 0x2000U,
 
  PDOR_PDO14 = 0x4000U,
 
  PDOR_PDO15 = 0x8000U,
 
  PDOR_PDO16 = 0x10000U,
 
  PDOR_PDO17 = 0x20000U,
 
  PDOR_PDO18 = 0x40000U,
 
  PDOR_PDO19 = 0x80000U,
 
  PDOR_PDO20 = 0x100000U,
 
  PDOR_PDO21 = 0x200000U,
 
  PDOR_PDO22 = 0x400000U,
 
  PDOR_PDO23 = 0x800000U,
 
  PDOR_PDO24 = 0x1000000U,
 
  PDOR_PDO25 = 0x2000000U,
 
  PDOR_PDO26 = 0x4000000U,
 
  PDOR_PDO27 = 0x8000000U,
 
  PDOR_PDO28 = 0x10000000U,
 
  PDOR_PDO29 = 0x20000000U,
 
  PDOR_PDO30 = 0x40000000U,
 
  PDOR_PDO31 = 0x80000000U,
 
  PSOR_PTSO0 = 0x1U,
 
  PSOR_PTSO1 = 0x2U,
 
  PSOR_PTSO2 = 0x4U,
 
  PSOR_PTSO3 = 0x8U,
 
  PSOR_PTSO4 = 0x10U,
 
  PSOR_PTSO5 = 0x20U,
 
  PSOR_PTSO6 = 0x40U,
 
  PSOR_PTSO7 = 0x80U,
 
  PSOR_PTSO8 = 0x100U,
 
  PSOR_PTSO9 = 0x200U,
 
  PSOR_PTSO10 = 0x400U,
 
  PSOR_PTSO11 = 0x800U,
 
  PSOR_PTSO12 = 0x1000U,
 
  PSOR_PTSO13 = 0x2000U,
 
  PSOR_PTSO14 = 0x4000U,
 
  PSOR_PTSO15 = 0x8000U,
 
  PSOR_PTSO16 = 0x10000U,
 
  PSOR_PTSO17 = 0x20000U,
 
  PSOR_PTSO18 = 0x40000U,
 
  PSOR_PTSO19 = 0x80000U,
 
  PSOR_PTSO20 = 0x100000U,
 
  PSOR_PTSO21 = 0x200000U,
 
  PSOR_PTSO22 = 0x400000U,
 
  PSOR_PTSO23 = 0x800000U,
 
  PSOR_PTSO24 = 0x1000000U,
 
  PSOR_PTSO25 = 0x2000000U,
 
  PSOR_PTSO26 = 0x4000000U,
 
  PSOR_PTSO27 = 0x8000000U,
 
  PSOR_PTSO28 = 0x10000000U,
 
  PSOR_PTSO29 = 0x20000000U,
 
  PSOR_PTSO30 = 0x40000000U,
 
  PSOR_PTSO31 = 0x80000000U,
 
  PCOR_PTCO0 = 0x1U,
 
  PCOR_PTCO1 = 0x2U,
 
  PCOR_PTCO2 = 0x4U,
 
  PCOR_PTCO3 = 0x8U,
 
  PCOR_PTCO4 = 0x10U,
 
  PCOR_PTCO5 = 0x20U,
 
  PCOR_PTCO6 = 0x40U,
 
  PCOR_PTCO7 = 0x80U,
 
  PCOR_PTCO8 = 0x100U,
 
  PCOR_PTCO9 = 0x200U,
 
  PCOR_PTCO10 = 0x400U,
 
  PCOR_PTCO11 = 0x800U,
 
  PCOR_PTCO12 = 0x1000U,
 
  PCOR_PTCO13 = 0x2000U,
 
  PCOR_PTCO14 = 0x4000U,
 
  PCOR_PTCO15 = 0x8000U,
 
  PCOR_PTCO16 = 0x10000U,
 
  PCOR_PTCO17 = 0x20000U,
 
  PCOR_PTCO18 = 0x40000U,
 
  PCOR_PTCO19 = 0x80000U,
 
  PCOR_PTCO20 = 0x100000U,
 
  PCOR_PTCO21 = 0x200000U,
 
  PCOR_PTCO22 = 0x400000U,
 
  PCOR_PTCO23 = 0x800000U,
 
  PCOR_PTCO24 = 0x1000000U,
 
  PCOR_PTCO25 = 0x2000000U,
 
  PCOR_PTCO26 = 0x4000000U,
 
  PCOR_PTCO27 = 0x8000000U,
 
  PCOR_PTCO28 = 0x10000000U,
 
  PCOR_PTCO29 = 0x20000000U,
 
  PCOR_PTCO30 = 0x40000000U,
 
  PCOR_PTCO31 = 0x80000000U,
 
  PTOR_PTTO0 = 0x1U,
 
  PTOR_PTTO1 = 0x2U,
 
  PTOR_PTTO2 = 0x4U,
 
  PTOR_PTTO3 = 0x8U,
 
  PTOR_PTTO4 = 0x10U,
 
  PTOR_PTTO5 = 0x20U,
 
  PTOR_PTTO6 = 0x40U,
 
  PTOR_PTTO7 = 0x80U,
 
  PTOR_PTTO8 = 0x100U,
 
  PTOR_PTTO9 = 0x200U,
 
  PTOR_PTTO10 = 0x400U,
 
  PTOR_PTTO11 = 0x800U,
 
  PTOR_PTTO12 = 0x1000U,
 
  PTOR_PTTO13 = 0x2000U,
 
  PTOR_PTTO14 = 0x4000U,
 
  PTOR_PTTO15 = 0x8000U,
 
  PTOR_PTTO16 = 0x10000U,
 
  PTOR_PTTO17 = 0x20000U,
 
  PTOR_PTTO18 = 0x40000U,
 
  PTOR_PTTO19 = 0x80000U,
 
  PTOR_PTTO20 = 0x100000U,
 
  PTOR_PTTO21 = 0x200000U,
 
  PTOR_PTTO22 = 0x400000U,
 
  PTOR_PTTO23 = 0x800000U,
 
  PTOR_PTTO24 = 0x1000000U,
 
  PTOR_PTTO25 = 0x2000000U,
 
  PTOR_PTTO26 = 0x4000000U,
 
  PTOR_PTTO27 = 0x8000000U,
 
  PTOR_PTTO28 = 0x10000000U,
 
  PTOR_PTTO29 = 0x20000000U,
 
  PTOR_PTTO30 = 0x40000000U,
 
  PTOR_PTTO31 = 0x80000000U,
 
  PDIR_PDI0 = 0x1U,
 
  PDIR_PDI1 = 0x2U,
 
  PDIR_PDI2 = 0x4U,
 
  PDIR_PDI3 = 0x8U,
 
  PDIR_PDI4 = 0x10U,
 
  PDIR_PDI5 = 0x20U,
 
  PDIR_PDI6 = 0x40U,
 
  PDIR_PDI7 = 0x80U,
 
  PDIR_PDI8 = 0x100U,
 
  PDIR_PDI9 = 0x200U,
 
  PDIR_PDI10 = 0x400U,
 
  PDIR_PDI11 = 0x800U,
 
  PDIR_PDI12 = 0x1000U,
 
  PDIR_PDI13 = 0x2000U,
 
  PDIR_PDI14 = 0x4000U,
 
  PDIR_PDI15 = 0x8000U,
 
  PDIR_PDI16 = 0x10000U,
 
  PDIR_PDI17 = 0x20000U,
 
  PDIR_PDI18 = 0x40000U,
 
  PDIR_PDI19 = 0x80000U,
 
  PDIR_PDI20 = 0x100000U,
 
  PDIR_PDI21 = 0x200000U,
 
  PDIR_PDI22 = 0x400000U,
 
  PDIR_PDI23 = 0x800000U,
 
  PDIR_PDI24 = 0x1000000U,
 
  PDIR_PDI25 = 0x2000000U,
 
  PDIR_PDI26 = 0x4000000U,
 
  PDIR_PDI27 = 0x8000000U,
 
  PDIR_PDI28 = 0x10000000U,
 
  PDIR_PDI29 = 0x20000000U,
 
  PDIR_PDI30 = 0x40000000U,
 
  PDIR_PDI31 = 0x80000000U,
 
  PDDR_PDD0 = 0x1U,
 
  PDDR_PDD1 = 0x2U,
 
  PDDR_PDD2 = 0x4U,
 
  PDDR_PDD3 = 0x8U,
 
  PDDR_PDD4 = 0x10U,
 
  PDDR_PDD5 = 0x20U,
 
  PDDR_PDD6 = 0x40U,
 
  PDDR_PDD7 = 0x80U,
 
  PDDR_PDD8 = 0x100U,
 
  PDDR_PDD9 = 0x200U,
 
  PDDR_PDD10 = 0x400U,
 
  PDDR_PDD11 = 0x800U,
 
  PDDR_PDD12 = 0x1000U,
 
  PDDR_PDD13 = 0x2000U,
 
  PDDR_PDD14 = 0x4000U,
 
  PDDR_PDD15 = 0x8000U,
 
  PDDR_PDD16 = 0x10000U,
 
  PDDR_PDD17 = 0x20000U,
 
  PDDR_PDD18 = 0x40000U,
 
  PDDR_PDD19 = 0x80000U,
 
  PDDR_PDD20 = 0x100000U,
 
  PDDR_PDD21 = 0x200000U,
 
  PDDR_PDD22 = 0x400000U,
 
  PDDR_PDD23 = 0x800000U,
 
  PDDR_PDD24 = 0x1000000U,
 
  PDDR_PDD25 = 0x2000000U,
 
  PDDR_PDD26 = 0x4000000U,
 
  PDDR_PDD27 = 0x8000000U,
 
  PDDR_PDD28 = 0x10000000U,
 
  PDDR_PDD29 = 0x20000000U,
 
  PDDR_PDD30 = 0x40000000U,
 
  PDDR_PDD31 = 0x80000000U,
 
  PIDR_PID0 = 0x1U,
 
  PIDR_PID1 = 0x2U,
 
  PIDR_PID2 = 0x4U,
 
  PIDR_PID3 = 0x8U,
 
  PIDR_PID4 = 0x10U,
 
  PIDR_PID5 = 0x20U,
 
  PIDR_PID6 = 0x40U,
 
  PIDR_PID7 = 0x80U,
 
  PIDR_PID8 = 0x100U,
 
  PIDR_PID9 = 0x200U,
 
  PIDR_PID10 = 0x400U,
 
  PIDR_PID11 = 0x800U,
 
  PIDR_PID12 = 0x1000U,
 
  PIDR_PID13 = 0x2000U,
 
  PIDR_PID14 = 0x4000U,
 
  PIDR_PID15 = 0x8000U,
 
  PIDR_PID16 = 0x10000U,
 
  PIDR_PID17 = 0x20000U,
 
  PIDR_PID18 = 0x40000U,
 
  PIDR_PID19 = 0x80000U,
 
  PIDR_PID20 = 0x100000U,
 
  PIDR_PID21 = 0x200000U,
 
  PIDR_PID22 = 0x400000U,
 
  PIDR_PID23 = 0x800000U,
 
  PIDR_PID24 = 0x1000000U,
 
  PIDR_PID25 = 0x2000000U,
 
  PIDR_PID26 = 0x4000000U,
 
  PIDR_PID27 = 0x8000000U,
 
  PIDR_PID28 = 0x10000000U,
 
  PIDR_PID29 = 0x20000000U,
 
  PIDR_PID30 = 0x40000000U,
 
  PIDR_PID31 = 0x80000000U,
 
  PDR_PD = 0x1U,
 
  ICR_IRQC = 0xF0000U,
 
  ICR_ISF = 0x1000000U,
 
  GICLR_GIWE0 = 0x1U,
 
  GICLR_GIWE1 = 0x2U,
 
  GICLR_GIWE2 = 0x4U,
 
  GICLR_GIWE3 = 0x8U,
 
  GICLR_GIWE4 = 0x10U,
 
  GICLR_GIWE5 = 0x20U,
 
  GICLR_GIWE6 = 0x40U,
 
  GICLR_GIWE7 = 0x80U,
 
  GICLR_GIWE8 = 0x100U,
 
  GICLR_GIWE9 = 0x200U,
 
  GICLR_GIWE10 = 0x400U,
 
  GICLR_GIWE11 = 0x800U,
 
  GICLR_GIWE12 = 0x1000U,
 
  GICLR_GIWE13 = 0x2000U,
 
  GICLR_GIWE14 = 0x4000U,
 
  GICLR_GIWE15 = 0x8000U,
 
  GICLR_GIWD = 0xFFFF0000U,
 
  GICHR_GIWE16 = 0x1U,
 
  GICHR_GIWE17 = 0x2U,
 
  GICHR_GIWE18 = 0x4U,
 
  GICHR_GIWE19 = 0x8U,
 
  GICHR_GIWE20 = 0x10U,
 
  GICHR_GIWE21 = 0x20U,
 
  GICHR_GIWE22 = 0x40U,
 
  GICHR_GIWE23 = 0x80U,
 
  GICHR_GIWE24 = 0x100U,
 
  GICHR_GIWE25 = 0x200U,
 
  GICHR_GIWE26 = 0x400U,
 
  GICHR_GIWE27 = 0x800U,
 
  GICHR_GIWE28 = 0x1000U,
 
  GICHR_GIWE29 = 0x2000U,
 
  GICHR_GIWE30 = 0x4000U,
 
  GICHR_GIWE31 = 0x8000U,
 
  GICHR_GIWD = 0xFFFF0000U,
 
  ISFR_ISF0 = 0x1U,
 
  ISFR_ISF1 = 0x2U,
 
  ISFR_ISF2 = 0x4U,
 
  ISFR_ISF3 = 0x8U,
 
  ISFR_ISF4 = 0x10U,
 
  ISFR_ISF5 = 0x20U,
 
  ISFR_ISF6 = 0x40U,
 
  ISFR_ISF7 = 0x80U,
 
  ISFR_ISF8 = 0x100U,
 
  ISFR_ISF9 = 0x200U,
 
  ISFR_ISF10 = 0x400U,
 
  ISFR_ISF11 = 0x800U,
 
  ISFR_ISF12 = 0x1000U,
 
  ISFR_ISF13 = 0x2000U,
 
  ISFR_ISF14 = 0x4000U,
 
  ISFR_ISF15 = 0x8000U,
 
  ISFR_ISF16 = 0x10000U,
 
  ISFR_ISF17 = 0x20000U,
 
  ISFR_ISF18 = 0x40000U,
 
  ISFR_ISF19 = 0x80000U,
 
  ISFR_ISF20 = 0x100000U,
 
  ISFR_ISF21 = 0x200000U,
 
  ISFR_ISF22 = 0x400000U,
 
  ISFR_ISF23 = 0x800000U,
 
  ISFR_ISF24 = 0x1000000U,
 
  ISFR_ISF25 = 0x2000000U,
 
  ISFR_ISF26 = 0x4000000U,
 
  ISFR_ISF27 = 0x8000000U,
 
  ISFR_ISF28 = 0x10000000U,
 
  ISFR_ISF29 = 0x20000000U,
 
  ISFR_ISF30 = 0x40000000U,
 
  ISFR_ISF31 = 0x80000000U
 
};
 
/* ***************************************************************************************
 * End of file
 */
 
#endif /* CHIP_877E35E6_0C95_4696_8789_9DBFDE3FE313 */