lpi2c/Mask.h

 
#ifndef MCXA153_AE5C1DB6_4C57_4932_BEEB_2E6B1AA8A387
#define MCXA153_AE5C1DB6_4C57_4932_BEEB_2E6B1AA8A387
 
/* ***************************************************************************************
 * Include
 */
#include "mframe.h"
 
//----------------------------------------------------------------------------------------
 
//----------------------------------------------------------------------------------------
 
/* ***************************************************************************************
 * Namespace
 */
namespace mcxa153::chip::lpi2c {
  enum struct Mask : unsigned int;
 
  constexpr unsigned int operator+(Mask e) {
    return static_cast<unsigned int>(e);
  }
}  // namespace mcxa153::chip::lpi2c
 
/* ***************************************************************************************
 * Class/Interface/Struct/Enum
 */
 
enum struct mcxa153::chip::lpi2c::Mask : unsigned int {
  VERID_FEATURE = 0xFFFFU,
 
  VERID_MINOR = 0xFF0000U,
 
  VERID_MAJOR = 0xFF000000U,
 
  PARAM_MTXFIFO = 0xFU,
 
  PARAM_MRXFIFO = 0xF00U,
 
  MCR_MEN = 0x1U,
 
  MCR_RST = 0x2U,
 
  MCR_DOZEN = 0x4U,
 
  MCR_DBGEN = 0x8U,
 
  MCR_RTF = 0x100U,
 
  MCR_RRF = 0x200U,
 
  MSR_TDF = 0x1U,
 
  MSR_RDF = 0x2U,
 
  MSR_EPF = 0x100U,
 
  MSR_SDF = 0x200U,
 
  MSR_NDF = 0x400U,
 
  MSR_ALF = 0x800U,
 
  MSR_FEF = 0x1000U,
 
  MSR_PLTF = 0x2000U,
 
  MSR_DMF = 0x4000U,
 
  MSR_STF = 0x8000U,
 
  MSR_MBF = 0x1000000U,
 
  MSR_BBF = 0x2000000U,
 
  MIER_TDIE = 0x1U,
 
  MIER_RDIE = 0x2U,
 
  MIER_EPIE = 0x100U,
 
  MIER_SDIE = 0x200U,
 
  MIER_NDIE = 0x400U,
 
  MIER_ALIE = 0x800U,
 
  MIER_FEIE = 0x1000U,
 
  MIER_PLTIE = 0x2000U,
 
  MIER_DMIE = 0x4000U,
 
  MIER_STIE = 0x8000U,
 
  MDER_TDDE = 0x1U,
 
  MDER_RDDE = 0x2U,
 
  MCFGR0_HREN = 0x1U,
 
  MCFGR0_HRPOL = 0x2U,
 
  MCFGR0_HRSEL = 0x4U,
 
  MCFGR0_HRDIR = 0x8U,
 
  MCFGR0_CIRFIFO = 0x100U,
 
  MCFGR0_RDMO = 0x200U,
 
  MCFGR0_RELAX = 0x10000U,
 
  MCFGR0_ABORT = 0x20000U,
 
  MCFGR1_PRESCALE = 0x7U,
 
  MCFGR1_AUTOSTOP = 0x100U,
 
  MCFGR1_IGNACK = 0x200U,
 
  MCFGR1_TIMECFG = 0x400U,
 
  MCFGR1_STOPCFG = 0x800U,
 
  MCFGR1_STARTCFG = 0x1000U,
 
  MCFGR1_MATCFG = 0x70000U,
 
  MCFGR1_PINCFG = 0x7000000U,
 
  MCFGR2_BUSIDLE = 0xFFFU,
 
  MCFGR2_FILTSCL = 0xF0000U,
 
  MCFGR2_FILTSDA = 0xF000000U,
 
  MCFGR3_PINLOW = 0xFFF00U,
 
  MDMR_MATCH0 = 0xFFU,
 
  MDMR_MATCH1 = 0xFF0000U,
 
  MCCR0_CLKLO = 0x3FU,
 
  MCCR0_CLKHI = 0x3F00U,
 
  MCCR0_SETHOLD = 0x3F0000U,
 
  MCCR0_DATAVD = 0x3F000000U,
 
  MCCR1_CLKLO = 0x3FU,
 
  MCCR1_CLKHI = 0x3F00U,
 
  MCCR1_SETHOLD = 0x3F0000U,
 
  MCCR1_DATAVD = 0x3F000000U,
 
  MFCR_TXWATER = 0x3U,
 
  MFCR_RXWATER = 0x30000U,
 
  MFSR_TXCOUNT = 0x7U,
 
  MFSR_RXCOUNT = 0x70000U,
 
  MTDR_DATA = 0xFFU,
 
  MTDR_CMD = 0x700U,
 
  MRDR_DATA = 0xFFU,
 
  MRDR_RXEMPTY = 0x4000U,
 
  MRDROR_DATA = 0xFFU,
 
  MRDROR_RXEMPTY = 0x4000U,
 
  SCR_SEN = 0x1U,
 
  SCR_RST = 0x2U,
 
  SCR_FILTEN = 0x10U,
 
  SCR_FILTDZ = 0x20U,
 
  SCR_RTF = 0x100U,
 
  SCR_RRF = 0x200U,
 
  SSR_TDF = 0x1U,
 
  SSR_RDF = 0x2U,
 
  SSR_AVF = 0x4U,
 
  SSR_TAF = 0x8U,
 
  SSR_RSF = 0x100U,
 
  SSR_SDF = 0x200U,
 
  SSR_BEF = 0x400U,
 
  SSR_FEF = 0x800U,
 
  SSR_AM0F = 0x1000U,
 
  SSR_AM1F = 0x2000U,
 
  SSR_GCF = 0x4000U,
 
  SSR_SARF = 0x8000U,
 
  SSR_SBF = 0x1000000U,
 
  SSR_BBF = 0x2000000U,
 
  SIER_TDIE = 0x1U,
 
  SIER_RDIE = 0x2U,
 
  SIER_AVIE = 0x4U,
 
  SIER_TAIE = 0x8U,
 
  SIER_RSIE = 0x100U,
 
  SIER_SDIE = 0x200U,
 
  SIER_BEIE = 0x400U,
 
  SIER_FEIE = 0x800U,
 
  SIER_AM0IE = 0x1000U,
 
  SIER_AM1IE = 0x2000U,
 
  SIER_GCIE = 0x4000U,
 
  SIER_SARIE = 0x8000U,
 
  SDER_TDDE = 0x1U,
 
  SDER_RDDE = 0x2U,
 
  SDER_AVDE = 0x4U,
 
  SDER_RSDE = 0x100U,
 
  SDER_SDDE = 0x200U,
 
  SCFGR0_RDREQ = 0x1U,
 
  SCFGR0_RDACK = 0x2U,
 
  SCFGR1_ADRSTALL = 0x1U,
 
  SCFGR1_RXSTALL = 0x2U,
 
  SCFGR1_TXDSTALL = 0x4U,
 
  SCFGR1_ACKSTALL = 0x8U,
 
  SCFGR1_RXNACK = 0x10U,
 
  SCFGR1_GCEN = 0x100U,
 
  SCFGR1_SAEN = 0x200U,
 
  SCFGR1_TXCFG = 0x400U,
 
  SCFGR1_RXCFG = 0x800U,
 
  SCFGR1_IGNACK = 0x1000U,
 
  SCFGR1_HSMEN = 0x2000U,
 
  SCFGR1_ADDRCFG = 0x70000U,
 
  SCFGR1_RXALL = 0x1000000U,
 
  SCFGR1_RSCFG = 0x2000000U,
 
  SCFGR1_SDCFG = 0x4000000U,
 
  SCFGR2_CLKHOLD = 0xFU,
 
  SCFGR2_DATAVD = 0x3F00U,
 
  SCFGR2_FILTSCL = 0xF0000U,
 
  SCFGR2_FILTSDA = 0xF000000U,
 
  SAMR_ADDR0 = 0x7FEU,
 
  SAMR_ADDR1 = 0x7FE0000U,
 
  SASR_RADDR = 0x7FFU,
 
  SASR_ANV = 0x4000U,
 
  STAR_TXNACK = 0x1U,
 
  STDR_DATA = 0xFFU,
 
  SRDR_DATA = 0xFFU,
 
  SRDR_RADDR = 0x700U,
 
  SRDR_RXEMPTY = 0x4000U,
 
  SRDR_SOF = 0x8000U,
 
  SRDROR_DATA = 0xFFU,
 
  SRDROR_RADDR = 0x700U,
 
  SRDROR_RXEMPTY = 0x4000U,
 
  SRDROR_SOF = 0x8000U
 
};
 
/* ***************************************************************************************
 * End of file
 */
 
#endif /* MCXA153_AE5C1DB6_4C57_4932_BEEB_2E6B1AA8A387 */