DMA

Direct Memory Access Reset Control.

Direct Memory Access Reset ControlControls reset state of the Direct Memory Access (DMA) controller. DMA enables high-speed data transfer between memory and peripherals without CPU intervention, improving system performance and efficiency.

直接記憶體存取重置控制，高速資料傳輸控制器

DMA Functions:

• High-speed memory-to-memory and peripheral-to-memory transfers
• Multiple independent DMA channels with priority management
• Scatter-gather operation for complex transfer patterns
• Interrupt generation on transfer completion or error
• Bandwidth optimization for high-throughput applications

註

Reset Effects:

• All active DMA transfers are immediately terminated
• Channel descriptors and control registers reset to defaults
• Transfer queues are cleared and must be reprogrammed
• All pending DMA interrupts are cleared

警告

Reset Impact:

• Active data transfers will be corrupted if reset during operation
• Ensure all critical transfers complete before asserting reset

• May affect multiple peripherals that depend on DMA services

  Reinitialization:

  // Safely reset and reconfigure DMA
  dma_wait_for_transfers_complete();
  reset_ctrl.assert_reset(Control::DMA);
  configure_dma_channels();
  reset_ctrl.release_reset(Control::DMA);