I3C

I3C0 Interface Reset Control.

I3C0 Interface Reset ControlControls reset state of the Improved Inter-Integrated Circuit 0 (I3C0) peripheral. I3C0 provides high-speed serial communication with advanced features including in-band interrupts, dynamic addressing, and backward compatibility with I2C.

I3C0 介面重置控制，高速串列通訊外設

I3C0 Capabilities:

• High-speed serial communication (up to 12.5 Mbps)
• Dynamic address assignment and hot-join capability
• In-band interrupt (IBI) support for real-time signaling
• I2C backward compatibility for legacy device support
• Common Command Codes (CCC) for advanced bus management

註

Reset Effects:

• Bus interface returns to idle state
• Dynamic addresses are cleared, requiring reassignment
• All pending transactions are aborted
• Interrupt and event configurations are reset

警告

I3C Bus Considerations:

• Reset may affect other devices on the shared I3C bus
• Ensure proper bus recovery sequence after reset

• May require bus mastership transfer if acting as current master

  Initialization:

  // Initialize I3C0 with proper reset sequence
  reset_ctrl.assert_reset(Control::I3C0);
  configure_i3c_pins_and_clocking();
  reset_ctrl.release_reset(Control::I3C0);
  i3c0_initialize_as_master();