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lpi2c/Shift.h
1
7#ifndef MCXA153_C7F0BCCC_9142_44E7_B48D_A57001F235C8
8#define MCXA153_C7F0BCCC_9142_44E7_B48D_A57001F235C8
9
10/* ***************************************************************************************
11 * Include
12 */
13#include "mframe.h"
14
15//----------------------------------------------------------------------------------------
16
17//----------------------------------------------------------------------------------------
18
19/* ***************************************************************************************
20 * Namespace
21 */
22namespace mcxa153::chip::lpi2c {
23 enum struct Shift : unsigned int;
24
34 constexpr unsigned int operator+(Shift e) {
35 return static_cast<unsigned int>(e);
36 }
37} // namespace mcxa153::chip::lpi2c
38
39/* ***************************************************************************************
40 * Class/Interface/Struct/Enum
41 */
42
51enum struct mcxa153::chip::lpi2c::Shift : unsigned int {
64 VERID_FEATURE = 0U,
65
72 VERID_MINOR = 16U,
73
80 VERID_MAJOR = 24U,
81
88 PARAM_MTXFIFO = 0U,
89
96 PARAM_MRXFIFO = 8U,
97
108 MCR_MEN = 0U,
109
120 MCR_RST = 1U,
121
132 MCR_DOZEN = 2U,
133
144 MCR_DBGEN = 3U,
145
156 MCR_RTF = 8U,
157
168 MCR_RRF = 9U,
169
180 MSR_TDF = 0U,
181
192 MSR_RDF = 1U,
193
208 MSR_EPF = 8U,
209
224 MSR_SDF = 9U,
225
240 MSR_NDF = 10U,
241
256 MSR_ALF = 11U,
257
272 MSR_FEF = 12U,
273
288 MSR_PLTF = 13U,
289
304 MSR_DMF = 14U,
305
320 MSR_STF = 15U,
321
332 MSR_MBF = 24U,
333
344 MSR_BBF = 25U,
345
356 MIER_TDIE = 0U,
357
368 MIER_RDIE = 1U,
369
380 MIER_EPIE = 8U,
381
392 MIER_SDIE = 9U,
393
404 MIER_NDIE = 10U,
405
416 MIER_ALIE = 11U,
417
428 MIER_FEIE = 12U,
429
440 MIER_PLTIE = 13U,
441
452 MIER_DMIE = 14U,
453
464 MIER_STIE = 15U,
465
476 MDER_TDDE = 0U,
477
488 MDER_RDDE = 1U,
489
500 MCFGR0_HREN = 0U,
501
512 MCFGR0_HRPOL = 1U,
513
524 MCFGR0_HRSEL = 2U,
525
536 MCFGR0_HRDIR = 3U,
537
548 MCFGR0_CIRFIFO = 8U,
549
561 MCFGR0_RDMO = 9U,
562
573 MCFGR0_RELAX = 16U,
574
586 MCFGR0_ABORT = 17U,
587
610 MCFGR1_PRESCALE = 0U,
611
622 MCFGR1_AUTOSTOP = 8U,
623
634 MCFGR1_IGNACK = 9U,
635
646 MCFGR1_TIMECFG = 10U,
647
658 MCFGR1_STOPCFG = 11U,
659
671 MCFGR1_STARTCFG = 12U,
672
705 MCFGR1_MATCFG = 16U,
706
732 MCFGR1_PINCFG = 24U,
733
740 MCFGR2_BUSIDLE = 0U,
741
748 MCFGR2_FILTSCL = 16U,
749
756 MCFGR2_FILTSDA = 24U,
757
764 MCFGR3_PINLOW = 8U,
765
772 MDMR_MATCH0 = 0U,
773
780 MDMR_MATCH1 = 16U,
781
788 MCCR0_CLKLO = 0U,
789
796 MCCR0_CLKHI = 8U,
797
804 MCCR0_SETHOLD = 16U,
805
812 MCCR0_DATAVD = 24U,
813
820 MCCR1_CLKLO = 0U,
821
828 MCCR1_CLKHI = 8U,
829
836 MCCR1_SETHOLD = 16U,
837
844 MCCR1_DATAVD = 24U,
845
852 MFCR_TXWATER = 0U,
853
860 MFCR_RXWATER = 16U,
861
868 MFSR_TXCOUNT = 0U,
869
876 MFSR_RXCOUNT = 16U,
877
884 MTDR_DATA = 0U,
885
900 MTDR_CMD = 8U,
901
908 MRDR_DATA = 0U,
909
920 MRDR_RXEMPTY = 14U,
921
928 MRDROR_DATA = 0U,
929
940 MRDROR_RXEMPTY = 14U,
941
952 SCR_SEN = 0U,
953
964 SCR_RST = 1U,
965
976 SCR_FILTEN = 4U,
977
988 SCR_FILTDZ = 5U,
989
1000 SCR_RTF = 8U,
1001
1012 SCR_RRF = 9U,
1013
1024 SSR_TDF = 0U,
1025
1036 SSR_RDF = 1U,
1037
1048 SSR_AVF = 2U,
1049
1060 SSR_TAF = 3U,
1061
1076 SSR_RSF = 8U,
1077
1092 SSR_SDF = 9U,
1093
1108 SSR_BEF = 10U,
1109
1124 SSR_FEF = 11U,
1125
1136 SSR_AM0F = 12U,
1137
1148 SSR_AM1F = 13U,
1149
1160 SSR_GCF = 14U,
1161
1172 SSR_SARF = 15U,
1173
1184 SSR_SBF = 24U,
1185
1196 SSR_BBF = 25U,
1197
1208 SIER_TDIE = 0U,
1209
1220 SIER_RDIE = 1U,
1221
1232 SIER_AVIE = 2U,
1233
1244 SIER_TAIE = 3U,
1245
1256 SIER_RSIE = 8U,
1257
1268 SIER_SDIE = 9U,
1269
1280 SIER_BEIE = 10U,
1281
1292 SIER_FEIE = 11U,
1293
1304 SIER_AM0IE = 12U,
1305
1316 SIER_AM1IE = 13U,
1317
1328 SIER_GCIE = 14U,
1329
1340 SIER_SARIE = 15U,
1341
1352 SDER_TDDE = 0U,
1353
1364 SDER_RDDE = 1U,
1365
1376 SDER_AVDE = 2U,
1377
1388 SDER_RSDE = 8U,
1389
1400 SDER_SDDE = 9U,
1401
1412 SCFGR0_RDREQ = 0U,
1413
1424 SCFGR0_RDACK = 1U,
1425
1436 SCFGR1_ADRSTALL = 0U,
1437
1448 SCFGR1_RXSTALL = 1U,
1449
1460 SCFGR1_TXDSTALL = 2U,
1461
1472 SCFGR1_ACKSTALL = 3U,
1473
1486 SCFGR1_RXNACK = 4U,
1487
1498 SCFGR1_GCEN = 8U,
1499
1510 SCFGR1_SAEN = 9U,
1511
1523 SCFGR1_TXCFG = 10U,
1524
1537 SCFGR1_RXCFG = 11U,
1538
1549 SCFGR1_IGNACK = 12U,
1550
1561 SCFGR1_HSMEN = 13U,
1562
1591 SCFGR1_ADDRCFG = 16U,
1592
1603 SCFGR1_RXALL = 24U,
1604
1616 SCFGR1_RSCFG = 25U,
1617
1628 SCFGR1_SDCFG = 26U,
1629
1636 SCFGR2_CLKHOLD = 0U,
1637
1644 SCFGR2_DATAVD = 8U,
1645
1652 SCFGR2_FILTSCL = 16U,
1653
1660 SCFGR2_FILTSDA = 24U,
1661
1668 SAMR_ADDR0 = 1U,
1669
1676 SAMR_ADDR1 = 17U,
1677
1684 SASR_RADDR = 0U,
1685
1696 SASR_ANV = 14U,
1697
1708 STAR_TXNACK = 0U,
1709
1716 STDR_DATA = 0U,
1717
1724 SRDR_DATA = 0U,
1725
1732 SRDR_RADDR = 8U,
1733
1744 SRDR_RXEMPTY = 14U,
1745
1756 SRDR_SOF = 15U,
1757
1764 SRDROR_DATA = 0U,
1765
1772 SRDROR_RADDR = 8U,
1773
1784 SRDROR_RXEMPTY = 14U,
1785
1796 SRDROR_SOF = 15U
1797
1798};
1799
1800/* ***************************************************************************************
1801 * End of file
1802 */
1803
1804#endif /* MCXA153_C7F0BCCC_9142_44E7_B48D_A57001F235C8 */
Definition LPI2C.h:25
@ SCFGR1_SDCFG
SCFGR1 - SDCFG.
@ SCFGR1_GCEN
SCFGR1 - GCEN.
@ MCFGR0_RELAX
MCFGR0 - RELAX.
@ MDMR_MATCH1
MDMR - MATCH1.
@ MCFGR0_HREN
MCFGR0 - HREN.
@ MCCR1_CLKHI
MCCR1 - CLKHI.
@ MRDROR_RXEMPTY
MRDROR - RXEMPTY.
@ SRDR_RXEMPTY
SRDR - RXEMPTY.
@ MCFGR0_HRDIR
MCFGR0 - HRDIR.
@ SCFGR1_RXSTALL
SCFGR1 - RXSTALL.
@ MCFGR1_STARTCFG
MCFGR1 - STARTCFG.
@ SCFGR2_DATAVD
SCFGR2 - DATAVD.
@ MRDR_RXEMPTY
MRDR - RXEMPTY.
@ MCCR1_DATAVD
MCCR1 - DATAVD.
@ MFCR_RXWATER
MFCR - RXWATER.
@ SCFGR1_ADRSTALL
SCFGR1 - ADRSTALL.
@ SCFGR1_TXDSTALL
SCFGR1 - TXDSTALL.
@ SCFGR2_FILTSDA
SCFGR2 - FILTSDA.
@ MCFGR2_FILTSDA
MCFGR2 - FILTSDA.
@ MCFGR1_STOPCFG
MCFGR1 - STOPCFG.
@ MFSR_TXCOUNT
MFSR - TXCOUNT.
@ MCFGR0_ABORT
MCFGR0 - ABORT.
@ MCFGR0_HRSEL
MCFGR0 - HRSEL.
@ MCCR0_DATAVD
MCCR0 - DATAVD.
@ SCFGR1_RXCFG
SCFGR1 - RXCFG.
@ MCFGR1_PRESCALE
MCFGR1 - PRESCALE.
@ SCFGR0_RDACK
SCFGR0 - RDACK.
@ MCCR1_CLKLO
MCCR1 - CLKLO.
@ MCFGR0_RDMO
MCFGR0 - RDMO.
@ SCFGR1_ADDRCFG
SCFGR1 - ADDRCFG.
@ MCFGR0_HRPOL
MCFGR0 - HRPOL.
@ MCFGR3_PINLOW
MCFGR3 - PINLOW.
@ MCFGR1_MATCFG
MCFGR1 - MATCFG.
@ SCFGR1_RSCFG
SCFGR1 - RSCFG.
@ MCFGR1_PINCFG
MCFGR1 - PINCFG.
@ SCFGR1_RXNACK
SCFGR1 - RXNACK.
@ SCFGR2_FILTSCL
SCFGR2 - FILTSCL.
@ SCFGR1_SAEN
SCFGR1 - SAEN.
@ MRDROR_DATA
MRDROR - DATA.
@ SCFGR2_CLKHOLD
SCFGR2 - CLKHOLD.
@ MCCR0_CLKHI
MCCR0 - CLKHI.
@ SCFGR0_RDREQ
SCFGR0 - RDREQ.
@ MCFGR1_AUTOSTOP
MCFGR1 - AUTOSTOP.
@ PARAM_MRXFIFO
PARAM - MRXFIFO.
@ MCFGR2_FILTSCL
MCFGR2 - FILTSCL.
@ SCFGR1_ACKSTALL
SCFGR1 - ACKSTALL.
@ MCCR1_SETHOLD
MCCR1 - SETHOLD.
@ SRDROR_RADDR
SRDROR - RADDR.
@ PARAM_MTXFIFO
PARAM - MTXFIFO.
@ MDMR_MATCH0
MDMR - MATCH0.
@ SRDROR_DATA
SRDROR - DATA.
@ MFSR_RXCOUNT
MFSR - RXCOUNT.
@ SCFGR1_TXCFG
SCFGR1 - TXCFG.
@ SCFGR1_IGNACK
SCFGR1 - IGNACK.
@ MCCR0_SETHOLD
MCCR0 - SETHOLD.
@ MCFGR1_TIMECFG
MCFGR1 - TIMECFG.
@ MCFGR2_BUSIDLE
MCFGR2 - BUSIDLE.
@ SCFGR1_RXALL
SCFGR1 - RXALL.
@ MCFGR1_IGNACK
MCFGR1 - IGNACK.
@ SCFGR1_HSMEN
SCFGR1 - HSMEN.
@ MFCR_TXWATER
MFCR - TXWATER.
@ MCFGR0_CIRFIFO
MCFGR0 - CIRFIFO.
@ MCCR0_CLKLO
MCCR0 - CLKLO.
@ STAR_TXNACK
STAR - TXNACK.
@ SRDROR_RXEMPTY
SRDROR - RXEMPTY.
Shift
LPI2C Shift - Register Bit Shift Positions.
Definition lpi2c/Shift.h:51