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chip/gpio/GPIO.h
1
7#ifndef MCXA153_A3754241_08E1_4F86_B049_0FACC9D70DF5
8#define MCXA153_A3754241_08E1_4F86_B049_0FACC9D70DF5
9
10/* ***************************************************************************************
11 * Include
12 */
13#include "mframe.h"
14
15//----------------------------------------------------------------------------------------
16#include "./../Processor.h"
17#include "./../gpio/Count.h"
18#include "./../gpio/InterruptConfig.h"
19#include "./../gpio/Mask.h"
20#include "./../gpio/PinConfig.h"
21#include "./../gpio/Register.h"
22#include "./../gpio/Shift.h"
23#include "./../gpio/VersionInfo.h"
24
25//----------------------------------------------------------------------------------------
26
27/* ***************************************************************************************
28 * Namespace
29 */
30namespace mcxa153::chip::gpio {
31 class GPIO;
32
33 Register* const GPIO0 =
34 reinterpret_cast<Register*>(mcxa153::chip::Processor::BASE_GPIO0);
35
36 Register* const GPIO1 =
37 reinterpret_cast<Register*>(mcxa153::chip::Processor::BASE_GPIO1);
38
39 Register* const GPIO2 =
40 reinterpret_cast<Register*>(mcxa153::chip::Processor::BASE_GPIO2);
41
42 Register* const GPIO3 =
43 reinterpret_cast<Register*>(mcxa153::chip::Processor::BASE_GPIO3);
44
45 Register* const GPIO[4] = {GPIO0, GPIO1, GPIO2, GPIO3};
46} // namespace mcxa153::chip::gpio
47
48/* ***************************************************************************************
49 * Class/Interface/Struct/Enum
50 */
51
140 /* *************************************************************************************
141 * Variable
142 */
143
144 /* *************************************************************************************
145 * Abstract Method
146 */
147
148 /* *************************************************************************************
149 * Construct Method
150 */
151 protected:
156 virtual ~GPIO(void) override = default;
157
158 /* *************************************************************************************
159 * Operator Method
160 */
161
162 /* *************************************************************************************
163 * Override Method
164 */
165
166 /* *************************************************************************************
167 * Public Method
168 */
169
170 /* *************************************************************************************
171 * Protected Method
172 */
173
174 /* *************************************************************************************
175 * Private Method
176 */
177
178 /* *************************************************************************************
179 * Static Variable
180 */
181
182 /* *************************************************************************************
183 * Static Method
184 */
185 public:
212 static void pinInit(Register* base, uint32 pin, const PinConfig& config);
213
220 static void getVersionInfo(Register* base, VersionInfo& info);
221
228 static inline void portInputEnable(Register* base, uint32 mask) {
229 base->pidr &= static_cast<uint32>(~mask);
230 }
231
238 static inline void portInputDisable(Register* base, uint32 mask) {
239 base->pidr |= static_cast<uint32>(mask);
240 }
241
251 static inline void pinWrite(Register* base, uint32 pin, uint8 output) {
252 if (output == 0U) {
253 base->pcor = static_cast<uint32>(1UL << pin);
254 } else {
255 base->psor = static_cast<uint32>(1UL << pin);
256 }
257 }
258
265 static inline void portSet(Register* base, uint32 mask) {
266 base->psor = static_cast<uint32>(mask);
267 }
268
275 static inline void portClear(Register* base, uint32 mask) {
276 base->pcor = static_cast<uint32>(mask);
277 }
278
285 static inline void portToggle(Register* base, uint32 mask) {
286 base->ptor = static_cast<uint32>(mask);
287 }
288
298 static inline uint32 pinRead(Register* base, uint32 pin) {
299 return ((static_cast<uint32>(base->pdir) >> pin) & 0x01UL);
300 }
301
326 static inline void setPinInterruptConfig(Register* base,
327 uint32 pin,
328 InterruptConfig config) {
329 base->icr[pin] =
330 static_cast<uint32>((base->icr[pin] & ~+Mask::ICR_IRQC) | GPIO::ICR_IRQC(+config));
331 }
332
342 static uint32 gpioGetInterruptFlags(Register* base);
343
351 static uint8 pinGetInterruptFlag(Register* base, uint32 pin);
352
359 static void gpioClearInterruptFlags(Register* base, uint32 mask);
360
367 static void pinClearInterruptFlag(Register* base, uint32 pin);
368
374 static inline uint32 getPinsDMARequestFlags(Register* base) {
375 return (base->isfr[1]);
376 }
377
402 static inline void setMultipleInterruptPinsConfig(Register* base,
403 uint32 mask,
404 InterruptConfig config) {
405 if (0UL != (mask & 0xffffUL)) {
406 base->giclr = static_cast<uint32>((GPIO::ICR_IRQC(+config)) | (mask & 0xffffU));
407 }
408 mask = mask >> 16U;
409 if (mask != 0UL) {
410 base->gichr = static_cast<uint32>((GPIO::ICR_IRQC(+config)) | (mask & 0xffffU));
411 }
412 }
413
423 static inline constexpr uint32 VERID_FEATURE(uint32 value) {
424 return ((value << +Shift::VERID_FEATURE) & +Mask::VERID_FEATURE);
425 }
426
432 static inline constexpr uint32 VERID_MINOR(uint32 value) {
433 return ((value << +Shift::VERID_MINOR) & +Mask::VERID_MINOR);
434 }
435
441 static inline constexpr uint32 VERID_MAJOR(uint32 value) {
442 return ((value << +Shift::VERID_MAJOR) & +Mask::VERID_MAJOR);
443 }
444
450 static inline constexpr uint32 PARAM_IRQNUM(uint32 value) {
451 return ((value << +Shift::PARAM_IRQNUM) & +Mask::PARAM_IRQNUM);
452 }
453
463 static inline constexpr uint32 PDOR_PDO0(uint32 value) {
464 return ((value << +Shift::PDOR_PDO0) & +Mask::PDOR_PDO0);
465 }
466
476 static inline constexpr uint32 PDOR_PDO1(uint32 value) {
477 return ((value << +Shift::PDOR_PDO1) & +Mask::PDOR_PDO1);
478 }
479
489 static inline constexpr uint32 PDOR_PDO2(uint32 value) {
490 return ((value << +Shift::PDOR_PDO2) & +Mask::PDOR_PDO2);
491 }
492
502 static inline constexpr uint32 PDOR_PDO3(uint32 value) {
503 return ((value << +Shift::PDOR_PDO3) & +Mask::PDOR_PDO3);
504 }
505
515 static inline constexpr uint32 PDOR_PDO4(uint32 value) {
516 return ((value << +Shift::PDOR_PDO4) & +Mask::PDOR_PDO4);
517 }
518
528 static inline constexpr uint32 PDOR_PDO5(uint32 value) {
529 return ((value << +Shift::PDOR_PDO5) & +Mask::PDOR_PDO5);
530 }
531
541 static inline constexpr uint32 PDOR_PDO6(uint32 value) {
542 return ((value << +Shift::PDOR_PDO6) & +Mask::PDOR_PDO6);
543 }
544
554 static inline constexpr uint32 PDOR_PDO7(uint32 value) {
555 return ((value << +Shift::PDOR_PDO7) & +Mask::PDOR_PDO7);
556 }
557
567 static inline constexpr uint32 PDOR_PDO8(uint32 value) {
568 return ((value << +Shift::PDOR_PDO8) & +Mask::PDOR_PDO8);
569 }
570
580 static inline constexpr uint32 PDOR_PDO9(uint32 value) {
581 return ((value << +Shift::PDOR_PDO9) & +Mask::PDOR_PDO9);
582 }
583
593 static inline constexpr uint32 PDOR_PDO10(uint32 value) {
594 return ((value << +Shift::PDOR_PDO10) & +Mask::PDOR_PDO10);
595 }
596
606 static inline constexpr uint32 PDOR_PDO11(uint32 value) {
607 return ((value << +Shift::PDOR_PDO11) & +Mask::PDOR_PDO11);
608 }
609
619 static inline constexpr uint32 PDOR_PDO12(uint32 value) {
620 return ((value << +Shift::PDOR_PDO12) & +Mask::PDOR_PDO12);
621 }
622
632 static inline constexpr uint32 PDOR_PDO13(uint32 value) {
633 return ((value << +Shift::PDOR_PDO13) & +Mask::PDOR_PDO13);
634 }
635
645 static inline constexpr uint32 PDOR_PDO14(uint32 value) {
646 return ((value << +Shift::PDOR_PDO14) & +Mask::PDOR_PDO14);
647 }
648
658 static inline constexpr uint32 PDOR_PDO15(uint32 value) {
659 return ((value << +Shift::PDOR_PDO15) & +Mask::PDOR_PDO15);
660 }
661
671 static inline constexpr uint32 PDOR_PDO16(uint32 value) {
672 return ((value << +Shift::PDOR_PDO16) & +Mask::PDOR_PDO16);
673 }
674
684 static inline constexpr uint32 PDOR_PDO17(uint32 value) {
685 return ((value << +Shift::PDOR_PDO17) & +Mask::PDOR_PDO17);
686 }
687
697 static inline constexpr uint32 PDOR_PDO18(uint32 value) {
698 return ((value << +Shift::PDOR_PDO18) & +Mask::PDOR_PDO18);
699 }
700
710 static inline constexpr uint32 PDOR_PDO19(uint32 value) {
711 return ((value << +Shift::PDOR_PDO19) & +Mask::PDOR_PDO19);
712 }
713
723 static inline constexpr uint32 PDOR_PDO20(uint32 value) {
724 return ((value << +Shift::PDOR_PDO20) & +Mask::PDOR_PDO20);
725 }
726
736 static inline constexpr uint32 PDOR_PDO21(uint32 value) {
737 return ((value << +Shift::PDOR_PDO21) & +Mask::PDOR_PDO21);
738 }
739
749 static inline constexpr uint32 PDOR_PDO22(uint32 value) {
750 return ((value << +Shift::PDOR_PDO22) & +Mask::PDOR_PDO22);
751 }
752
762 static inline constexpr uint32 PDOR_PDO23(uint32 value) {
763 return ((value << +Shift::PDOR_PDO23) & +Mask::PDOR_PDO23);
764 }
765
775 static inline constexpr uint32 PDOR_PDO24(uint32 value) {
776 return ((value << +Shift::PDOR_PDO24) & +Mask::PDOR_PDO24);
777 }
778
788 static inline constexpr uint32 PDOR_PDO25(uint32 value) {
789 return ((value << +Shift::PDOR_PDO25) & +Mask::PDOR_PDO25);
790 }
791
801 static inline constexpr uint32 PDOR_PDO26(uint32 value) {
802 return ((value << +Shift::PDOR_PDO26) & +Mask::PDOR_PDO26);
803 }
804
814 static inline constexpr uint32 PDOR_PDO27(uint32 value) {
815 return ((value << +Shift::PDOR_PDO27) & +Mask::PDOR_PDO27);
816 }
817
827 static inline constexpr uint32 PDOR_PDO28(uint32 value) {
828 return ((value << +Shift::PDOR_PDO28) & +Mask::PDOR_PDO28);
829 }
830
840 static inline constexpr uint32 PDOR_PDO29(uint32 value) {
841 return ((value << +Shift::PDOR_PDO29) & +Mask::PDOR_PDO29);
842 }
843
853 static inline constexpr uint32 PDOR_PDO30(uint32 value) {
854 return ((value << +Shift::PDOR_PDO30) & +Mask::PDOR_PDO30);
855 }
856
866 static inline constexpr uint32 PDOR_PDO31(uint32 value) {
867 return ((value << +Shift::PDOR_PDO31) & +Mask::PDOR_PDO31);
868 }
869
879 static inline constexpr uint32 PSOR_PTSO0(uint32 value) {
880 return ((value << +Shift::PSOR_PTSO0) & +Mask::PSOR_PTSO0);
881 }
882
892 static inline constexpr uint32 PSOR_PTSO1(uint32 value) {
893 return ((value << +Shift::PSOR_PTSO1) & +Mask::PSOR_PTSO1);
894 }
895
905 static inline constexpr uint32 PSOR_PTSO2(uint32 value) {
906 return ((value << +Shift::PSOR_PTSO2) & +Mask::PSOR_PTSO2);
907 }
908
918 static inline constexpr uint32 PSOR_PTSO3(uint32 value) {
919 return ((value << +Shift::PSOR_PTSO3) & +Mask::PSOR_PTSO3);
920 }
921
931 static inline constexpr uint32 PSOR_PTSO4(uint32 value) {
932 return ((value << +Shift::PSOR_PTSO4) & +Mask::PSOR_PTSO4);
933 }
934
944 static inline constexpr uint32 PSOR_PTSO5(uint32 value) {
945 return ((value << +Shift::PSOR_PTSO5) & +Mask::PSOR_PTSO5);
946 }
947
957 static inline constexpr uint32 PSOR_PTSO6(uint32 value) {
958 return ((value << +Shift::PSOR_PTSO6) & +Mask::PSOR_PTSO6);
959 }
960
970 static inline constexpr uint32 PSOR_PTSO7(uint32 value) {
971 return ((value << +Shift::PSOR_PTSO7) & +Mask::PSOR_PTSO7);
972 }
973
983 static inline constexpr uint32 PSOR_PTSO8(uint32 value) {
984 return ((value << +Shift::PSOR_PTSO8) & +Mask::PSOR_PTSO8);
985 }
986
996 static inline constexpr uint32 PSOR_PTSO9(uint32 value) {
997 return ((value << +Shift::PSOR_PTSO9) & +Mask::PSOR_PTSO9);
998 }
999
1009 static inline constexpr uint32 PSOR_PTSO10(uint32 value) {
1010 return ((value << +Shift::PSOR_PTSO10) & +Mask::PSOR_PTSO10);
1011 }
1012
1022 static inline constexpr uint32 PSOR_PTSO11(uint32 value) {
1023 return ((value << +Shift::PSOR_PTSO11) & +Mask::PSOR_PTSO11);
1024 }
1025
1035 static inline constexpr uint32 PSOR_PTSO12(uint32 value) {
1036 return ((value << +Shift::PSOR_PTSO12) & +Mask::PSOR_PTSO12);
1037 }
1038
1048 static inline constexpr uint32 PSOR_PTSO13(uint32 value) {
1049 return ((value << +Shift::PSOR_PTSO13) & +Mask::PSOR_PTSO13);
1050 }
1051
1061 static inline constexpr uint32 PSOR_PTSO14(uint32 value) {
1062 return ((value << +Shift::PSOR_PTSO14) & +Mask::PSOR_PTSO14);
1063 }
1064
1074 static inline constexpr uint32 PSOR_PTSO15(uint32 value) {
1075 return ((value << +Shift::PSOR_PTSO15) & +Mask::PSOR_PTSO15);
1076 }
1077
1087 static inline constexpr uint32 PSOR_PTSO16(uint32 value) {
1088 return ((value << +Shift::PSOR_PTSO16) & +Mask::PSOR_PTSO16);
1089 }
1090
1100 static inline constexpr uint32 PSOR_PTSO17(uint32 value) {
1101 return ((value << +Shift::PSOR_PTSO17) & +Mask::PSOR_PTSO17);
1102 }
1103
1113 static inline constexpr uint32 PSOR_PTSO18(uint32 value) {
1114 return ((value << +Shift::PSOR_PTSO18) & +Mask::PSOR_PTSO18);
1115 }
1116
1126 static inline constexpr uint32 PSOR_PTSO19(uint32 value) {
1127 return ((value << +Shift::PSOR_PTSO19) & +Mask::PSOR_PTSO19);
1128 }
1129
1139 static inline constexpr uint32 PSOR_PTSO20(uint32 value) {
1140 return ((value << +Shift::PSOR_PTSO20) & +Mask::PSOR_PTSO20);
1141 }
1142
1152 static inline constexpr uint32 PSOR_PTSO21(uint32 value) {
1153 return ((value << +Shift::PSOR_PTSO21) & +Mask::PSOR_PTSO21);
1154 }
1155
1165 static inline constexpr uint32 PSOR_PTSO22(uint32 value) {
1166 return ((value << +Shift::PSOR_PTSO22) & +Mask::PSOR_PTSO22);
1167 }
1168
1178 static inline constexpr uint32 PSOR_PTSO23(uint32 value) {
1179 return ((value << +Shift::PSOR_PTSO23) & +Mask::PSOR_PTSO23);
1180 }
1181
1191 static inline constexpr uint32 PSOR_PTSO24(uint32 value) {
1192 return ((value << +Shift::PSOR_PTSO24) & +Mask::PSOR_PTSO24);
1193 }
1194
1204 static inline constexpr uint32 PSOR_PTSO25(uint32 value) {
1205 return ((value << +Shift::PSOR_PTSO25) & +Mask::PSOR_PTSO25);
1206 }
1207
1217 static inline constexpr uint32 PSOR_PTSO26(uint32 value) {
1218 return ((value << +Shift::PSOR_PTSO26) & +Mask::PSOR_PTSO26);
1219 }
1220
1230 static inline constexpr uint32 PSOR_PTSO27(uint32 value) {
1231 return ((value << +Shift::PSOR_PTSO27) & +Mask::PSOR_PTSO27);
1232 }
1233
1243 static inline constexpr uint32 PSOR_PTSO28(uint32 value) {
1244 return ((value << +Shift::PSOR_PTSO28) & +Mask::PSOR_PTSO28);
1245 }
1246
1256 static inline constexpr uint32 PSOR_PTSO29(uint32 value) {
1257 return ((value << +Shift::PSOR_PTSO29) & +Mask::PSOR_PTSO29);
1258 }
1259
1269 static inline constexpr uint32 PSOR_PTSO30(uint32 value) {
1270 return ((value << +Shift::PSOR_PTSO30) & +Mask::PSOR_PTSO30);
1271 }
1272
1282 static inline constexpr uint32 PSOR_PTSO31(uint32 value) {
1283 return ((value << +Shift::PSOR_PTSO31) & +Mask::PSOR_PTSO31);
1284 }
1285
1295 static inline constexpr uint32 PCOR_PTCO0(uint32 value) {
1296 return ((value << +Shift::PCOR_PTCO0) & +Mask::PCOR_PTCO0);
1297 }
1298
1308 static inline constexpr uint32 PCOR_PTCO1(uint32 value) {
1309 return ((value << +Shift::PCOR_PTCO1) & +Mask::PCOR_PTCO1);
1310 }
1311
1321 static inline constexpr uint32 PCOR_PTCO2(uint32 value) {
1322 return ((value << +Shift::PCOR_PTCO2) & +Mask::PCOR_PTCO2);
1323 }
1324
1334 static inline constexpr uint32 PCOR_PTCO3(uint32 value) {
1335 return ((value << +Shift::PCOR_PTCO3) & +Mask::PCOR_PTCO3);
1336 }
1337
1347 static inline constexpr uint32 PCOR_PTCO4(uint32 value) {
1348 return ((value << +Shift::PCOR_PTCO4) & +Mask::PCOR_PTCO4);
1349 }
1350
1360 static inline constexpr uint32 PCOR_PTCO5(uint32 value) {
1361 return ((value << +Shift::PCOR_PTCO5) & +Mask::PCOR_PTCO5);
1362 }
1363
1373 static inline constexpr uint32 PCOR_PTCO6(uint32 value) {
1374 return ((value << +Shift::PCOR_PTCO6) & +Mask::PCOR_PTCO6);
1375 }
1376
1386 static inline constexpr uint32 PCOR_PTCO7(uint32 value) {
1387 return ((value << +Shift::PCOR_PTCO7) & +Mask::PCOR_PTCO7);
1388 }
1389
1399 static inline constexpr uint32 PCOR_PTCO8(uint32 value) {
1400 return ((value << +Shift::PCOR_PTCO8) & +Mask::PCOR_PTCO8);
1401 }
1402
1412 static inline constexpr uint32 PCOR_PTCO9(uint32 value) {
1413 return ((value << +Shift::PCOR_PTCO9) & +Mask::PCOR_PTCO9);
1414 }
1415
1425 static inline constexpr uint32 PCOR_PTCO10(uint32 value) {
1426 return ((value << +Shift::PCOR_PTCO10) & +Mask::PCOR_PTCO10);
1427 }
1428
1438 static inline constexpr uint32 PCOR_PTCO11(uint32 value) {
1439 return ((value << +Shift::PCOR_PTCO11) & +Mask::PCOR_PTCO11);
1440 }
1441
1451 static inline constexpr uint32 PCOR_PTCO12(uint32 value) {
1452 return ((value << +Shift::PCOR_PTCO12) & +Mask::PCOR_PTCO12);
1453 }
1454
1464 static inline constexpr uint32 PCOR_PTCO13(uint32 value) {
1465 return ((value << +Shift::PCOR_PTCO13) & +Mask::PCOR_PTCO13);
1466 }
1467
1477 static inline constexpr uint32 PCOR_PTCO14(uint32 value) {
1478 return ((value << +Shift::PCOR_PTCO14) & +Mask::PCOR_PTCO14);
1479 }
1480
1490 static inline constexpr uint32 PCOR_PTCO15(uint32 value) {
1491 return ((value << +Shift::PCOR_PTCO15) & +Mask::PCOR_PTCO15);
1492 }
1493
1503 static inline constexpr uint32 PCOR_PTCO16(uint32 value) {
1504 return ((value << +Shift::PCOR_PTCO16) & +Mask::PCOR_PTCO16);
1505 }
1506
1516 static inline constexpr uint32 PCOR_PTCO17(uint32 value) {
1517 return ((value << +Shift::PCOR_PTCO17) & +Mask::PCOR_PTCO17);
1518 }
1519
1529 static inline constexpr uint32 PCOR_PTCO18(uint32 value) {
1530 return ((value << +Shift::PCOR_PTCO18) & +Mask::PCOR_PTCO18);
1531 }
1532
1542 static inline constexpr uint32 PCOR_PTCO19(uint32 value) {
1543 return ((value << +Shift::PCOR_PTCO19) & +Mask::PCOR_PTCO19);
1544 }
1545
1555 static inline constexpr uint32 PCOR_PTCO20(uint32 value) {
1556 return ((value << +Shift::PCOR_PTCO20) & +Mask::PCOR_PTCO20);
1557 }
1558
1568 static inline constexpr uint32 PCOR_PTCO21(uint32 value) {
1569 return ((value << +Shift::PCOR_PTCO21) & +Mask::PCOR_PTCO21);
1570 }
1571
1581 static inline constexpr uint32 PCOR_PTCO22(uint32 value) {
1582 return ((value << +Shift::PCOR_PTCO22) & +Mask::PCOR_PTCO22);
1583 }
1584
1594 static inline constexpr uint32 PCOR_PTCO23(uint32 value) {
1595 return ((value << +Shift::PCOR_PTCO23) & +Mask::PCOR_PTCO23);
1596 }
1597
1607 static inline constexpr uint32 PCOR_PTCO24(uint32 value) {
1608 return ((value << +Shift::PCOR_PTCO24) & +Mask::PCOR_PTCO24);
1609 }
1610
1620 static inline constexpr uint32 PCOR_PTCO25(uint32 value) {
1621 return ((value << +Shift::PCOR_PTCO25) & +Mask::PCOR_PTCO25);
1622 }
1623
1633 static inline constexpr uint32 PCOR_PTCO26(uint32 value) {
1634 return ((value << +Shift::PCOR_PTCO26) & +Mask::PCOR_PTCO26);
1635 }
1636
1646 static inline constexpr uint32 PCOR_PTCO27(uint32 value) {
1647 return ((value << +Shift::PCOR_PTCO27) & +Mask::PCOR_PTCO27);
1648 }
1649
1659 static inline constexpr uint32 PCOR_PTCO28(uint32 value) {
1660 return ((value << +Shift::PCOR_PTCO28) & +Mask::PCOR_PTCO28);
1661 }
1662
1672 static inline constexpr uint32 PCOR_PTCO29(uint32 value) {
1673 return ((value << +Shift::PCOR_PTCO29) & +Mask::PCOR_PTCO29);
1674 }
1675
1685 static inline constexpr uint32 PCOR_PTCO30(uint32 value) {
1686 return ((value << +Shift::PCOR_PTCO30) & +Mask::PCOR_PTCO30);
1687 }
1688
1698 static inline constexpr uint32 PCOR_PTCO31(uint32 value) {
1699 return ((value << +Shift::PCOR_PTCO31) & +Mask::PCOR_PTCO31);
1700 }
1701
1711 static inline constexpr uint32 PTOR_PTTO0(uint32 value) {
1712 return ((value << +Shift::PTOR_PTTO0) & +Mask::PTOR_PTTO0);
1713 }
1714
1724 static inline constexpr uint32 PTOR_PTTO1(uint32 value) {
1725 return ((value << +Shift::PTOR_PTTO1) & +Mask::PTOR_PTTO1);
1726 }
1727
1737 static inline constexpr uint32 PTOR_PTTO2(uint32 value) {
1738 return ((value << +Shift::PTOR_PTTO2) & +Mask::PTOR_PTTO2);
1739 }
1740
1750 static inline constexpr uint32 PTOR_PTTO3(uint32 value) {
1751 return ((value << +Shift::PTOR_PTTO3) & +Mask::PTOR_PTTO3);
1752 }
1753
1763 static inline constexpr uint32 PTOR_PTTO4(uint32 value) {
1764 return ((value << +Shift::PTOR_PTTO4) & +Mask::PTOR_PTTO4);
1765 }
1766
1776 static inline constexpr uint32 PTOR_PTTO5(uint32 value) {
1777 return ((value << +Shift::PTOR_PTTO5) & +Mask::PTOR_PTTO5);
1778 }
1779
1789 static inline constexpr uint32 PTOR_PTTO6(uint32 value) {
1790 return ((value << +Shift::PTOR_PTTO6) & +Mask::PTOR_PTTO6);
1791 }
1792
1802 static inline constexpr uint32 PTOR_PTTO7(uint32 value) {
1803 return ((value << +Shift::PTOR_PTTO7) & +Mask::PTOR_PTTO7);
1804 }
1805
1815 static inline constexpr uint32 PTOR_PTTO8(uint32 value) {
1816 return ((value << +Shift::PTOR_PTTO8) & +Mask::PTOR_PTTO8);
1817 }
1818
1828 static inline constexpr uint32 PTOR_PTTO9(uint32 value) {
1829 return ((value << +Shift::PTOR_PTTO9) & +Mask::PTOR_PTTO9);
1830 }
1831
1841 static inline constexpr uint32 PTOR_PTTO10(uint32 value) {
1842 return ((value << +Shift::PTOR_PTTO10) & +Mask::PTOR_PTTO10);
1843 }
1844
1854 static inline constexpr uint32 PTOR_PTTO11(uint32 value) {
1855 return ((value << +Shift::PTOR_PTTO11) & +Mask::PTOR_PTTO11);
1856 }
1857
1867 static inline constexpr uint32 PTOR_PTTO12(uint32 value) {
1868 return ((value << +Shift::PTOR_PTTO12) & +Mask::PTOR_PTTO12);
1869 }
1870
1880 static inline constexpr uint32 PTOR_PTTO13(uint32 value) {
1881 return ((value << +Shift::PTOR_PTTO13) & +Mask::PTOR_PTTO13);
1882 }
1883
1893 static inline constexpr uint32 PTOR_PTTO14(uint32 value) {
1894 return ((value << +Shift::PTOR_PTTO14) & +Mask::PTOR_PTTO14);
1895 }
1896
1906 static inline constexpr uint32 PTOR_PTTO15(uint32 value) {
1907 return ((value << +Shift::PTOR_PTTO15) & +Mask::PTOR_PTTO15);
1908 }
1909
1919 static inline constexpr uint32 PTOR_PTTO16(uint32 value) {
1920 return ((value << +Shift::PTOR_PTTO16) & +Mask::PTOR_PTTO16);
1921 }
1922
1932 static inline constexpr uint32 PTOR_PTTO17(uint32 value) {
1933 return ((value << +Shift::PTOR_PTTO17) & +Mask::PTOR_PTTO17);
1934 }
1935
1945 static inline constexpr uint32 PTOR_PTTO18(uint32 value) {
1946 return ((value << +Shift::PTOR_PTTO18) & +Mask::PTOR_PTTO18);
1947 }
1948
1958 static inline constexpr uint32 PTOR_PTTO19(uint32 value) {
1959 return ((value << +Shift::PTOR_PTTO19) & +Mask::PTOR_PTTO19);
1960 }
1961
1971 static inline constexpr uint32 PTOR_PTTO20(uint32 value) {
1972 return ((value << +Shift::PTOR_PTTO20) & +Mask::PTOR_PTTO20);
1973 }
1974
1984 static inline constexpr uint32 PTOR_PTTO21(uint32 value) {
1985 return ((value << +Shift::PTOR_PTTO21) & +Mask::PTOR_PTTO21);
1986 }
1987
1997 static inline constexpr uint32 PTOR_PTTO22(uint32 value) {
1998 return ((value << +Shift::PTOR_PTTO22) & +Mask::PTOR_PTTO22);
1999 }
2000
2010 static inline constexpr uint32 PTOR_PTTO23(uint32 value) {
2011 return ((value << +Shift::PTOR_PTTO23) & +Mask::PTOR_PTTO23);
2012 }
2013
2023 static inline constexpr uint32 PTOR_PTTO24(uint32 value) {
2024 return ((value << +Shift::PTOR_PTTO24) & +Mask::PTOR_PTTO24);
2025 }
2026
2036 static inline constexpr uint32 PTOR_PTTO25(uint32 value) {
2037 return ((value << +Shift::PTOR_PTTO25) & +Mask::PTOR_PTTO25);
2038 }
2039
2049 static inline constexpr uint32 PTOR_PTTO26(uint32 value) {
2050 return ((value << +Shift::PTOR_PTTO26) & +Mask::PTOR_PTTO26);
2051 }
2052
2062 static inline constexpr uint32 PTOR_PTTO27(uint32 value) {
2063 return ((value << +Shift::PTOR_PTTO27) & +Mask::PTOR_PTTO27);
2064 }
2065
2075 static inline constexpr uint32 PTOR_PTTO28(uint32 value) {
2076 return ((value << +Shift::PTOR_PTTO28) & +Mask::PTOR_PTTO28);
2077 }
2078
2088 static inline constexpr uint32 PTOR_PTTO29(uint32 value) {
2089 return ((value << +Shift::PTOR_PTTO29) & +Mask::PTOR_PTTO29);
2090 }
2091
2101 static inline constexpr uint32 PTOR_PTTO30(uint32 value) {
2102 return ((value << +Shift::PTOR_PTTO30) & +Mask::PTOR_PTTO30);
2103 }
2104
2114 static inline constexpr uint32 PTOR_PTTO31(uint32 value) {
2115 return ((value << +Shift::PTOR_PTTO31) & +Mask::PTOR_PTTO31);
2116 }
2117
2127 static inline constexpr uint32 PDIR_PDI0(uint32 value) {
2128 return ((value << +Shift::PDIR_PDI0) & +Mask::PDIR_PDI0);
2129 }
2130
2140 static inline constexpr uint32 PDIR_PDI1(uint32 value) {
2141 return ((value << +Shift::PDIR_PDI1) & +Mask::PDIR_PDI1);
2142 }
2143
2153 static inline constexpr uint32 PDIR_PDI2(uint32 value) {
2154 return ((value << +Shift::PDIR_PDI2) & +Mask::PDIR_PDI2);
2155 }
2156
2166 static inline constexpr uint32 PDIR_PDI3(uint32 value) {
2167 return ((value << +Shift::PDIR_PDI3) & +Mask::PDIR_PDI3);
2168 }
2169
2179 static inline constexpr uint32 PDIR_PDI4(uint32 value) {
2180 return ((value << +Shift::PDIR_PDI4) & +Mask::PDIR_PDI4);
2181 }
2182
2192 static inline constexpr uint32 PDIR_PDI5(uint32 value) {
2193 return ((value << +Shift::PDIR_PDI5) & +Mask::PDIR_PDI5);
2194 }
2195
2205 static inline constexpr uint32 PDIR_PDI6(uint32 value) {
2206 return ((value << +Shift::PDIR_PDI6) & +Mask::PDIR_PDI6);
2207 }
2208
2218 static inline constexpr uint32 PDIR_PDI7(uint32 value) {
2219 return ((value << +Shift::PDIR_PDI7) & +Mask::PDIR_PDI7);
2220 }
2221
2231 static inline constexpr uint32 PDIR_PDI8(uint32 value) {
2232 return ((value << +Shift::PDIR_PDI8) & +Mask::PDIR_PDI8);
2233 }
2234
2244 static inline constexpr uint32 PDIR_PDI9(uint32 value) {
2245 return ((value << +Shift::PDIR_PDI9) & +Mask::PDIR_PDI9);
2246 }
2247
2257 static inline constexpr uint32 PDIR_PDI10(uint32 value) {
2258 return ((value << +Shift::PDIR_PDI10) & +Mask::PDIR_PDI10);
2259 }
2260
2270 static inline constexpr uint32 PDIR_PDI11(uint32 value) {
2271 return ((value << +Shift::PDIR_PDI11) & +Mask::PDIR_PDI11);
2272 }
2273
2283 static inline constexpr uint32 PDIR_PDI12(uint32 value) {
2284 return ((value << +Shift::PDIR_PDI12) & +Mask::PDIR_PDI12);
2285 }
2286
2296 static inline constexpr uint32 PDIR_PDI13(uint32 value) {
2297 return ((value << +Shift::PDIR_PDI13) & +Mask::PDIR_PDI13);
2298 }
2299
2309 static inline constexpr uint32 PDIR_PDI14(uint32 value) {
2310 return ((value << +Shift::PDIR_PDI14) & +Mask::PDIR_PDI14);
2311 }
2312
2322 static inline constexpr uint32 PDIR_PDI15(uint32 value) {
2323 return ((value << +Shift::PDIR_PDI15) & +Mask::PDIR_PDI15);
2324 }
2325
2335 static inline constexpr uint32 PDIR_PDI16(uint32 value) {
2336 return ((value << +Shift::PDIR_PDI16) & +Mask::PDIR_PDI16);
2337 }
2338
2348 static inline constexpr uint32 PDIR_PDI17(uint32 value) {
2349 return ((value << +Shift::PDIR_PDI17) & +Mask::PDIR_PDI17);
2350 }
2351
2361 static inline constexpr uint32 PDIR_PDI18(uint32 value) {
2362 return ((value << +Shift::PDIR_PDI18) & +Mask::PDIR_PDI18);
2363 }
2364
2374 static inline constexpr uint32 PDIR_PDI19(uint32 value) {
2375 return ((value << +Shift::PDIR_PDI19) & +Mask::PDIR_PDI19);
2376 }
2377
2387 static inline constexpr uint32 PDIR_PDI20(uint32 value) {
2388 return ((value << +Shift::PDIR_PDI20) & +Mask::PDIR_PDI20);
2389 }
2390
2400 static inline constexpr uint32 PDIR_PDI21(uint32 value) {
2401 return ((value << +Shift::PDIR_PDI21) & +Mask::PDIR_PDI21);
2402 }
2403
2413 static inline constexpr uint32 PDIR_PDI22(uint32 value) {
2414 return ((value << +Shift::PDIR_PDI22) & +Mask::PDIR_PDI22);
2415 }
2416
2426 static inline constexpr uint32 PDIR_PDI23(uint32 value) {
2427 return ((value << +Shift::PDIR_PDI23) & +Mask::PDIR_PDI23);
2428 }
2429
2439 static inline constexpr uint32 PDIR_PDI24(uint32 value) {
2440 return ((value << +Shift::PDIR_PDI24) & +Mask::PDIR_PDI24);
2441 }
2442
2452 static inline constexpr uint32 PDIR_PDI25(uint32 value) {
2453 return ((value << +Shift::PDIR_PDI25) & +Mask::PDIR_PDI25);
2454 }
2455
2465 static inline constexpr uint32 PDIR_PDI26(uint32 value) {
2466 return ((value << +Shift::PDIR_PDI26) & +Mask::PDIR_PDI26);
2467 }
2468
2478 static inline constexpr uint32 PDIR_PDI27(uint32 value) {
2479 return ((value << +Shift::PDIR_PDI27) & +Mask::PDIR_PDI27);
2480 }
2481
2491 static inline constexpr uint32 PDIR_PDI28(uint32 value) {
2492 return ((value << +Shift::PDIR_PDI28) & +Mask::PDIR_PDI28);
2493 }
2494
2504 static inline constexpr uint32 PDIR_PDI29(uint32 value) {
2505 return ((value << +Shift::PDIR_PDI29) & +Mask::PDIR_PDI29);
2506 }
2507
2517 static inline constexpr uint32 PDIR_PDI30(uint32 value) {
2518 return ((value << +Shift::PDIR_PDI30) & +Mask::PDIR_PDI30);
2519 }
2520
2530 static inline constexpr uint32 PDIR_PDI31(uint32 value) {
2531 return ((value << +Shift::PDIR_PDI31) & +Mask::PDIR_PDI31);
2532 }
2533
2543 static inline constexpr uint32 PDDR_PDD0(uint32 value) {
2544 return ((value << +Shift::PDDR_PDD0) & +Mask::PDDR_PDD0);
2545 }
2546
2556 static inline constexpr uint32 PDDR_PDD1(uint32 value) {
2557 return ((value << +Shift::PDDR_PDD1) & +Mask::PDDR_PDD1);
2558 }
2559
2569 static inline constexpr uint32 PDDR_PDD2(uint32 value) {
2570 return ((value << +Shift::PDDR_PDD2) & +Mask::PDDR_PDD2);
2571 }
2572
2582 static inline constexpr uint32 PDDR_PDD3(uint32 value) {
2583 return ((value << +Shift::PDDR_PDD3) & +Mask::PDDR_PDD3);
2584 }
2585
2595 static inline constexpr uint32 PDDR_PDD4(uint32 value) {
2596 return ((value << +Shift::PDDR_PDD4) & +Mask::PDDR_PDD4);
2597 }
2598
2608 static inline constexpr uint32 PDDR_PDD5(uint32 value) {
2609 return ((value << +Shift::PDDR_PDD5) & +Mask::PDDR_PDD5);
2610 }
2611
2621 static inline constexpr uint32 PDDR_PDD6(uint32 value) {
2622 return ((value << +Shift::PDDR_PDD6) & +Mask::PDDR_PDD6);
2623 }
2624
2634 static inline constexpr uint32 PDDR_PDD7(uint32 value) {
2635 return ((value << +Shift::PDDR_PDD7) & +Mask::PDDR_PDD7);
2636 }
2637
2647 static inline constexpr uint32 PDDR_PDD8(uint32 value) {
2648 return ((value << +Shift::PDDR_PDD8) & +Mask::PDDR_PDD8);
2649 }
2650
2660 static inline constexpr uint32 PDDR_PDD9(uint32 value) {
2661 return ((value << +Shift::PDDR_PDD9) & +Mask::PDDR_PDD9);
2662 }
2663
2673 static inline constexpr uint32 PDDR_PDD10(uint32 value) {
2674 return ((value << +Shift::PDDR_PDD10) & +Mask::PDDR_PDD10);
2675 }
2676
2686 static inline constexpr uint32 PDDR_PDD11(uint32 value) {
2687 return ((value << +Shift::PDDR_PDD11) & +Mask::PDDR_PDD11);
2688 }
2689
2699 static inline constexpr uint32 PDDR_PDD12(uint32 value) {
2700 return ((value << +Shift::PDDR_PDD12) & +Mask::PDDR_PDD12);
2701 }
2702
2712 static inline constexpr uint32 PDDR_PDD13(uint32 value) {
2713 return ((value << +Shift::PDDR_PDD13) & +Mask::PDDR_PDD13);
2714 }
2715
2725 static inline constexpr uint32 PDDR_PDD14(uint32 value) {
2726 return ((value << +Shift::PDDR_PDD14) & +Mask::PDDR_PDD14);
2727 }
2728
2738 static inline constexpr uint32 PDDR_PDD15(uint32 value) {
2739 return ((value << +Shift::PDDR_PDD15) & +Mask::PDDR_PDD15);
2740 }
2741
2751 static inline constexpr uint32 PDDR_PDD16(uint32 value) {
2752 return ((value << +Shift::PDDR_PDD16) & +Mask::PDDR_PDD16);
2753 }
2754
2764 static inline constexpr uint32 PDDR_PDD17(uint32 value) {
2765 return ((value << +Shift::PDDR_PDD17) & +Mask::PDDR_PDD17);
2766 }
2767
2777 static inline constexpr uint32 PDDR_PDD18(uint32 value) {
2778 return ((value << +Shift::PDDR_PDD18) & +Mask::PDDR_PDD18);
2779 }
2780
2790 static inline constexpr uint32 PDDR_PDD19(uint32 value) {
2791 return ((value << +Shift::PDDR_PDD19) & +Mask::PDDR_PDD19);
2792 }
2793
2803 static inline constexpr uint32 PDDR_PDD20(uint32 value) {
2804 return ((value << +Shift::PDDR_PDD20) & +Mask::PDDR_PDD20);
2805 }
2806
2816 static inline constexpr uint32 PDDR_PDD21(uint32 value) {
2817 return ((value << +Shift::PDDR_PDD21) & +Mask::PDDR_PDD21);
2818 }
2819
2829 static inline constexpr uint32 PDDR_PDD22(uint32 value) {
2830 return ((value << +Shift::PDDR_PDD22) & +Mask::PDDR_PDD22);
2831 }
2832
2842 static inline constexpr uint32 PDDR_PDD23(uint32 value) {
2843 return ((value << +Shift::PDDR_PDD23) & +Mask::PDDR_PDD23);
2844 }
2845
2855 static inline constexpr uint32 PDDR_PDD24(uint32 value) {
2856 return ((value << +Shift::PDDR_PDD24) & +Mask::PDDR_PDD24);
2857 }
2858
2868 static inline constexpr uint32 PDDR_PDD25(uint32 value) {
2869 return ((value << +Shift::PDDR_PDD25) & +Mask::PDDR_PDD25);
2870 }
2871
2881 static inline constexpr uint32 PDDR_PDD26(uint32 value) {
2882 return ((value << +Shift::PDDR_PDD26) & +Mask::PDDR_PDD26);
2883 }
2884
2894 static inline constexpr uint32 PDDR_PDD27(uint32 value) {
2895 return ((value << +Shift::PDDR_PDD27) & +Mask::PDDR_PDD27);
2896 }
2897
2907 static inline constexpr uint32 PDDR_PDD28(uint32 value) {
2908 return ((value << +Shift::PDDR_PDD28) & +Mask::PDDR_PDD28);
2909 }
2910
2920 static inline constexpr uint32 PDDR_PDD29(uint32 value) {
2921 return ((value << +Shift::PDDR_PDD29) & +Mask::PDDR_PDD29);
2922 }
2923
2933 static inline constexpr uint32 PDDR_PDD30(uint32 value) {
2934 return ((value << +Shift::PDDR_PDD30) & +Mask::PDDR_PDD30);
2935 }
2936
2946 static inline constexpr uint32 PDDR_PDD31(uint32 value) {
2947 return ((value << +Shift::PDDR_PDD31) & +Mask::PDDR_PDD31);
2948 }
2949
2959 static inline constexpr uint32 PIDR_PID0(uint32 value) {
2960 return ((value << +Shift::PIDR_PID0) & +Mask::PIDR_PID0);
2961 }
2962
2972 static inline constexpr uint32 PIDR_PID1(uint32 value) {
2973 return ((value << +Shift::PIDR_PID1) & +Mask::PIDR_PID1);
2974 }
2975
2985 static inline constexpr uint32 PIDR_PID2(uint32 value) {
2986 return ((value << +Shift::PIDR_PID2) & +Mask::PIDR_PID2);
2987 }
2988
2998 static inline constexpr uint32 PIDR_PID3(uint32 value) {
2999 return ((value << +Shift::PIDR_PID3) & +Mask::PIDR_PID3);
3000 }
3001
3011 static inline constexpr uint32 PIDR_PID4(uint32 value) {
3012 return ((value << +Shift::PIDR_PID4) & +Mask::PIDR_PID4);
3013 }
3014
3024 static inline constexpr uint32 PIDR_PID5(uint32 value) {
3025 return ((value << +Shift::PIDR_PID5) & +Mask::PIDR_PID5);
3026 }
3027
3037 static inline constexpr uint32 PIDR_PID6(uint32 value) {
3038 return ((value << +Shift::PIDR_PID6) & +Mask::PIDR_PID6);
3039 }
3040
3050 static inline constexpr uint32 PIDR_PID7(uint32 value) {
3051 return ((value << +Shift::PIDR_PID7) & +Mask::PIDR_PID7);
3052 }
3053
3063 static inline constexpr uint32 PIDR_PID8(uint32 value) {
3064 return ((value << +Shift::PIDR_PID8) & +Mask::PIDR_PID8);
3065 }
3066
3076 static inline constexpr uint32 PIDR_PID9(uint32 value) {
3077 return ((value << +Shift::PIDR_PID9) & +Mask::PIDR_PID9);
3078 }
3079
3089 static inline constexpr uint32 PIDR_PID10(uint32 value) {
3090 return ((value << +Shift::PIDR_PID10) & +Mask::PIDR_PID10);
3091 }
3092
3102 static inline constexpr uint32 PIDR_PID11(uint32 value) {
3103 return ((value << +Shift::PIDR_PID11) & +Mask::PIDR_PID11);
3104 }
3105
3115 static inline constexpr uint32 PIDR_PID12(uint32 value) {
3116 return ((value << +Shift::PIDR_PID12) & +Mask::PIDR_PID12);
3117 }
3118
3128 static inline constexpr uint32 PIDR_PID13(uint32 value) {
3129 return ((value << +Shift::PIDR_PID13) & +Mask::PIDR_PID13);
3130 }
3131
3141 static inline constexpr uint32 PIDR_PID14(uint32 value) {
3142 return ((value << +Shift::PIDR_PID14) & +Mask::PIDR_PID14);
3143 }
3144
3154 static inline constexpr uint32 PIDR_PID15(uint32 value) {
3155 return ((value << +Shift::PIDR_PID15) & +Mask::PIDR_PID15);
3156 }
3157
3167 static inline constexpr uint32 PIDR_PID16(uint32 value) {
3168 return ((value << +Shift::PIDR_PID16) & +Mask::PIDR_PID16);
3169 }
3170
3180 static inline constexpr uint32 PIDR_PID17(uint32 value) {
3181 return ((value << +Shift::PIDR_PID17) & +Mask::PIDR_PID17);
3182 }
3183
3193 static inline constexpr uint32 PIDR_PID18(uint32 value) {
3194 return ((value << +Shift::PIDR_PID18) & +Mask::PIDR_PID18);
3195 }
3196
3206 static inline constexpr uint32 PIDR_PID19(uint32 value) {
3207 return ((value << +Shift::PIDR_PID19) & +Mask::PIDR_PID19);
3208 }
3209
3219 static inline constexpr uint32 PIDR_PID20(uint32 value) {
3220 return ((value << +Shift::PIDR_PID20) & +Mask::PIDR_PID20);
3221 }
3222
3232 static inline constexpr uint32 PIDR_PID21(uint32 value) {
3233 return ((value << +Shift::PIDR_PID21) & +Mask::PIDR_PID21);
3234 }
3235
3245 static inline constexpr uint32 PIDR_PID22(uint32 value) {
3246 return ((value << +Shift::PIDR_PID22) & +Mask::PIDR_PID22);
3247 }
3248
3258 static inline constexpr uint32 PIDR_PID23(uint32 value) {
3259 return ((value << +Shift::PIDR_PID23) & +Mask::PIDR_PID23);
3260 }
3261
3271 static inline constexpr uint32 PIDR_PID24(uint32 value) {
3272 return ((value << +Shift::PIDR_PID24) & +Mask::PIDR_PID24);
3273 }
3274
3284 static inline constexpr uint32 PIDR_PID25(uint32 value) {
3285 return ((value << +Shift::PIDR_PID25) & +Mask::PIDR_PID25);
3286 }
3287
3297 static inline constexpr uint32 PIDR_PID26(uint32 value) {
3298 return ((value << +Shift::PIDR_PID26) & +Mask::PIDR_PID26);
3299 }
3300
3310 static inline constexpr uint32 PIDR_PID27(uint32 value) {
3311 return ((value << +Shift::PIDR_PID27) & +Mask::PIDR_PID27);
3312 }
3313
3323 static inline constexpr uint32 PIDR_PID28(uint32 value) {
3324 return ((value << +Shift::PIDR_PID28) & +Mask::PIDR_PID28);
3325 }
3326
3336 static inline constexpr uint32 PIDR_PID29(uint32 value) {
3337 return ((value << +Shift::PIDR_PID29) & +Mask::PIDR_PID29);
3338 }
3339
3349 static inline constexpr uint32 PIDR_PID30(uint32 value) {
3350 return ((value << +Shift::PIDR_PID30) & +Mask::PIDR_PID30);
3351 }
3352
3362 static inline constexpr uint32 PIDR_PID31(uint32 value) {
3363 return ((value << +Shift::PIDR_PID31) & +Mask::PIDR_PID31);
3364 }
3365
3375 static inline constexpr uint8 PDR_PD(uint8 value) {
3376 return static_cast<uint8>((value << static_cast<uint8>(+Shift::PDR_PD)) &
3377 static_cast<uint8>(+Mask::PDR_PD));
3378 }
3379
3421 static inline constexpr uint32 ICR_IRQC(uint32 value) {
3422 return ((value << +Shift::ICR_IRQC) & +Mask::ICR_IRQC);
3423 }
3424
3438 static inline constexpr uint32 ICR_ISF(uint32 value) {
3439 return ((value << +Shift::ICR_ISF) & +Mask::ICR_ISF);
3440 }
3441
3451 static inline constexpr uint32 GICLR_GIWE0(uint32 value) {
3452 return ((value << +Shift::GICLR_GIWE0) & +Mask::GICLR_GIWE0);
3453 }
3454
3464 static inline constexpr uint32 GICLR_GIWE1(uint32 value) {
3465 return ((value << +Shift::GICLR_GIWE1) & +Mask::GICLR_GIWE1);
3466 }
3467
3477 static inline constexpr uint32 GICLR_GIWE2(uint32 value) {
3478 return ((value << +Shift::GICLR_GIWE2) & +Mask::GICLR_GIWE2);
3479 }
3480
3490 static inline constexpr uint32 GICLR_GIWE3(uint32 value) {
3491 return ((value << +Shift::GICLR_GIWE3) & +Mask::GICLR_GIWE3);
3492 }
3493
3503 static inline constexpr uint32 GICLR_GIWE4(uint32 value) {
3504 return ((value << +Shift::GICLR_GIWE4) & +Mask::GICLR_GIWE4);
3505 }
3506
3516 static inline constexpr uint32 GICLR_GIWE5(uint32 value) {
3517 return ((value << +Shift::GICLR_GIWE5) & +Mask::GICLR_GIWE5);
3518 }
3519
3529 static inline constexpr uint32 GICLR_GIWE6(uint32 value) {
3530 return ((value << +Shift::GICLR_GIWE6) & +Mask::GICLR_GIWE6);
3531 }
3532
3542 static inline constexpr uint32 GICLR_GIWE7(uint32 value) {
3543 return ((value << +Shift::GICLR_GIWE7) & +Mask::GICLR_GIWE7);
3544 }
3545
3555 static inline constexpr uint32 GICLR_GIWE8(uint32 value) {
3556 return ((value << +Shift::GICLR_GIWE8) & +Mask::GICLR_GIWE8);
3557 }
3558
3568 static inline constexpr uint32 GICLR_GIWE9(uint32 value) {
3569 return ((value << +Shift::GICLR_GIWE9) & +Mask::GICLR_GIWE9);
3570 }
3571
3581 static inline constexpr uint32 GICLR_GIWE10(uint32 value) {
3582 return ((value << +Shift::GICLR_GIWE10) & +Mask::GICLR_GIWE10);
3583 }
3584
3594 static inline constexpr uint32 GICLR_GIWE11(uint32 value) {
3595 return ((value << +Shift::GICLR_GIWE11) & +Mask::GICLR_GIWE11);
3596 }
3597
3607 static inline constexpr uint32 GICLR_GIWE12(uint32 value) {
3608 return ((value << +Shift::GICLR_GIWE12) & +Mask::GICLR_GIWE12);
3609 }
3610
3620 static inline constexpr uint32 GICLR_GIWE13(uint32 value) {
3621 return ((value << +Shift::GICLR_GIWE13) & +Mask::GICLR_GIWE13);
3622 }
3623
3633 static inline constexpr uint32 GICLR_GIWE14(uint32 value) {
3634 return ((value << +Shift::GICLR_GIWE14) & +Mask::GICLR_GIWE14);
3635 }
3636
3646 static inline constexpr uint32 GICLR_GIWE15(uint32 value) {
3647 return ((value << +Shift::GICLR_GIWE15) & +Mask::GICLR_GIWE15);
3648 }
3649
3655 static inline constexpr uint32 GICLR_GIWD(uint32 value) {
3656 return ((value << +Shift::GICLR_GIWD) & +Mask::GICLR_GIWD);
3657 }
3658
3668 static inline constexpr uint32 GICHR_GIWE16(uint32 value) {
3669 return ((value << +Shift::GICHR_GIWE16) & +Mask::GICHR_GIWE16);
3670 }
3671
3681 static inline constexpr uint32 GICHR_GIWE17(uint32 value) {
3682 return ((value << +Shift::GICHR_GIWE17) & +Mask::GICHR_GIWE17);
3683 }
3684
3694 static inline constexpr uint32 GICHR_GIWE18(uint32 value) {
3695 return ((value << +Shift::GICHR_GIWE18) & +Mask::GICHR_GIWE18);
3696 }
3697
3707 static inline constexpr uint32 GICHR_GIWE19(uint32 value) {
3708 return ((value << +Shift::GICHR_GIWE19) & +Mask::GICHR_GIWE19);
3709 }
3710
3720 static inline constexpr uint32 GICHR_GIWE20(uint32 value) {
3721 return ((value << +Shift::GICHR_GIWE20) & +Mask::GICHR_GIWE20);
3722 }
3723
3733 static inline constexpr uint32 GICHR_GIWE21(uint32 value) {
3734 return ((value << +Shift::GICHR_GIWE21) & +Mask::GICHR_GIWE21);
3735 }
3736
3746 static inline constexpr uint32 GICHR_GIWE22(uint32 value) {
3747 return ((value << +Shift::GICHR_GIWE22) & +Mask::GICHR_GIWE22);
3748 }
3749
3759 static inline constexpr uint32 GICHR_GIWE23(uint32 value) {
3760 return ((value << +Shift::GICHR_GIWE23) & +Mask::GICHR_GIWE23);
3761 }
3762
3772 static inline constexpr uint32 GICHR_GIWE24(uint32 value) {
3773 return ((value << +Shift::GICHR_GIWE24) & +Mask::GICHR_GIWE24);
3774 }
3775
3785 static inline constexpr uint32 GICHR_GIWE25(uint32 value) {
3786 return ((value << +Shift::GICHR_GIWE25) & +Mask::GICHR_GIWE25);
3787 }
3788
3798 static inline constexpr uint32 GICHR_GIWE26(uint32 value) {
3799 return ((value << +Shift::GICHR_GIWE26) & +Mask::GICHR_GIWE26);
3800 }
3801
3811 static inline constexpr uint32 GICHR_GIWE27(uint32 value) {
3812 return ((value << +Shift::GICHR_GIWE27) & +Mask::GICHR_GIWE27);
3813 }
3814
3824 static inline constexpr uint32 GICHR_GIWE28(uint32 value) {
3825 return ((value << +Shift::GICHR_GIWE28) & +Mask::GICHR_GIWE28);
3826 }
3827
3837 static inline constexpr uint32 GICHR_GIWE29(uint32 value) {
3838 return ((value << +Shift::GICHR_GIWE29) & +Mask::GICHR_GIWE29);
3839 }
3840
3850 static inline constexpr uint32 GICHR_GIWE30(uint32 value) {
3851 return ((value << +Shift::GICHR_GIWE30) & +Mask::GICHR_GIWE30);
3852 }
3853
3863 static inline constexpr uint32 GICHR_GIWE31(uint32 value) {
3864 return ((value << +Shift::GICHR_GIWE31) & +Mask::GICHR_GIWE31);
3865 }
3866
3872 static inline constexpr uint32 GICHR_GIWD(uint32 value) {
3873 return ((value << +Shift::GICHR_GIWD) & +Mask::GICHR_GIWD);
3874 }
3875
3889 static inline constexpr uint32 ISFR_ISF0(uint32 value) {
3890 return ((value << +Shift::ISFR_ISF0) & +Mask::ISFR_ISF0);
3891 }
3892
3906 static inline constexpr uint32 ISFR_ISF1(uint32 value) {
3907 return ((value << +Shift::ISFR_ISF1) & +Mask::ISFR_ISF1);
3908 }
3909
3923 static inline constexpr uint32 ISFR_ISF2(uint32 value) {
3924 return ((value << +Shift::ISFR_ISF2) & +Mask::ISFR_ISF2);
3925 }
3926
3940 static inline constexpr uint32 ISFR_ISF3(uint32 value) {
3941 return ((value << +Shift::ISFR_ISF3) & +Mask::ISFR_ISF3);
3942 }
3943
3957 static inline constexpr uint32 ISFR_ISF4(uint32 value) {
3958 return ((value << +Shift::ISFR_ISF4) & +Mask::ISFR_ISF4);
3959 }
3960
3974 static inline constexpr uint32 ISFR_ISF5(uint32 value) {
3975 return ((value << +Shift::ISFR_ISF5) & +Mask::ISFR_ISF5);
3976 }
3977
3991 static inline constexpr uint32 ISFR_ISF6(uint32 value) {
3992 return ((value << +Shift::ISFR_ISF6) & +Mask::ISFR_ISF6);
3993 }
3994
4008 static inline constexpr uint32 ISFR_ISF7(uint32 value) {
4009 return ((value << +Shift::ISFR_ISF7) & +Mask::ISFR_ISF7);
4010 }
4011
4025 static inline constexpr uint32 ISFR_ISF8(uint32 value) {
4026 return ((value << +Shift::ISFR_ISF8) & +Mask::ISFR_ISF8);
4027 }
4028
4042 static inline constexpr uint32 ISFR_ISF9(uint32 value) {
4043 return ((value << +Shift::ISFR_ISF9) & +Mask::ISFR_ISF9);
4044 }
4045
4059 static inline constexpr uint32 ISFR_ISF10(uint32 value) {
4060 return ((value << +Shift::ISFR_ISF10) & +Mask::ISFR_ISF10);
4061 }
4062
4076 static inline constexpr uint32 ISFR_ISF11(uint32 value) {
4077 return ((value << +Shift::ISFR_ISF11) & +Mask::ISFR_ISF11);
4078 }
4079
4093 static inline constexpr uint32 ISFR_ISF12(uint32 value) {
4094 return ((value << +Shift::ISFR_ISF12) & +Mask::ISFR_ISF12);
4095 }
4096
4110 static inline constexpr uint32 ISFR_ISF13(uint32 value) {
4111 return ((value << +Shift::ISFR_ISF13) & +Mask::ISFR_ISF13);
4112 }
4113
4127 static inline constexpr uint32 ISFR_ISF14(uint32 value) {
4128 return ((value << +Shift::ISFR_ISF14) & +Mask::ISFR_ISF14);
4129 }
4130
4144 static inline constexpr uint32 ISFR_ISF15(uint32 value) {
4145 return ((value << +Shift::ISFR_ISF15) & +Mask::ISFR_ISF15);
4146 }
4147
4161 static inline constexpr uint32 ISFR_ISF16(uint32 value) {
4162 return ((value << +Shift::ISFR_ISF16) & +Mask::ISFR_ISF16);
4163 }
4164
4178 static inline constexpr uint32 ISFR_ISF17(uint32 value) {
4179 return ((value << +Shift::ISFR_ISF17) & +Mask::ISFR_ISF17);
4180 }
4181
4195 static inline constexpr uint32 ISFR_ISF18(uint32 value) {
4196 return ((value << +Shift::ISFR_ISF18) & +Mask::ISFR_ISF18);
4197 }
4198
4212 static inline constexpr uint32 ISFR_ISF19(uint32 value) {
4213 return ((value << +Shift::ISFR_ISF19) & +Mask::ISFR_ISF19);
4214 }
4215
4229 static inline constexpr uint32 ISFR_ISF20(uint32 value) {
4230 return ((value << +Shift::ISFR_ISF20) & +Mask::ISFR_ISF20);
4231 }
4232
4246 static inline constexpr uint32 ISFR_ISF21(uint32 value) {
4247 return ((value << +Shift::ISFR_ISF21) & +Mask::ISFR_ISF21);
4248 }
4249
4263 static inline constexpr uint32 ISFR_ISF22(uint32 value) {
4264 return ((value << +Shift::ISFR_ISF22) & +Mask::ISFR_ISF22);
4265 }
4266
4280 static inline constexpr uint32 ISFR_ISF23(uint32 value) {
4281 return ((value << +Shift::ISFR_ISF23) & +Mask::ISFR_ISF23);
4282 }
4283
4297 static inline constexpr uint32 ISFR_ISF24(uint32 value) {
4298 return ((value << +Shift::ISFR_ISF24) & +Mask::ISFR_ISF24);
4299 }
4300
4314 static inline constexpr uint32 ISFR_ISF25(uint32 value) {
4315 return ((value << +Shift::ISFR_ISF25) & +Mask::ISFR_ISF25);
4316 }
4317
4331 static inline constexpr uint32 ISFR_ISF26(uint32 value) {
4332 return ((value << +Shift::ISFR_ISF26) & +Mask::ISFR_ISF26);
4333 }
4334
4348 static inline constexpr uint32 ISFR_ISF27(uint32 value) {
4349 return ((value << +Shift::ISFR_ISF27) & +Mask::ISFR_ISF27);
4350 }
4351
4365 static inline constexpr uint32 ISFR_ISF28(uint32 value) {
4366 return ((value << +Shift::ISFR_ISF28) & +Mask::ISFR_ISF28);
4367 }
4368
4382 static inline constexpr uint32 ISFR_ISF29(uint32 value) {
4383 return ((value << +Shift::ISFR_ISF29) & +Mask::ISFR_ISF29);
4384 }
4385
4399 static inline constexpr uint32 ISFR_ISF30(uint32 value) {
4400 return ((value << +Shift::ISFR_ISF30) & +Mask::ISFR_ISF30);
4401 }
4402
4416 static inline constexpr uint32 ISFR_ISF31(uint32 value) {
4417 return ((value << +Shift::ISFR_ISF31) & +Mask::ISFR_ISF31);
4418 }
4419};
4420
4421/* ***************************************************************************************
4422 * End of file
4423 */
4424
4425#endif /* MCXA153_A3754241_08E1_4F86_B049_0FACC9D70DF5 */
static constexpr uint32 BASE_GPIO0
GPIO0 控制器基地址 - 通用輸入輸出埠0 (0x40102000)
Definition Processor.h:199
static constexpr uint32 BASE_GPIO1
GPIO1 控制器基地址 - 通用輸入輸出埠1 (0x40103000)
Definition Processor.h:201
static constexpr uint32 BASE_GPIO2
GPIO2 控制器基地址 - 通用輸入輸出埠2 (0x40104000)
Definition Processor.h:203
static constexpr uint32 BASE_GPIO3
GPIO3 控制器基地址 - 通用輸入輸出埠3 (0x40105000)
Definition Processor.h:205
MCXA153 通用輸入/輸出 (General Purpose Input/Output) 控制器靜態工具類別
Definition chip/gpio/GPIO.h:139
static constexpr uint32 PDDR_PDD12(uint32 value)
PDDR - PDD12.
Definition chip/gpio/GPIO.h:2699
static constexpr uint32 PDDR_PDD3(uint32 value)
PDDR - PDD3.
Definition chip/gpio/GPIO.h:2582
static constexpr uint32 PDIR_PDI2(uint32 value)
PDIR - PDI2.
Definition chip/gpio/GPIO.h:2153
static constexpr uint32 ISFR_ISF23(uint32 value)
ISFR - ISF23.
Definition chip/gpio/GPIO.h:4280
static constexpr uint32 PDOR_PDO8(uint32 value)
PDOR - PDO8.
Definition chip/gpio/GPIO.h:567
static constexpr uint32 GICLR_GIWE10(uint32 value)
GICLR - GIWE10.
Definition chip/gpio/GPIO.h:3581
static uint8 pinGetInterruptFlag(Register *base, uint32 pin)
Read individual pin's interrupt status flag.
static constexpr uint32 PDDR_PDD31(uint32 value)
PDDR - PDD31.
Definition chip/gpio/GPIO.h:2946
static constexpr uint32 PDIR_PDI17(uint32 value)
PDIR - PDI17.
Definition chip/gpio/GPIO.h:2348
static constexpr uint32 PDOR_PDO27(uint32 value)
PDOR - PDO27.
Definition chip/gpio/GPIO.h:814
static constexpr uint32 GICHR_GIWE18(uint32 value)
GICHR - GIWE18.
Definition chip/gpio/GPIO.h:3694
static constexpr uint32 PSOR_PTSO21(uint32 value)
PSOR - PTSO21.
Definition chip/gpio/GPIO.h:1152
static constexpr uint32 GICHR_GIWE31(uint32 value)
GICHR - GIWE31.
Definition chip/gpio/GPIO.h:3863
static constexpr uint32 VERID_MAJOR(uint32 value)
VERID - MAJOR.
Definition chip/gpio/GPIO.h:441
static constexpr uint32 PDIR_PDI3(uint32 value)
PDIR - PDI3.
Definition chip/gpio/GPIO.h:2166
static constexpr uint32 PDDR_PDD28(uint32 value)
PDDR - PDD28.
Definition chip/gpio/GPIO.h:2907
static constexpr uint32 PIDR_PID11(uint32 value)
PIDR - PID11.
Definition chip/gpio/GPIO.h:3102
static constexpr uint32 ISFR_ISF4(uint32 value)
ISFR - ISF4.
Definition chip/gpio/GPIO.h:3957
static constexpr uint32 PDDR_PDD30(uint32 value)
PDDR - PDD30.
Definition chip/gpio/GPIO.h:2933
static constexpr uint32 PDDR_PDD7(uint32 value)
PDDR - PDD7.
Definition chip/gpio/GPIO.h:2634
static constexpr uint32 PDOR_PDO21(uint32 value)
PDOR - PDO21.
Definition chip/gpio/GPIO.h:736
static constexpr uint32 PDIR_PDI8(uint32 value)
PDIR - PDI8.
Definition chip/gpio/GPIO.h:2231
static constexpr uint32 GICHR_GIWE29(uint32 value)
GICHR - GIWE29.
Definition chip/gpio/GPIO.h:3837
static constexpr uint32 PDDR_PDD17(uint32 value)
PDDR - PDD17.
Definition chip/gpio/GPIO.h:2764
static constexpr uint32 GICLR_GIWD(uint32 value)
GICLR - GIWD.
Definition chip/gpio/GPIO.h:3655
static void setPinInterruptConfig(Register *base, uint32 pin, InterruptConfig config)
Configures the gpio pin interrupt/DMA request.
Definition chip/gpio/GPIO.h:326
static constexpr uint32 PSOR_PTSO6(uint32 value)
PSOR - PTSO6.
Definition chip/gpio/GPIO.h:957
static void pinClearInterruptFlag(Register *base, uint32 pin)
Clear GPIO individual pin's interrupt status flag.
static constexpr uint32 PCOR_PTCO15(uint32 value)
PCOR - PTCO15.
Definition chip/gpio/GPIO.h:1490
static constexpr uint32 ISFR_ISF11(uint32 value)
ISFR - ISF11.
Definition chip/gpio/GPIO.h:4076
static constexpr uint32 PSOR_PTSO7(uint32 value)
PSOR - PTSO7.
Definition chip/gpio/GPIO.h:970
static constexpr uint32 PDIR_PDI20(uint32 value)
PDIR - PDI20.
Definition chip/gpio/GPIO.h:2387
static constexpr uint32 PTOR_PTTO1(uint32 value)
PORT - PTTO1.
Definition chip/gpio/GPIO.h:1724
static constexpr uint32 PIDR_PID29(uint32 value)
PIDR - PID29.
Definition chip/gpio/GPIO.h:3336
static constexpr uint32 PDDR_PDD4(uint32 value)
PDDR - PDD4.
Definition chip/gpio/GPIO.h:2595
static constexpr uint32 PDIR_PDI15(uint32 value)
PDIR - PDI15.
Definition chip/gpio/GPIO.h:2322
static constexpr uint32 PCOR_PTCO1(uint32 value)
PCOR - PTCO1.
Definition chip/gpio/GPIO.h:1308
static constexpr uint32 ISFR_ISF15(uint32 value)
ISFR - ISF15.
Definition chip/gpio/GPIO.h:4144
static constexpr uint32 GICLR_GIWE7(uint32 value)
GICLR - GIWE7.
Definition chip/gpio/GPIO.h:3542
static constexpr uint32 PIDR_PID10(uint32 value)
PIDR - PID10.
Definition chip/gpio/GPIO.h:3089
static constexpr uint32 PDDR_PDD16(uint32 value)
PDDR - PDD16.
Definition chip/gpio/GPIO.h:2751
static constexpr uint32 PIDR_PID20(uint32 value)
PIDR - PID20.
Definition chip/gpio/GPIO.h:3219
static constexpr uint32 ISFR_ISF17(uint32 value)
ISFR - ISF17.
Definition chip/gpio/GPIO.h:4178
static constexpr uint32 PSOR_PTSO30(uint32 value)
PSOR - PTSO30.
Definition chip/gpio/GPIO.h:1269
static uint32 pinRead(Register *base, uint32 pin)
Reads the current input value of the GPIO port.
Definition chip/gpio/GPIO.h:298
static constexpr uint32 ISFR_ISF19(uint32 value)
ISFR - ISF19.
Definition chip/gpio/GPIO.h:4212
static constexpr uint32 PTOR_PTTO16(uint32 value)
PORT - PTTO16.
Definition chip/gpio/GPIO.h:1919
static constexpr uint32 PSOR_PTSO12(uint32 value)
PSOR - PTSO12.
Definition chip/gpio/GPIO.h:1035
static constexpr uint32 PDDR_PDD22(uint32 value)
PDDR - PDD22.
Definition chip/gpio/GPIO.h:2829
static constexpr uint32 PCOR_PTCO7(uint32 value)
PCOR - PTCO7.
Definition chip/gpio/GPIO.h:1386
static constexpr uint32 PDIR_PDI26(uint32 value)
PDIR - PDI26.
Definition chip/gpio/GPIO.h:2465
static constexpr uint32 GICHR_GIWE19(uint32 value)
GICHR - GIWE19.
Definition chip/gpio/GPIO.h:3707
static constexpr uint32 PCOR_PTCO17(uint32 value)
PCOR - PTCO17.
Definition chip/gpio/GPIO.h:1516
static constexpr uint32 PIDR_PID27(uint32 value)
PIDR - PID27.
Definition chip/gpio/GPIO.h:3310
static constexpr uint32 GICHR_GIWE20(uint32 value)
GICHR - GIWE20.
Definition chip/gpio/GPIO.h:3720
static constexpr uint32 PIDR_PID17(uint32 value)
PIDR - PID17.
Definition chip/gpio/GPIO.h:3180
static constexpr uint32 ISFR_ISF6(uint32 value)
ISFR - ISF6.
Definition chip/gpio/GPIO.h:3991
static constexpr uint32 PDOR_PDO25(uint32 value)
PDOR - PDO25.
Definition chip/gpio/GPIO.h:788
static constexpr uint32 PCOR_PTCO13(uint32 value)
PCOR - PTCO13.
Definition chip/gpio/GPIO.h:1464
static constexpr uint32 PDDR_PDD20(uint32 value)
PDDR - PDD20.
Definition chip/gpio/GPIO.h:2803
static constexpr uint32 PCOR_PTCO2(uint32 value)
PCOR - PTCO2.
Definition chip/gpio/GPIO.h:1321
static void pinWrite(Register *base, uint32 pin, uint8 output)
Sets the output level of the multiple GPIO pins to the logic 1 or 0.
Definition chip/gpio/GPIO.h:251
static constexpr uint32 ISFR_ISF18(uint32 value)
ISFR - ISF18.
Definition chip/gpio/GPIO.h:4195
static constexpr uint32 PIDR_PID24(uint32 value)
PIDR - PID24.
Definition chip/gpio/GPIO.h:3271
static constexpr uint32 PTOR_PTTO14(uint32 value)
PORT - PTTO14.
Definition chip/gpio/GPIO.h:1893
static constexpr uint32 PDOR_PDO14(uint32 value)
PDOR - PDO14.
Definition chip/gpio/GPIO.h:645
static constexpr uint32 PDDR_PDD5(uint32 value)
PDDR - PDD5.
Definition chip/gpio/GPIO.h:2608
static constexpr uint32 PDDR_PDD13(uint32 value)
PDDR - PDD13.
Definition chip/gpio/GPIO.h:2712
static constexpr uint32 PTOR_PTTO5(uint32 value)
PORT - PTTO5.
Definition chip/gpio/GPIO.h:1776
static constexpr uint32 PSOR_PTSO1(uint32 value)
PSOR - PTSO1.
Definition chip/gpio/GPIO.h:892
static constexpr uint32 PDIR_PDI14(uint32 value)
PDIR - PDI14.
Definition chip/gpio/GPIO.h:2309
static constexpr uint32 PTOR_PTTO3(uint32 value)
PORT - PTTO3.
Definition chip/gpio/GPIO.h:1750
static constexpr uint32 ICR_ISF(uint32 value)
ICR - ISF.
Definition chip/gpio/GPIO.h:3438
virtual ~GPIO(void) override=default
Destroy the object.
static constexpr uint32 ISFR_ISF27(uint32 value)
ISFR - ISF27.
Definition chip/gpio/GPIO.h:4348
static constexpr uint32 PTOR_PTTO11(uint32 value)
PORT - PTTO11.
Definition chip/gpio/GPIO.h:1854
static void portInputDisable(Register *base, uint32 mask)
Disable port input.
Definition chip/gpio/GPIO.h:238
static constexpr uint32 PSOR_PTSO5(uint32 value)
PSOR - PTSO5.
Definition chip/gpio/GPIO.h:944
static constexpr uint32 PIDR_PID5(uint32 value)
PIDR - PID5.
Definition chip/gpio/GPIO.h:3024
static constexpr uint32 PTOR_PTTO23(uint32 value)
PORT - PTTO23.
Definition chip/gpio/GPIO.h:2010
static void portSet(Register *base, uint32 mask)
Sets the output level of the multiple GPIO pins to the logic 1.
Definition chip/gpio/GPIO.h:265
static constexpr uint32 PTOR_PTTO15(uint32 value)
PORT - PTTO15.
Definition chip/gpio/GPIO.h:1906
static constexpr uint32 PSOR_PTSO15(uint32 value)
PSOR - PTSO15.
Definition chip/gpio/GPIO.h:1074
static constexpr uint32 PDDR_PDD9(uint32 value)
PDDR - PDD9.
Definition chip/gpio/GPIO.h:2660
static constexpr uint32 PDDR_PDD0(uint32 value)
PDDR - PDD0.
Definition chip/gpio/GPIO.h:2543
static constexpr uint32 PDOR_PDO20(uint32 value)
PDOR - PDO20.
Definition chip/gpio/GPIO.h:723
static constexpr uint32 PTOR_PTTO7(uint32 value)
PORT - PTTO7.
Definition chip/gpio/GPIO.h:1802
static constexpr uint32 PDOR_PDO15(uint32 value)
PDOR - PDO15.
Definition chip/gpio/GPIO.h:658
static constexpr uint32 PDOR_PDO18(uint32 value)
PDOR - PDO18.
Definition chip/gpio/GPIO.h:697
static constexpr uint32 PTOR_PTTO19(uint32 value)
PORT - PTTO19.
Definition chip/gpio/GPIO.h:1958
static constexpr uint32 PSOR_PTSO27(uint32 value)
PSOR - PTSO27.
Definition chip/gpio/GPIO.h:1230
static constexpr uint32 GICLR_GIWE12(uint32 value)
GICLR - GIWE12.
Definition chip/gpio/GPIO.h:3607
static constexpr uint32 PTOR_PTTO30(uint32 value)
PORT - PTTO30.
Definition chip/gpio/GPIO.h:2101
static constexpr uint32 PDDR_PDD11(uint32 value)
PDDR - PDD11.
Definition chip/gpio/GPIO.h:2686
static constexpr uint32 PDOR_PDO28(uint32 value)
PDOR - PDO28.
Definition chip/gpio/GPIO.h:827
static constexpr uint32 PIDR_PID21(uint32 value)
PIDR - PID21.
Definition chip/gpio/GPIO.h:3232
static constexpr uint32 PIDR_PID8(uint32 value)
PIDR - PID8.
Definition chip/gpio/GPIO.h:3063
static constexpr uint32 PTOR_PTTO21(uint32 value)
PORT - PTTO21.
Definition chip/gpio/GPIO.h:1984
static constexpr uint32 PDIR_PDI0(uint32 value)
PDIR - PDI0.
Definition chip/gpio/GPIO.h:2127
static constexpr uint32 PSOR_PTSO13(uint32 value)
PSOR - PTSO13.
Definition chip/gpio/GPIO.h:1048
static constexpr uint32 PDIR_PDI31(uint32 value)
PDIR - PDI31.
Definition chip/gpio/GPIO.h:2530
static constexpr uint32 PIDR_PID19(uint32 value)
PIDR - PID19.
Definition chip/gpio/GPIO.h:3206
static constexpr uint32 PDDR_PDD23(uint32 value)
PDDR - PDD23.
Definition chip/gpio/GPIO.h:2842
static constexpr uint32 PDOR_PDO9(uint32 value)
PDOR - PDO9.
Definition chip/gpio/GPIO.h:580
static constexpr uint32 GICLR_GIWE11(uint32 value)
GICLR - GIWE11.
Definition chip/gpio/GPIO.h:3594
static constexpr uint32 PDOR_PDO22(uint32 value)
PDOR - PDO22.
Definition chip/gpio/GPIO.h:749
static constexpr uint32 PDIR_PDI30(uint32 value)
PDIR - PDI30.
Definition chip/gpio/GPIO.h:2517
static constexpr uint32 PDIR_PDI22(uint32 value)
PDIR - PDI22.
Definition chip/gpio/GPIO.h:2413
static constexpr uint32 PDDR_PDD6(uint32 value)
PDDR - PDD6.
Definition chip/gpio/GPIO.h:2621
static constexpr uint32 GICHR_GIWE22(uint32 value)
GICHR - GIWE22.
Definition chip/gpio/GPIO.h:3746
static constexpr uint32 ICR_IRQC(uint32 value)
ICR - IRQC.
Definition chip/gpio/GPIO.h:3421
static constexpr uint32 PIDR_PID13(uint32 value)
PIDR - PID13.
Definition chip/gpio/GPIO.h:3128
static constexpr uint32 ISFR_ISF31(uint32 value)
ISFR - ISF31.
Definition chip/gpio/GPIO.h:4416
static constexpr uint32 GICLR_GIWE5(uint32 value)
GICLR - GIWE5.
Definition chip/gpio/GPIO.h:3516
static constexpr uint32 PSOR_PTSO14(uint32 value)
PSOR - PTSO14.
Definition chip/gpio/GPIO.h:1061
static constexpr uint32 PCOR_PTCO5(uint32 value)
PCOR - PTCO5.
Definition chip/gpio/GPIO.h:1360
static constexpr uint32 PDIR_PDI25(uint32 value)
PDIR - PDI25.
Definition chip/gpio/GPIO.h:2452
static constexpr uint32 GICLR_GIWE1(uint32 value)
GICLR - GIWE1.
Definition chip/gpio/GPIO.h:3464
static constexpr uint32 PIDR_PID31(uint32 value)
PIDR - PID31.
Definition chip/gpio/GPIO.h:3362
static constexpr uint32 PCOR_PTCO18(uint32 value)
PCOR - PTCO18.
Definition chip/gpio/GPIO.h:1529
static constexpr uint8 PDR_PD(uint8 value)
PDR - PD.
Definition chip/gpio/GPIO.h:3375
static constexpr uint32 GICHR_GIWE27(uint32 value)
GICHR - GIWE27.
Definition chip/gpio/GPIO.h:3811
static constexpr uint32 PDIR_PDI4(uint32 value)
PDIR - PDI4.
Definition chip/gpio/GPIO.h:2179
static constexpr uint32 PCOR_PTCO16(uint32 value)
PCOR - PTCO16.
Definition chip/gpio/GPIO.h:1503
static constexpr uint32 PDOR_PDO30(uint32 value)
PDOR - PDO30.
Definition chip/gpio/GPIO.h:853
static constexpr uint32 PIDR_PID12(uint32 value)
PIDR - PID12.
Definition chip/gpio/GPIO.h:3115
static constexpr uint32 GICLR_GIWE9(uint32 value)
GICLR - GIWE9.
Definition chip/gpio/GPIO.h:3568
static constexpr uint32 PDOR_PDO11(uint32 value)
PDOR - PDO11.
Definition chip/gpio/GPIO.h:606
static constexpr uint32 PCOR_PTCO14(uint32 value)
PCOR - PTCO14.
Definition chip/gpio/GPIO.h:1477
static uint32 getPinsDMARequestFlags(Register *base)
Reads the GPIO DMA request flags. The corresponding flag will be cleared automatically at the complet...
Definition chip/gpio/GPIO.h:374
static void getVersionInfo(Register *base, VersionInfo &info)
Get GPIO version information.
static constexpr uint32 PIDR_PID3(uint32 value)
PIDR - PID3.
Definition chip/gpio/GPIO.h:2998
static constexpr uint32 PIDR_PID22(uint32 value)
PIDR - PID22.
Definition chip/gpio/GPIO.h:3245
static void setMultipleInterruptPinsConfig(Register *base, uint32 mask, InterruptConfig config)
Sets the GPIO interrupt configuration in PCR register for multiple pins.
Definition chip/gpio/GPIO.h:402
static constexpr uint32 GICLR_GIWE4(uint32 value)
GICLR - GIWE4.
Definition chip/gpio/GPIO.h:3503
static constexpr uint32 PTOR_PTTO29(uint32 value)
PORT - PTTO29.
Definition chip/gpio/GPIO.h:2088
static constexpr uint32 PDDR_PDD29(uint32 value)
PDDR - PDD29.
Definition chip/gpio/GPIO.h:2920
static constexpr uint32 GICHR_GIWD(uint32 value)
GICHR - GIWD.
Definition chip/gpio/GPIO.h:3872
static constexpr uint32 PDOR_PDO1(uint32 value)
PDOR - PDO1.
Definition chip/gpio/GPIO.h:476
static constexpr uint32 ISFR_ISF8(uint32 value)
ISFR - ISF8.
Definition chip/gpio/GPIO.h:4025
static constexpr uint32 PIDR_PID25(uint32 value)
PIDR - PID25.
Definition chip/gpio/GPIO.h:3284
static constexpr uint32 PDOR_PDO5(uint32 value)
PDOR - PDO5.
Definition chip/gpio/GPIO.h:528
static constexpr uint32 PDDR_PDD14(uint32 value)
PDDR - PDD14.
Definition chip/gpio/GPIO.h:2725
static constexpr uint32 PSOR_PTSO31(uint32 value)
PSOR - PTSO31.
Definition chip/gpio/GPIO.h:1282
static constexpr uint32 PDDR_PDD21(uint32 value)
PDDR - PDD21.
Definition chip/gpio/GPIO.h:2816
static constexpr uint32 PSOR_PTSO0(uint32 value)
PSOR - PTSO0.
Definition chip/gpio/GPIO.h:879
static constexpr uint32 PCOR_PTCO12(uint32 value)
PCOR - PTCO12.
Definition chip/gpio/GPIO.h:1451
static constexpr uint32 PDOR_PDO19(uint32 value)
PDOR - PDO19.
Definition chip/gpio/GPIO.h:710
static constexpr uint32 PDOR_PDO6(uint32 value)
PDOR - PDO6.
Definition chip/gpio/GPIO.h:541
static constexpr uint32 PCOR_PTCO21(uint32 value)
PCOR - PTCO21.
Definition chip/gpio/GPIO.h:1568
static constexpr uint32 GICHR_GIWE21(uint32 value)
GICHR - GIWE21.
Definition chip/gpio/GPIO.h:3733
static constexpr uint32 PDOR_PDO2(uint32 value)
PDOR - PDO2.
Definition chip/gpio/GPIO.h:489
static constexpr uint32 GICHR_GIWE16(uint32 value)
GICHR - GIWE16.
Definition chip/gpio/GPIO.h:3668
static constexpr uint32 PDOR_PDO16(uint32 value)
PDOR - PDO16.
Definition chip/gpio/GPIO.h:671
static constexpr uint32 PDOR_PDO29(uint32 value)
PDOR - PDO29.
Definition chip/gpio/GPIO.h:840
static constexpr uint32 PDOR_PDO26(uint32 value)
PDOR - PDO26.
Definition chip/gpio/GPIO.h:801
static constexpr uint32 ISFR_ISF14(uint32 value)
ISFR - ISF14.
Definition chip/gpio/GPIO.h:4127
static constexpr uint32 PSOR_PTSO18(uint32 value)
PSOR - PTSO18.
Definition chip/gpio/GPIO.h:1113
static constexpr uint32 PDDR_PDD25(uint32 value)
PDDR - PDD25.
Definition chip/gpio/GPIO.h:2868
static constexpr uint32 PIDR_PID2(uint32 value)
PIDR - PID2.
Definition chip/gpio/GPIO.h:2985
static constexpr uint32 PIDR_PID15(uint32 value)
PIDR - PID15.
Definition chip/gpio/GPIO.h:3154
static constexpr uint32 PSOR_PTSO17(uint32 value)
PSOR - PTSO17.
Definition chip/gpio/GPIO.h:1100
static constexpr uint32 PARAM_IRQNUM(uint32 value)
PARAM - IRQNUM.
Definition chip/gpio/GPIO.h:450
static constexpr uint32 PSOR_PTSO22(uint32 value)
PSOR - PTSO22.
Definition chip/gpio/GPIO.h:1165
static constexpr uint32 PDIR_PDI24(uint32 value)
PDIR - PDI24.
Definition chip/gpio/GPIO.h:2439
static constexpr uint32 PDOR_PDO3(uint32 value)
PDOR - PDO3.
Definition chip/gpio/GPIO.h:502
static constexpr uint32 ISFR_ISF16(uint32 value)
ISFR - ISF16.
Definition chip/gpio/GPIO.h:4161
static constexpr uint32 PDDR_PDD8(uint32 value)
PDDR - PDD8.
Definition chip/gpio/GPIO.h:2647
static constexpr uint32 PCOR_PTCO10(uint32 value)
PCOR - PTCO10.
Definition chip/gpio/GPIO.h:1425
static constexpr uint32 PDDR_PDD15(uint32 value)
PDDR - PDD15.
Definition chip/gpio/GPIO.h:2738
static constexpr uint32 PIDR_PID23(uint32 value)
PIDR - PID23.
Definition chip/gpio/GPIO.h:3258
static constexpr uint32 PDOR_PDO31(uint32 value)
PDOR - PDO31.
Definition chip/gpio/GPIO.h:866
static constexpr uint32 PCOR_PTCO26(uint32 value)
PCOR - PTCO26.
Definition chip/gpio/GPIO.h:1633
static constexpr uint32 PSOR_PTSO16(uint32 value)
PSOR - PTSO16.
Definition chip/gpio/GPIO.h:1087
static constexpr uint32 GICLR_GIWE8(uint32 value)
GICLR - GIWE8.
Definition chip/gpio/GPIO.h:3555
static void pinInit(Register *base, uint32 pin, const PinConfig &config)
Initializes a GPIO pin used by the board.
static constexpr uint32 PCOR_PTCO31(uint32 value)
PCOR - PTCO31.
Definition chip/gpio/GPIO.h:1698
static constexpr uint32 PTOR_PTTO26(uint32 value)
PORT - PTTO26.
Definition chip/gpio/GPIO.h:2049
static constexpr uint32 ISFR_ISF5(uint32 value)
ISFR - ISF5.
Definition chip/gpio/GPIO.h:3974
static constexpr uint32 PIDR_PID6(uint32 value)
PIDR - PID6.
Definition chip/gpio/GPIO.h:3037
static void portInputEnable(Register *base, uint32 mask)
Enable port input.
Definition chip/gpio/GPIO.h:228
static constexpr uint32 ISFR_ISF7(uint32 value)
ISFR - ISF7.
Definition chip/gpio/GPIO.h:4008
static constexpr uint32 PDIR_PDI18(uint32 value)
PDIR - PDI18.
Definition chip/gpio/GPIO.h:2361
static constexpr uint32 PDOR_PDO17(uint32 value)
PDOR - PDO17.
Definition chip/gpio/GPIO.h:684
static constexpr uint32 PDIR_PDI6(uint32 value)
PDIR - PDI6.
Definition chip/gpio/GPIO.h:2205
static constexpr uint32 ISFR_ISF0(uint32 value)
ISFR - ISF0.
Definition chip/gpio/GPIO.h:3889
static constexpr uint32 PSOR_PTSO9(uint32 value)
PSOR - PTSO9.
Definition chip/gpio/GPIO.h:996
static constexpr uint32 PDOR_PDO24(uint32 value)
PDOR - PDO24.
Definition chip/gpio/GPIO.h:775
static constexpr uint32 ISFR_ISF10(uint32 value)
ISFR - ISF10.
Definition chip/gpio/GPIO.h:4059
static constexpr uint32 PTOR_PTTO12(uint32 value)
PORT - PTTO12.
Definition chip/gpio/GPIO.h:1867
static constexpr uint32 GICHR_GIWE30(uint32 value)
GICHR - GIWE30.
Definition chip/gpio/GPIO.h:3850
static constexpr uint32 PCOR_PTCO30(uint32 value)
PCOR - PTCO30.
Definition chip/gpio/GPIO.h:1685
static constexpr uint32 GICLR_GIWE3(uint32 value)
GICLR - GIWE3.
Definition chip/gpio/GPIO.h:3490
static constexpr uint32 GICLR_GIWE13(uint32 value)
GICLR - GIWE13.
Definition chip/gpio/GPIO.h:3620
static uint32 gpioGetInterruptFlags(Register *base)
Read the GPIO interrupt status flags.
static constexpr uint32 PDIR_PDI19(uint32 value)
PDIR - PDI19.
Definition chip/gpio/GPIO.h:2374
static constexpr uint32 PDDR_PDD10(uint32 value)
PDDR - PDD10.
Definition chip/gpio/GPIO.h:2673
static constexpr uint32 PTOR_PTTO25(uint32 value)
PORT - PTTO25.
Definition chip/gpio/GPIO.h:2036
static constexpr uint32 PIDR_PID30(uint32 value)
PIDR - PID30.
Definition chip/gpio/GPIO.h:3349
static constexpr uint32 ISFR_ISF24(uint32 value)
ISFR - ISF24.
Definition chip/gpio/GPIO.h:4297
static constexpr uint32 PTOR_PTTO18(uint32 value)
PORT - PTTO18.
Definition chip/gpio/GPIO.h:1945
static constexpr uint32 ISFR_ISF21(uint32 value)
ISFR - ISF21.
Definition chip/gpio/GPIO.h:4246
static constexpr uint32 PCOR_PTCO8(uint32 value)
PCOR - PTCO8.
Definition chip/gpio/GPIO.h:1399
static constexpr uint32 PSOR_PTSO19(uint32 value)
PSOR - PTSO19.
Definition chip/gpio/GPIO.h:1126
static constexpr uint32 PDIR_PDI28(uint32 value)
PDIR - PDI28.
Definition chip/gpio/GPIO.h:2491
static constexpr uint32 ISFR_ISF25(uint32 value)
ISFR - ISF25.
Definition chip/gpio/GPIO.h:4314
static constexpr uint32 PIDR_PID18(uint32 value)
PIDR - PID18.
Definition chip/gpio/GPIO.h:3193
static constexpr uint32 PDIR_PDI11(uint32 value)
PDIR - PDI11.
Definition chip/gpio/GPIO.h:2270
static constexpr uint32 GICLR_GIWE15(uint32 value)
GICLR - GIWE15.
Definition chip/gpio/GPIO.h:3646
static constexpr uint32 PTOR_PTTO22(uint32 value)
PORT - PTTO22.
Definition chip/gpio/GPIO.h:1997
static constexpr uint32 PDDR_PDD19(uint32 value)
PDDR - PDD19.
Definition chip/gpio/GPIO.h:2790
static constexpr uint32 PDDR_PDD18(uint32 value)
PDDR - PDD18.
Definition chip/gpio/GPIO.h:2777
static constexpr uint32 PCOR_PTCO24(uint32 value)
PCOR - PTCO24.
Definition chip/gpio/GPIO.h:1607
static constexpr uint32 PIDR_PID1(uint32 value)
PIDR - PID1.
Definition chip/gpio/GPIO.h:2972
static constexpr uint32 PDOR_PDO12(uint32 value)
PDOR - PDO12.
Definition chip/gpio/GPIO.h:619
static constexpr uint32 ISFR_ISF28(uint32 value)
ISFR - ISF28.
Definition chip/gpio/GPIO.h:4365
static constexpr uint32 PSOR_PTSO10(uint32 value)
PSOR - PTSO10.
Definition chip/gpio/GPIO.h:1009
static constexpr uint32 PCOR_PTCO23(uint32 value)
PCOR - PTCO23.
Definition chip/gpio/GPIO.h:1594
static constexpr uint32 PDIR_PDI13(uint32 value)
PDIR - PDI13.
Definition chip/gpio/GPIO.h:2296
static constexpr uint32 PDIR_PDI10(uint32 value)
PDIR - PDI10.
Definition chip/gpio/GPIO.h:2257
static constexpr uint32 PIDR_PID16(uint32 value)
PIDR - PID16.
Definition chip/gpio/GPIO.h:3167
static constexpr uint32 GICLR_GIWE0(uint32 value)
GICLR - GIWE0.
Definition chip/gpio/GPIO.h:3451
static constexpr uint32 GICHR_GIWE25(uint32 value)
GICHR - GIWE25.
Definition chip/gpio/GPIO.h:3785
static constexpr uint32 PDOR_PDO4(uint32 value)
PDOR - PDO4.
Definition chip/gpio/GPIO.h:515
static constexpr uint32 ISFR_ISF20(uint32 value)
ISFR - ISF20.
Definition chip/gpio/GPIO.h:4229
static constexpr uint32 PSOR_PTSO24(uint32 value)
PSOR - PTSO24.
Definition chip/gpio/GPIO.h:1191
static constexpr uint32 PTOR_PTTO0(uint32 value)
PORT - PTTO0.
Definition chip/gpio/GPIO.h:1711
static constexpr uint32 PSOR_PTSO26(uint32 value)
PSOR - PTSO26.
Definition chip/gpio/GPIO.h:1217
static constexpr uint32 ISFR_ISF1(uint32 value)
ISFR - ISF1.
Definition chip/gpio/GPIO.h:3906
static constexpr uint32 PSOR_PTSO28(uint32 value)
PSOR - PTSO28.
Definition chip/gpio/GPIO.h:1243
static constexpr uint32 GICHR_GIWE28(uint32 value)
GICHR - GIWE28.
Definition chip/gpio/GPIO.h:3824
static constexpr uint32 VERID_MINOR(uint32 value)
VERID - MINOR.
Definition chip/gpio/GPIO.h:432
static constexpr uint32 GICHR_GIWE24(uint32 value)
GICHR - GIWE24.
Definition chip/gpio/GPIO.h:3772
static constexpr uint32 PDOR_PDO0(uint32 value)
PDOR - PDO0.
Definition chip/gpio/GPIO.h:463
static constexpr uint32 ISFR_ISF12(uint32 value)
ISFR - ISF12.
Definition chip/gpio/GPIO.h:4093
static constexpr uint32 GICLR_GIWE6(uint32 value)
GICLR - GIWE6.
Definition chip/gpio/GPIO.h:3529
static constexpr uint32 PCOR_PTCO6(uint32 value)
PCOR - PTCO6.
Definition chip/gpio/GPIO.h:1373
static constexpr uint32 GICLR_GIWE14(uint32 value)
GICLR - GIWE14.
Definition chip/gpio/GPIO.h:3633
static constexpr uint32 PDOR_PDO13(uint32 value)
PDOR - PDO13.
Definition chip/gpio/GPIO.h:632
static constexpr uint32 ISFR_ISF2(uint32 value)
ISFR - ISF2.
Definition chip/gpio/GPIO.h:3923
static void portToggle(Register *base, uint32 mask)
Reverses the current output logic of the multiple GPIO pins.
Definition chip/gpio/GPIO.h:285
static constexpr uint32 PDIR_PDI1(uint32 value)
PDIR - PDI1.
Definition chip/gpio/GPIO.h:2140
static constexpr uint32 PDOR_PDO23(uint32 value)
PDOR - PDO23.
Definition chip/gpio/GPIO.h:762
static constexpr uint32 PTOR_PTTO6(uint32 value)
PORT - PTTO6.
Definition chip/gpio/GPIO.h:1789
static constexpr uint32 PCOR_PTCO0(uint32 value)
PCOR - PTCO0.
Definition chip/gpio/GPIO.h:1295
static constexpr uint32 GICLR_GIWE2(uint32 value)
GICLR - GIWE2.
Definition chip/gpio/GPIO.h:3477
static constexpr uint32 PTOR_PTTO28(uint32 value)
PORT - PTTO28.
Definition chip/gpio/GPIO.h:2075
static constexpr uint32 PSOR_PTSO11(uint32 value)
PSOR - PTSO11.
Definition chip/gpio/GPIO.h:1022
static constexpr uint32 VERID_FEATURE(uint32 value)
VERID - FEATURE.
Definition chip/gpio/GPIO.h:423
static constexpr uint32 PDIR_PDI5(uint32 value)
PDIR - PDI5.
Definition chip/gpio/GPIO.h:2192
static constexpr uint32 ISFR_ISF29(uint32 value)
ISFR - ISF29.
Definition chip/gpio/GPIO.h:4382
static constexpr uint32 ISFR_ISF26(uint32 value)
ISFR - ISF26.
Definition chip/gpio/GPIO.h:4331
static constexpr uint32 PTOR_PTTO17(uint32 value)
PORT - PTTO17.
Definition chip/gpio/GPIO.h:1932
static constexpr uint32 PCOR_PTCO20(uint32 value)
PCOR - PTCO20.
Definition chip/gpio/GPIO.h:1555
static constexpr uint32 PTOR_PTTO10(uint32 value)
PORT - PTTO10.
Definition chip/gpio/GPIO.h:1841
static constexpr uint32 PDIR_PDI29(uint32 value)
PDIR - PDI29.
Definition chip/gpio/GPIO.h:2504
static constexpr uint32 PSOR_PTSO29(uint32 value)
PSOR - PTSO29.
Definition chip/gpio/GPIO.h:1256
static constexpr uint32 GICHR_GIWE26(uint32 value)
GICHR - GIWE26.
Definition chip/gpio/GPIO.h:3798
static constexpr uint32 PCOR_PTCO22(uint32 value)
PCOR - PTCO22.
Definition chip/gpio/GPIO.h:1581
static constexpr uint32 PDDR_PDD24(uint32 value)
PDDR - PDD24.
Definition chip/gpio/GPIO.h:2855
static constexpr uint32 PSOR_PTSO4(uint32 value)
PSOR - PTSO4.
Definition chip/gpio/GPIO.h:931
static constexpr uint32 PIDR_PID26(uint32 value)
PIDR - PID26.
Definition chip/gpio/GPIO.h:3297
static constexpr uint32 PIDR_PID28(uint32 value)
PIDR - PID28.
Definition chip/gpio/GPIO.h:3323
static constexpr uint32 PIDR_PID7(uint32 value)
PIDR - PID7.
Definition chip/gpio/GPIO.h:3050
static constexpr uint32 PCOR_PTCO4(uint32 value)
PCOR - PTCO4.
Definition chip/gpio/GPIO.h:1347
static constexpr uint32 PCOR_PTCO25(uint32 value)
PCOR - PTCO25.
Definition chip/gpio/GPIO.h:1620
static constexpr uint32 GICHR_GIWE23(uint32 value)
GICHR - GIWE23.
Definition chip/gpio/GPIO.h:3759
static constexpr uint32 PSOR_PTSO23(uint32 value)
PSOR - PTSO23.
Definition chip/gpio/GPIO.h:1178
static constexpr uint32 PTOR_PTTO2(uint32 value)
PORT - PTTO2.
Definition chip/gpio/GPIO.h:1737
static constexpr uint32 PDIR_PDI12(uint32 value)
PDIR - PDI12.
Definition chip/gpio/GPIO.h:2283
static constexpr uint32 GICHR_GIWE17(uint32 value)
GICHR - GIWE17.
Definition chip/gpio/GPIO.h:3681
static constexpr uint32 PIDR_PID9(uint32 value)
PIDR - PID9.
Definition chip/gpio/GPIO.h:3076
static constexpr uint32 PDIR_PDI7(uint32 value)
PDIR - PDI7.
Definition chip/gpio/GPIO.h:2218
static constexpr uint32 PDDR_PDD26(uint32 value)
PDDR - PDD26.
Definition chip/gpio/GPIO.h:2881
static constexpr uint32 PCOR_PTCO27(uint32 value)
PCOR - PTCO27.
Definition chip/gpio/GPIO.h:1646
static constexpr uint32 PSOR_PTSO3(uint32 value)
PSOR - PTSO3.
Definition chip/gpio/GPIO.h:918
static constexpr uint32 PDIR_PDI21(uint32 value)
PDIR - PDI21.
Definition chip/gpio/GPIO.h:2400
static constexpr uint32 PIDR_PID4(uint32 value)
PIDR - PID4.
Definition chip/gpio/GPIO.h:3011
static constexpr uint32 PDOR_PDO10(uint32 value)
PDOR - PDO10.
Definition chip/gpio/GPIO.h:593
static constexpr uint32 PTOR_PTTO31(uint32 value)
PORT - PTTO31.
Definition chip/gpio/GPIO.h:2114
static void portClear(Register *base, uint32 mask)
Sets the output level of the multiple GPIO pins to the logic 0.
Definition chip/gpio/GPIO.h:275
static constexpr uint32 PSOR_PTSO2(uint32 value)
PSOR - PTSO2.
Definition chip/gpio/GPIO.h:905
static constexpr uint32 PTOR_PTTO8(uint32 value)
PORT - PTTO8.
Definition chip/gpio/GPIO.h:1815
static constexpr uint32 PTOR_PTTO27(uint32 value)
PORT - PTTO27.
Definition chip/gpio/GPIO.h:2062
static constexpr uint32 ISFR_ISF30(uint32 value)
ISFR - ISF30.
Definition chip/gpio/GPIO.h:4399
static constexpr uint32 PDDR_PDD27(uint32 value)
PDDR - PDD27.
Definition chip/gpio/GPIO.h:2894
static constexpr uint32 PTOR_PTTO9(uint32 value)
PORT - PTTO9.
Definition chip/gpio/GPIO.h:1828
static constexpr uint32 ISFR_ISF13(uint32 value)
ISFR - ISF13.
Definition chip/gpio/GPIO.h:4110
static constexpr uint32 PCOR_PTCO19(uint32 value)
PCOR - PTCO19.
Definition chip/gpio/GPIO.h:1542
static constexpr uint32 PDDR_PDD2(uint32 value)
PDDR - PDD2.
Definition chip/gpio/GPIO.h:2569
static constexpr uint32 PDOR_PDO7(uint32 value)
PDOR - PDO7.
Definition chip/gpio/GPIO.h:554
static constexpr uint32 PSOR_PTSO8(uint32 value)
PSOR - PTSO8.
Definition chip/gpio/GPIO.h:983
static constexpr uint32 PTOR_PTTO24(uint32 value)
PORT - PTTO24.
Definition chip/gpio/GPIO.h:2023
static constexpr uint32 PDDR_PDD1(uint32 value)
PDDR - PDD1.
Definition chip/gpio/GPIO.h:2556
static constexpr uint32 PTOR_PTTO4(uint32 value)
PORT - PTTO4.
Definition chip/gpio/GPIO.h:1763
static constexpr uint32 PDIR_PDI16(uint32 value)
PDIR - PDI16.
Definition chip/gpio/GPIO.h:2335
static constexpr uint32 PIDR_PID14(uint32 value)
PIDR - PID14.
Definition chip/gpio/GPIO.h:3141
static constexpr uint32 PTOR_PTTO13(uint32 value)
PORT - PTTO13.
Definition chip/gpio/GPIO.h:1880
static constexpr uint32 ISFR_ISF9(uint32 value)
ISFR - ISF9.
Definition chip/gpio/GPIO.h:4042
static constexpr uint32 PSOR_PTSO20(uint32 value)
PSOR - PTSO20.
Definition chip/gpio/GPIO.h:1139
static constexpr uint32 PTOR_PTTO20(uint32 value)
PORT - PTTO20.
Definition chip/gpio/GPIO.h:1971
static constexpr uint32 PCOR_PTCO11(uint32 value)
PCOR - PTCO11.
Definition chip/gpio/GPIO.h:1438
static constexpr uint32 PCOR_PTCO9(uint32 value)
PCOR - PTCO9.
Definition chip/gpio/GPIO.h:1412
static constexpr uint32 ISFR_ISF3(uint32 value)
ISFR - ISF3.
Definition chip/gpio/GPIO.h:3940
static constexpr uint32 PIDR_PID0(uint32 value)
PIDR - PID0.
Definition chip/gpio/GPIO.h:2959
static constexpr uint32 PCOR_PTCO3(uint32 value)
PCOR - PTCO3.
Definition chip/gpio/GPIO.h:1334
static constexpr uint32 PDIR_PDI9(uint32 value)
PDIR - PDI9.
Definition chip/gpio/GPIO.h:2244
static constexpr uint32 PCOR_PTCO28(uint32 value)
PCOR - PTCO28.
Definition chip/gpio/GPIO.h:1659
static void gpioClearInterruptFlags(Register *base, uint32 mask)
Clears GPIO pin interrupt status flags.
static constexpr uint32 PDIR_PDI27(uint32 value)
PDIR - PDI27.
Definition chip/gpio/GPIO.h:2478
static constexpr uint32 ISFR_ISF22(uint32 value)
ISFR - ISF22.
Definition chip/gpio/GPIO.h:4263
static constexpr uint32 PDIR_PDI23(uint32 value)
PDIR - PDI23.
Definition chip/gpio/GPIO.h:2426
static constexpr uint32 PCOR_PTCO29(uint32 value)
PCOR - PTCO29.
Definition chip/gpio/GPIO.h:1672
static constexpr uint32 PSOR_PTSO25(uint32 value)
PSOR - PTSO25.
Definition chip/gpio/GPIO.h:1204
Definition NonInstantiable.h:29
Definition gpio/Count.h:22
@ PTOR_PTTO2
PORT - PTTO2.
@ PCOR_PTCO8
PCOR - PTCO8.
@ PSOR_PTSO4
PSOR - PTSO4.
@ PSOR_PTSO22
PSOR - PTSO22.
@ PTOR_PTTO27
PORT - PTTO27.
@ PDDR_PDD19
PDDR - PDD19.
@ PTOR_PTTO14
PORT - PTTO14.
@ PDOR_PDO17
PDOR - PDO17.
@ PCOR_PTCO4
PCOR - PTCO4.
@ PIDR_PID10
PIDR - PID10.
@ PDOR_PDO10
PDOR - PDO10.
@ PSOR_PTSO24
PSOR - PTSO24.
@ GICLR_GIWE1
GICLR - GIWE1.
@ PTOR_PTTO26
PORT - PTTO26.
@ PIDR_PID17
PIDR - PID17.
@ ISFR_ISF29
ISFR - ISF29.
@ PDDR_PDD13
PDDR - PDD13.
@ GICLR_GIWE15
GICLR - GIWE15.
@ PSOR_PTSO21
PSOR - PTSO21.
@ PSOR_PTSO23
PSOR - PTSO23.
@ ISFR_ISF30
ISFR - ISF30.
@ PDIR_PDI18
PDIR - PDI18.
@ PDIR_PDI27
PDIR - PDI27.
@ PSOR_PTSO15
PSOR - PTSO15.
@ PSOR_PTSO2
PSOR - PTSO2.
@ ISFR_ISF28
ISFR - ISF28.
@ PCOR_PTCO18
PCOR - PTCO18.
@ PTOR_PTTO9
PORT - PTTO9.
@ ISFR_ISF10
ISFR - ISF10.
@ PDIR_PDI14
PDIR - PDI14.
@ PDDR_PDD27
PDDR - PDD27.
@ PDIR_PDI30
PDIR - PDI30.
@ PIDR_PID29
PIDR - PID29.
@ VERID_MINOR
VERID - MINOR.
@ PDIR_PDI17
PDIR - PDI17.
@ GICHR_GIWD
GICHR - GIWD.
@ PDDR_PDD20
PDDR - PDD20.
@ PSOR_PTSO30
PSOR - PTSO30.
@ PTOR_PTTO28
PORT - PTTO28.
@ GICLR_GIWE7
GICLR - GIWE7.
@ PSOR_PTSO20
PSOR - PTSO20.
@ PDDR_PDD25
PDDR - PDD25.
@ GICHR_GIWE21
GICHR - GIWE21.
@ ISFR_ISF31
ISFR - ISF31.
@ PCOR_PTCO3
PCOR - PTCO3.
@ PARAM_IRQNUM
PARAM - IRQNUM.
@ PDOR_PDO16
PDOR - PDO16.
@ PCOR_PTCO16
PCOR - PTCO16.
@ PSOR_PTSO13
PSOR - PTSO13.
@ PCOR_PTCO15
PCOR - PTCO15.
@ GICLR_GIWD
GICLR - GIWD.
@ PDDR_PDD15
PDDR - PDD15.
@ PTOR_PTTO1
PORT - PTTO1.
@ PTOR_PTTO10
PORT - PTTO10.
@ PIDR_PID26
PIDR - PID26.
@ PCOR_PTCO2
PCOR - PTCO2.
@ GICHR_GIWE23
GICHR - GIWE23.
@ PDDR_PDD26
PDDR - PDD26.
@ PSOR_PTSO11
PSOR - PTSO11.
@ GICHR_GIWE18
GICHR - GIWE18.
@ PDDR_PDD14
PDDR - PDD14.
@ PSOR_PTSO17
PSOR - PTSO17.
@ GICHR_GIWE28
GICHR - GIWE28.
@ PDIR_PDI19
PDIR - PDI19.
@ PDIR_PDI28
PDIR - PDI28.
@ PDOR_PDO18
PDOR - PDO18.
@ PSOR_PTSO19
PSOR - PTSO19.
@ PCOR_PTCO25
PCOR - PTCO25.
@ PSOR_PTSO16
PSOR - PTSO16.
@ PCOR_PTCO17
PCOR - PTCO17.
@ PCOR_PTCO28
PCOR - PTCO28.
@ ISFR_ISF12
ISFR - ISF12.
@ PDOR_PDO23
PDOR - PDO23.
@ PDIR_PDI29
PDIR - PDI29.
@ PCOR_PTCO5
PCOR - PTCO5.
@ PDIR_PDI21
PDIR - PDI21.
@ PDOR_PDO31
PDOR - PDO31.
@ PSOR_PTSO28
PSOR - PTSO28.
@ PCOR_PTCO24
PCOR - PTCO24.
@ PSOR_PTSO9
PSOR - PTSO9.
@ GICHR_GIWE22
GICHR - GIWE22.
@ PDIR_PDI13
PDIR - PDI13.
@ PTOR_PTTO20
PORT - PTTO20.
@ PTOR_PTTO21
PORT - PTTO21.
@ ISFR_ISF23
ISFR - ISF23.
@ PDIR_PDI25
PDIR - PDI25.
@ PTOR_PTTO22
PORT - PTTO22.
@ PIDR_PID20
PIDR - PID20.
@ GICHR_GIWE29
GICHR - GIWE29.
@ PTOR_PTTO25
PORT - PTTO25.
@ PCOR_PTCO9
PCOR - PTCO9.
@ PDDR_PDD21
PDDR - PDD21.
@ PDDR_PDD17
PDDR - PDD17.
@ PCOR_PTCO19
PCOR - PTCO19.
@ ISFR_ISF17
ISFR - ISF17.
@ PSOR_PTSO7
PSOR - PTSO7.
@ PCOR_PTCO7
PCOR - PTCO7.
@ PTOR_PTTO19
PORT - PTTO19.
@ PTOR_PTTO7
PORT - PTTO7.
@ PDOR_PDO22
PDOR - PDO22.
@ PSOR_PTSO31
PSOR - PTSO31.
@ PSOR_PTSO6
PSOR - PTSO6.
@ PDIR_PDI16
PDIR - PDI16.
@ PIDR_PID24
PIDR - PID24.
@ VERID_FEATURE
VERID - FEATURE.
@ PCOR_PTCO30
PCOR - PTCO30.
@ ISFR_ISF14
ISFR - ISF14.
@ PCOR_PTCO6
PCOR - PTCO6.
@ PSOR_PTSO3
PSOR - PTSO3.
@ PDOR_PDO28
PDOR - PDO28.
@ PIDR_PID22
PIDR - PID22.
@ PDOR_PDO29
PDOR - PDO29.
@ PTOR_PTTO8
PORT - PTTO8.
@ ISFR_ISF13
ISFR - ISF13.
@ PDIR_PDI12
PDIR - PDI12.
@ PDOR_PDO24
PDOR - PDO24.
@ GICHR_GIWE24
GICHR - GIWE24.
@ PDIR_PDI24
PDIR - PDI24.
@ PDDR_PDD12
PDDR - PDD12.
@ PSOR_PTSO14
PSOR - PTSO14.
@ PCOR_PTCO21
PCOR - PTCO21.
@ PIDR_PID28
PIDR - PID28.
@ PDOR_PDO19
PDOR - PDO19.
@ PIDR_PID14
PIDR - PID14.
@ GICLR_GIWE13
GICLR - GIWE13.
@ PDOR_PDO27
PDOR - PDO27.
@ PIDR_PID30
PIDR - PID30.
@ ISFR_ISF19
ISFR - ISF19.
@ GICLR_GIWE5
GICLR - GIWE5.
@ ISFR_ISF27
ISFR - ISF27.
@ PCOR_PTCO31
PCOR - PTCO31.
@ PTOR_PTTO24
PORT - PTTO24.
@ ISFR_ISF16
ISFR - ISF16.
@ PTOR_PTTO31
PORT - PTTO31.
@ ISFR_ISF24
ISFR - ISF24.
@ ISFR_ISF15
ISFR - ISF15.
@ PDIR_PDI23
PDIR - PDI23.
@ GICLR_GIWE4
GICLR - GIWE4.
@ PDIR_PDI26
PDIR - PDI26.
@ PSOR_PTSO0
PSOR - PTSO0.
@ PCOR_PTCO11
PCOR - PTCO11.
@ PDDR_PDD11
PDDR - PDD11.
@ PSOR_PTSO10
PSOR - PTSO10.
@ ISFR_ISF25
ISFR - ISF25.
@ ISFR_ISF21
ISFR - ISF21.
@ PDOR_PDO12
PDOR - PDO12.
@ PTOR_PTTO29
PORT - PTTO29.
@ PDIR_PDI11
PDIR - PDI11.
@ ISFR_ISF18
ISFR - ISF18.
@ PCOR_PTCO29
PCOR - PTCO29.
@ PCOR_PTCO13
PCOR - PTCO13.
@ PCOR_PTCO12
PCOR - PTCO12.
@ PDDR_PDD28
PDDR - PDD28.
@ PCOR_PTCO20
PCOR - PTCO20.
@ PDDR_PDD23
PDDR - PDD23.
@ GICHR_GIWE30
GICHR - GIWE30.
@ GICLR_GIWE3
GICLR - GIWE3.
@ PDIR_PDI31
PDIR - PDI31.
@ PTOR_PTTO0
PORT - PTTO0.
@ PDDR_PDD16
PDDR - PDD16.
@ PIDR_PID23
PIDR - PID23.
@ PTOR_PTTO23
PORT - PTTO23.
@ PDOR_PDO15
PDOR - PDO15.
@ PIDR_PID16
PIDR - PID16.
@ PSOR_PTSO27
PSOR - PTSO27.
@ PIDR_PID27
PIDR - PID27.
@ PSOR_PTSO29
PSOR - PTSO29.
@ PDDR_PDD30
PDDR - PDD30.
@ PDOR_PDO21
PDOR - PDO21.
@ ISFR_ISF11
ISFR - ISF11.
@ GICHR_GIWE16
GICHR - GIWE16.
@ GICLR_GIWE6
GICLR - GIWE6.
@ PDOR_PDO11
PDOR - PDO11.
@ PIDR_PID12
PIDR - PID12.
@ PDOR_PDO26
PDOR - PDO26.
@ PTOR_PTTO30
PORT - PTTO30.
@ VERID_MAJOR
VERID - MAJOR.
@ GICHR_GIWE31
GICHR - GIWE31.
@ PTOR_PTTO11
PORT - PTTO11.
@ PDOR_PDO25
PDOR - PDO25.
@ GICLR_GIWE9
GICLR - GIWE9.
@ PCOR_PTCO22
PCOR - PTCO22.
@ GICHR_GIWE27
GICHR - GIWE27.
@ PTOR_PTTO16
PORT - PTTO16.
@ PDDR_PDD31
PDDR - PDD31.
@ PIDR_PID25
PIDR - PID25.
@ PDIR_PDI22
PDIR - PDI22.
@ PDDR_PDD22
PDDR - PDD22.
@ PSOR_PTSO18
PSOR - PTSO18.
@ GICLR_GIWE11
GICLR - GIWE11.
@ PSOR_PTSO5
PSOR - PTSO5.
@ PIDR_PID18
PIDR - PID18.
@ PTOR_PTTO17
PORT - PTTO17.
@ PDDR_PDD10
PDDR - PDD10.
@ PDDR_PDD24
PDDR - PDD24.
@ ISFR_ISF26
ISFR - ISF26.
@ PDOR_PDO13
PDOR - PDO13.
@ PSOR_PTSO26
PSOR - PTSO26.
@ PDOR_PDO14
PDOR - PDO14.
@ GICHR_GIWE17
GICHR - GIWE17.
@ PDDR_PDD18
PDDR - PDD18.
@ PTOR_PTTO3
PORT - PTTO3.
@ PSOR_PTSO8
PSOR - PTSO8.
@ PDIR_PDI10
PDIR - PDI10.
@ PSOR_PTSO25
PSOR - PTSO25.
@ PIDR_PID11
PIDR - PID11.
@ PDIR_PDI15
PDIR - PDI15.
@ PCOR_PTCO26
PCOR - PTCO26.
@ GICLR_GIWE2
GICLR - GIWE2.
@ PIDR_PID15
PIDR - PID15.
@ PDIR_PDI20
PDIR - PDI20.
@ GICHR_GIWE19
GICHR - GIWE19.
@ ISFR_ISF20
ISFR - ISF20.
@ PSOR_PTSO12
PSOR - PTSO12.
@ GICLR_GIWE12
GICLR - GIWE12.
@ PIDR_PID21
PIDR - PID21.
@ PCOR_PTCO14
PCOR - PTCO14.
@ PCOR_PTCO0
PCOR - PTCO0.
@ GICHR_GIWE25
GICHR - GIWE25.
@ GICHR_GIWE20
GICHR - GIWE20.
@ PTOR_PTTO15
PORT - PTTO15.
@ PTOR_PTTO13
PORT - PTTO13.
@ GICLR_GIWE0
GICLR - GIWE0.
@ PDOR_PDO20
PDOR - PDO20.
@ GICLR_GIWE8
GICLR - GIWE8.
@ PCOR_PTCO1
PCOR - PTCO1.
@ PTOR_PTTO18
PORT - PTTO18.
@ PTOR_PTTO12
PORT - PTTO12.
@ PCOR_PTCO27
PCOR - PTCO27.
@ PTOR_PTTO4
PORT - PTTO4.
@ PIDR_PID31
PIDR - PID31.
@ PIDR_PID13
PIDR - PID13.
@ PDDR_PDD29
PDDR - PDD29.
@ PCOR_PTCO10
PCOR - PTCO10.
@ PCOR_PTCO23
PCOR - PTCO23.
@ PTOR_PTTO5
PORT - PTTO5.
@ PIDR_PID19
PIDR - PID19.
@ PSOR_PTSO1
PSOR - PTSO1.
@ GICHR_GIWE26
GICHR - GIWE26.
@ PDOR_PDO30
PDOR - PDO30.
@ PTOR_PTTO6
PORT - PTTO6.
@ ISFR_ISF22
ISFR - ISF22.
@ GICLR_GIWE14
GICLR - GIWE14.
@ GICLR_GIWE10
GICLR - GIWE10.
InterruptConfig
Definition InterruptConfig.h:33
@ ISFR_ISF8
ISFR - ISF8 - 中斷狀態標誌
@ PTOR_PTTO2
PORT - PTTO2 - 埠切換輸出
@ PCOR_PTCO8
PCOR - PTCO8 - 埠清除輸出
@ PSOR_PTSO4
PSOR - PTSO4 - 埠設定輸出
@ PDR_PD
PDR - PD - 引腳資料
@ PSOR_PTSO22
PSOR - PTSO22 - 埠設定輸出
@ PTOR_PTTO27
PORT - PTTO27 - 埠切換輸出
@ PDDR_PDD19
PDDR - PDD19 - 埠資料方向
@ PTOR_PTTO14
PORT - PTTO14 - 埠切換輸出
@ PDOR_PDO17
PDOR - PDO17 - 埠資料輸出
@ PCOR_PTCO4
PCOR - PTCO4 - 埠清除輸出
@ PIDR_PID10
PIDR - PID10 - 埠輸入禁用
@ PDOR_PDO10
PDOR - PDO10 - 埠資料輸出
@ PSOR_PTSO24
PSOR - PTSO24 - 埠設定輸出
@ GICLR_GIWE1
GICLR - GIWE1 - 全局中斷控制低
@ PIDR_PID9
PIDR - PID9 - 埠輸入禁用
@ PTOR_PTTO26
PORT - PTTO26 - 埠切換輸出
@ PIDR_PID17
PIDR - PID17 - 埠輸入禁用
@ PDOR_PDO9
PDOR - PDO9 - 埠資料輸出
@ ISFR_ISF29
ISFR - ISF29 - 中斷狀態標誌
@ PDDR_PDD13
PDDR - PDD13 - 埠資料方向
@ GICLR_GIWE15
GICLR - GIWE15 - 全局中斷控制低
@ PSOR_PTSO21
PSOR - PTSO21 - 埠設定輸出
@ PSOR_PTSO23
PSOR - PTSO23 - 埠設定輸出
@ ISFR_ISF30
ISFR - ISF30 - 中斷狀態標誌
@ PDIR_PDI18
PDIR - PDI18 - 埠資料輸入
@ PDIR_PDI27
PDIR - PDI27 - 埠資料輸入
@ PSOR_PTSO15
PSOR - PTSO15 - 埠設定輸出
@ PDDR_PDD4
PDDR - PDD4 - 埠資料方向
@ PDOR_PDO3
PDOR - PDO3 - 埠資料輸出
@ PSOR_PTSO2
PSOR - PTSO2 - 埠設定輸出
@ ISFR_ISF28
ISFR - ISF28 - 中斷狀態標誌
@ PCOR_PTCO18
PCOR - PTCO18 - 埠清除輸出
@ PTOR_PTTO9
PORT - PTTO9 - 埠切換輸出
@ ISFR_ISF10
ISFR - ISF10 - 中斷狀態標誌
@ PDIR_PDI14
PDIR - PDI14 - 埠資料輸入
@ PDDR_PDD27
PDDR - PDD27 - 埠資料方向
@ PDIR_PDI30
PDIR - PDI30 - 埠資料輸入
@ ICR_IRQC
ICR - IRQC - 中斷控制
@ PIDR_PID29
PIDR - PID29 - 埠輸入禁用
@ VERID_MINOR
VERID - MINOR - 版本ID次要版本號
@ PDIR_PDI17
PDIR - PDI17 - 埠資料輸入
@ GICHR_GIWD
GICHR - GIWD - 全局中斷控制高
@ PDDR_PDD20
PDDR - PDD20 - 埠資料方向
@ PSOR_PTSO30
PSOR - PTSO30 - 埠設定輸出
@ PTOR_PTTO28
PORT - PTTO28 - 埠切換輸出
@ GICLR_GIWE7
GICLR - GIWE7 - 全局中斷控制低
@ PSOR_PTSO20
PSOR - PTSO20 - 埠設定輸出
@ PDOR_PDO5
PDOR - PDO5 - 埠資料輸出
@ PDIR_PDI5
PDIR - PDI5 - 埠資料輸入
@ PDDR_PDD25
PDDR - PDD25 - 埠資料方向
@ GICHR_GIWE21
GICHR - GIWE21 - 全局中斷控制高
@ ISFR_ISF31
ISFR - ISF31 - 中斷狀態標誌
@ PCOR_PTCO3
PCOR - PTCO3 - 埠清除輸出
@ PARAM_IRQNUM
PARAM - IRQNUM - 參數中斷號
@ PDOR_PDO16
PDOR - PDO16 - 埠資料輸出
@ PCOR_PTCO16
PCOR - PTCO16 - 埠清除輸出
@ PSOR_PTSO13
PSOR - PTSO13 - 埠設定輸出
@ PDDR_PDD5
PDDR - PDD5 - 埠資料方向
@ PCOR_PTCO15
PCOR - PTCO15 - 埠清除輸出
@ GICLR_GIWD
GICLR - GIWD - 全局中斷控制低
@ PDDR_PDD15
PDDR - PDD15 - 埠資料方向
@ PTOR_PTTO1
PORT - PTTO1 - 埠切換輸出
@ PTOR_PTTO10
PORT - PTTO10 - 埠切換輸出
@ PIDR_PID26
PIDR - PID26 - 埠輸入禁用
@ PCOR_PTCO2
PCOR - PTCO2 - 埠清除輸出
@ GICHR_GIWE23
GICHR - GIWE23 - 全局中斷控制高
@ PDDR_PDD26
PDDR - PDD26 - 埠資料方向
@ PSOR_PTSO11
PSOR - PTSO11 - 埠設定輸出
@ GICHR_GIWE18
GICHR - GIWE18 - 全局中斷控制高
@ PDDR_PDD14
PDDR - PDD14 - 埠資料方向
@ PSOR_PTSO17
PSOR - PTSO17 - 埠設定輸出
@ GICHR_GIWE28
GICHR - GIWE28 - 全局中斷控制高
@ PDDR_PDD0
PDDR - PDD0 - 埠資料方向
@ PIDR_PID3
PIDR - PID3 - 埠輸入禁用
@ PDIR_PDI19
PDIR - PDI19 - 埠資料輸入
@ PDIR_PDI28
PDIR - PDI28 - 埠資料輸入
@ PDOR_PDO18
PDOR - PDO18 - 埠資料輸出
@ PSOR_PTSO19
PSOR - PTSO19 - 埠設定輸出
@ PCOR_PTCO25
PCOR - PTCO25 - 埠清除輸出
@ PSOR_PTSO16
PSOR - PTSO16 - 埠設定輸出
@ ISFR_ISF3
ISFR - ISF3 - 中斷狀態標誌
@ PCOR_PTCO17
PCOR - PTCO17 - 埠清除輸出
@ PDOR_PDO8
PDOR - PDO8 - 埠資料輸出
@ PCOR_PTCO28
PCOR - PTCO28 - 埠清除輸出
@ ISFR_ISF12
ISFR - ISF12 - 中斷狀態標誌
@ PDOR_PDO23
PDOR - PDO23 - 埠資料輸出
@ PIDR_PID8
PIDR - PID8 - 埠輸入禁用
@ PDIR_PDI29
PDIR - PDI29 - 埠資料輸入
@ PCOR_PTCO5
PCOR - PTCO5 - 埠清除輸出
@ PDIR_PDI21
PDIR - PDI21 - 埠資料輸入
@ PDDR_PDD8
PDDR - PDD8 - 埠資料方向
@ PDOR_PDO31
PDOR - PDO31 - 埠資料輸出
@ PSOR_PTSO28
PSOR - PTSO28 - 埠設定輸出
@ ISFR_ISF4
ISFR - ISF4 - 中斷狀態標誌
@ PCOR_PTCO24
PCOR - PTCO24 - 埠清除輸出
@ PSOR_PTSO9
PSOR - PTSO9 - 埠設定輸出
@ GICHR_GIWE22
GICHR - GIWE22 - 全局中斷控制高
@ PDIR_PDI13
PDIR - PDI13 - 埠資料輸入
@ PTOR_PTTO20
PORT - PTTO20 - 埠切換輸出
@ PIDR_PID0
PIDR - PID0 - 埠輸入禁用
@ PTOR_PTTO21
PORT - PTTO21 - 埠切換輸出
@ ISFR_ISF23
ISFR - ISF23 - 中斷狀態標誌
@ PDIR_PDI25
PDIR - PDI25 - 埠資料輸入
@ PTOR_PTTO22
PORT - PTTO22 - 埠切換輸出
@ PIDR_PID20
PIDR - PID20 - 埠輸入禁用
@ ISFR_ISF2
ISFR - ISF2 - 中斷狀態標誌
@ GICHR_GIWE29
GICHR - GIWE29 - 全局中斷控制高
@ PDOR_PDO6
PDOR - PDO6 - 埠資料輸出
@ PDDR_PDD3
PDDR - PDD3 - 埠資料方向
@ PTOR_PTTO25
PORT - PTTO25 - 埠切換輸出
@ PCOR_PTCO9
PCOR - PTCO9 - 埠清除輸出
@ PDDR_PDD21
PDDR - PDD21 - 埠資料方向
@ PDDR_PDD17
PDDR - PDD17 - 埠資料方向
@ PCOR_PTCO19
PCOR - PTCO19 - 埠清除輸出
@ ISFR_ISF17
ISFR - ISF17 - 中斷狀態標誌
@ PSOR_PTSO7
PSOR - PTSO7 - 埠設定輸出
@ PCOR_PTCO7
PCOR - PTCO7 - 埠清除輸出
@ PTOR_PTTO19
PORT - PTTO19 - 埠切換輸出
@ PTOR_PTTO7
PORT - PTTO7 - 埠切換輸出
@ PDOR_PDO22
PDOR - PDO22 - 埠資料輸出
@ PSOR_PTSO31
PSOR - PTSO31 - 埠設定輸出
@ ISFR_ISF9
ISFR - ISF9 - 中斷狀態標誌
@ PSOR_PTSO6
PSOR - PTSO6 - 埠設定輸出
@ PDIR_PDI16
PDIR - PDI16 - 埠資料輸入
@ PIDR_PID24
PIDR - PID24 - 埠輸入禁用
@ VERID_FEATURE
VERID - FEATURE - 版本ID特徵規格編號
@ PCOR_PTCO30
PCOR - PTCO30 - 埠清除輸出
@ ISFR_ISF14
ISFR - ISF14 - 中斷狀態標誌
@ PCOR_PTCO6
PCOR - PTCO6 - 埠清除輸出
@ PSOR_PTSO3
PSOR - PTSO3 - 埠設定輸出
@ PDOR_PDO28
PDOR - PDO28 - 埠資料輸出
@ PIDR_PID22
PIDR - PID22 - 埠輸入禁用
@ PDOR_PDO29
PDOR - PDO29 - 埠資料輸出
@ PTOR_PTTO8
PORT - PTTO8 - 埠切換輸出
@ ISFR_ISF13
ISFR - ISF13 - 中斷狀態標誌
@ PDIR_PDI12
PDIR - PDI12 - 埠資料輸入
@ PDOR_PDO24
PDOR - PDO24 - 埠資料輸出
@ GICHR_GIWE24
GICHR - GIWE24 - 全局中斷控制高
@ PDIR_PDI24
PDIR - PDI24 - 埠資料輸入
@ PDDR_PDD12
PDDR - PDD12 - 埠資料方向
@ PSOR_PTSO14
PSOR - PTSO14 - 埠設定輸出
@ PCOR_PTCO21
PCOR - PTCO21 - 埠清除輸出
@ PIDR_PID28
PIDR - PID28 - 埠輸入禁用
@ PDOR_PDO19
PDOR - PDO19 - 埠資料輸出
@ ICR_ISF
ICR - ISF - 中斷狀態標誌
@ PDIR_PDI8
PDIR - PDI8 - 埠資料輸入
@ PIDR_PID14
PIDR - PID14 - 埠輸入禁用
@ GICLR_GIWE13
GICLR - GIWE13 - 全局中斷控制低
@ PDOR_PDO27
PDOR - PDO27 - 埠資料輸出
@ PDOR_PDO1
PDOR - PDO1 - 埠資料輸出
@ PIDR_PID30
PIDR - PID30 - 埠輸入禁用
@ ISFR_ISF19
ISFR - ISF19 - 中斷狀態標誌
@ GICLR_GIWE5
GICLR - GIWE5 - 全局中斷控制低
@ ISFR_ISF27
ISFR - ISF27 - 中斷狀態標誌
@ PCOR_PTCO31
PCOR - PTCO31 - 埠清除輸出
@ PDIR_PDI7
PDIR - PDI7 - 埠資料輸入
@ PTOR_PTTO24
PORT - PTTO24 - 埠切換輸出
@ PDIR_PDI0
PDIR - PDI0 - 埠資料輸入
@ ISFR_ISF16
ISFR - ISF16 - 中斷狀態標誌
@ PDOR_PDO4
PDOR - PDO4 - 埠資料輸出
@ PTOR_PTTO31
PORT - PTTO31 - 埠切換輸出
@ ISFR_ISF24
ISFR - ISF24 - 中斷狀態標誌
@ ISFR_ISF15
ISFR - ISF15 - 中斷狀態標誌
@ PDIR_PDI23
PDIR - PDI23 - 埠資料輸入
@ GICLR_GIWE4
GICLR - GIWE4 - 全局中斷控制低
@ PDIR_PDI26
PDIR - PDI26 - 埠資料輸入
@ PSOR_PTSO0
PSOR - PTSO0 - 埠設定輸出
@ PDIR_PDI4
PDIR - PDI4 - 埠資料輸入
@ PIDR_PID4
PIDR - PID4 - 埠輸入禁用
@ PCOR_PTCO11
PCOR - PTCO11 - 埠清除輸出
@ PDDR_PDD11
PDDR - PDD11 - 埠資料方向
@ PSOR_PTSO10
PSOR - PTSO10 - 埠設定輸出
@ ISFR_ISF25
ISFR - ISF25 - 中斷狀態標誌
@ ISFR_ISF21
ISFR - ISF21 - 中斷狀態標誌
@ PDOR_PDO12
PDOR - PDO12 - 埠資料輸出
@ PTOR_PTTO29
PORT - PTTO29 - 埠切換輸出
@ PDIR_PDI11
PDIR - PDI11 - 埠資料輸入
@ ISFR_ISF18
ISFR - ISF18 - 中斷狀態標誌
@ ISFR_ISF0
ISFR - ISF0 - 中斷狀態標誌
@ PCOR_PTCO29
PCOR - PTCO29 - 埠清除輸出
@ PCOR_PTCO13
PCOR - PTCO13 - 埠清除輸出
@ PCOR_PTCO12
PCOR - PTCO12 - 埠清除輸出
@ PDDR_PDD28
PDDR - PDD28 - 埠資料方向
@ PCOR_PTCO20
PCOR - PTCO20 - 埠清除輸出
@ PDDR_PDD23
PDDR - PDD23 - 埠資料方向
@ PDDR_PDD6
PDDR - PDD6 - 埠資料方向
@ GICHR_GIWE30
GICHR - GIWE30 - 全局中斷控制高
@ GICLR_GIWE3
GICLR - GIWE3 - 全局中斷控制低
@ PDIR_PDI31
PDIR - PDI31 - 埠資料輸入
@ PTOR_PTTO0
PORT - PTTO0 - 埠切換輸出
@ PDDR_PDD16
PDDR - PDD16 - 埠資料方向
@ PIDR_PID23
PIDR - PID23 - 埠輸入禁用
@ PTOR_PTTO23
PORT - PTTO23 - 埠切換輸出
@ PDOR_PDO15
PDOR - PDO15 - 埠資料輸出
@ PIDR_PID16
PIDR - PID16 - 埠輸入禁用
@ PSOR_PTSO27
PSOR - PTSO27 - 埠設定輸出
@ PIDR_PID27
PIDR - PID27 - 埠輸入禁用
@ PDDR_PDD1
PDDR - PDD1 - 埠資料方向
@ PSOR_PTSO29
PSOR - PTSO29 - 埠設定輸出
@ PDDR_PDD30
PDDR - PDD30 - 埠資料方向
@ PIDR_PID7
PIDR - PID7 - 埠輸入禁用
@ PDOR_PDO21
PDOR - PDO21 - 埠資料輸出
@ ISFR_ISF11
ISFR - ISF11 - 中斷狀態標誌
@ PDOR_PDO0
PDOR - PDO0 - 埠資料輸出
@ GICHR_GIWE16
GICHR - GIWE16 - 全局中斷控制高
@ GICLR_GIWE6
GICLR - GIWE6 - 全局中斷控制低
@ PDDR_PDD2
PDDR - PDD2 - 埠資料方向
@ PDOR_PDO11
PDOR - PDO11 - 埠資料輸出
@ PIDR_PID12
PIDR - PID12 - 埠輸入禁用
@ PDOR_PDO26
PDOR - PDO26 - 埠資料輸出
@ PTOR_PTTO30
PORT - PTTO30 - 埠切換輸出
@ VERID_MAJOR
VERID - MAJOR - 版本ID主要版本號
@ GICHR_GIWE31
GICHR - GIWE31 - 全局中斷控制高
@ PTOR_PTTO11
PORT - PTTO11 - 埠切換輸出
@ PDOR_PDO25
PDOR - PDO25 - 埠資料輸出
@ GICLR_GIWE9
GICLR - GIWE9 - 全局中斷控制低
@ PCOR_PTCO22
PCOR - PTCO22 - 埠清除輸出
@ PIDR_PID2
PIDR - PID2 - 埠輸入禁用
@ GICHR_GIWE27
GICHR - GIWE27 - 全局中斷控制高
@ PDDR_PDD9
PDDR - PDD9 - 埠資料方向
@ PTOR_PTTO16
PORT - PTTO16 - 埠切換輸出
@ PDDR_PDD31
PDDR - PDD31 - 埠資料方向
@ PIDR_PID25
PIDR - PID25 - 埠輸入禁用
@ PDIR_PDI22
PDIR - PDI22 - 埠資料輸入
@ PDDR_PDD22
PDDR - PDD22 - 埠資料方向
@ PSOR_PTSO18
PSOR - PTSO18 - 埠設定輸出
@ PDIR_PDI1
PDIR - PDI1 - 埠資料輸入
@ GICLR_GIWE11
GICLR - GIWE11 - 全局中斷控制低
@ PSOR_PTSO5
PSOR - PTSO5 - 埠設定輸出
@ ISFR_ISF1
ISFR - ISF1 - 中斷狀態標誌
@ PIDR_PID1
PIDR - PID1 - 埠輸入禁用
@ PDDR_PDD7
PDDR - PDD7 - 埠資料方向
@ PIDR_PID18
PIDR - PID18 - 埠輸入禁用
@ PTOR_PTTO17
PORT - PTTO17 - 埠切換輸出
@ PDDR_PDD10
PDDR - PDD10 - 埠資料方向
@ PDDR_PDD24
PDDR - PDD24 - 埠資料方向
@ ISFR_ISF26
ISFR - ISF26 - 中斷狀態標誌
@ PDOR_PDO13
PDOR - PDO13 - 埠資料輸出
@ PDIR_PDI3
PDIR - PDI3 - 埠資料輸入
@ PSOR_PTSO26
PSOR - PTSO26 - 埠設定輸出
@ PDOR_PDO14
PDOR - PDO14 - 埠資料輸出
@ GICHR_GIWE17
GICHR - GIWE17 - 全局中斷控制高
@ PDDR_PDD18
PDDR - PDD18 - 埠資料方向
@ PTOR_PTTO3
PORT - PTTO3 - 埠切換輸出
@ PSOR_PTSO8
PSOR - PTSO8 - 埠設定輸出
@ PDIR_PDI10
PDIR - PDI10 - 埠資料輸入
@ PSOR_PTSO25
PSOR - PTSO25 - 埠設定輸出
@ PIDR_PID11
PIDR - PID11 - 埠輸入禁用
@ PDIR_PDI9
PDIR - PDI9 - 埠資料輸入
@ PDIR_PDI15
PDIR - PDI15 - 埠資料輸入
@ PCOR_PTCO26
PCOR - PTCO26 - 埠清除輸出
@ GICLR_GIWE2
GICLR - GIWE2 - 全局中斷控制低
@ PIDR_PID15
PIDR - PID15 - 埠輸入禁用
@ PDIR_PDI20
PDIR - PDI20 - 埠資料輸入
@ GICHR_GIWE19
GICHR - GIWE19 - 全局中斷控制高
@ ISFR_ISF20
ISFR - ISF20 - 中斷狀態標誌
@ PSOR_PTSO12
PSOR - PTSO12 - 埠設定輸出
@ GICLR_GIWE12
GICLR - GIWE12 - 全局中斷控制低
@ PIDR_PID5
PIDR - PID5 - 埠輸入禁用
@ PIDR_PID21
PIDR - PID21 - 埠輸入禁用
@ PCOR_PTCO14
PCOR - PTCO14 - 埠清除輸出
@ PCOR_PTCO0
PCOR - PTCO0 - 埠清除輸出
@ GICHR_GIWE25
GICHR - GIWE25 - 全局中斷控制高
@ GICHR_GIWE20
GICHR - GIWE20 - 全局中斷控制高
@ PTOR_PTTO15
PORT - PTTO15 - 埠切換輸出
@ PTOR_PTTO13
PORT - PTTO13 - 埠切換輸出
@ GICLR_GIWE0
GICLR - GIWE0 - 全局中斷控制低
@ ISFR_ISF6
ISFR - ISF6 - 中斷狀態標誌
@ PDIR_PDI2
PDIR - PDI2 - 埠資料輸入
@ PDOR_PDO20
PDOR - PDO20 - 埠資料輸出
@ ISFR_ISF7
ISFR - ISF7 - 中斷狀態標誌
@ GICLR_GIWE8
GICLR - GIWE8 - 全局中斷控制低
@ PCOR_PTCO1
PCOR - PTCO1 - 埠清除輸出
@ PTOR_PTTO18
PORT - PTTO18 - 埠切換輸出
@ PIDR_PID6
PIDR - PID6 - 埠輸入禁用
@ PTOR_PTTO12
PORT - PTTO12 - 埠切換輸出
@ PCOR_PTCO27
PCOR - PTCO27 - 埠清除輸出
@ PTOR_PTTO4
PORT - PTTO4 - 埠切換輸出
@ PIDR_PID31
PIDR - PID31 - 埠輸入禁用
@ PIDR_PID13
PIDR - PID13 - 埠輸入禁用
@ PDDR_PDD29
PDDR - PDD29 - 埠資料方向
@ PCOR_PTCO10
PCOR - PTCO10 - 埠清除輸出
@ PCOR_PTCO23
PCOR - PTCO23 - 埠清除輸出
@ PTOR_PTTO5
PORT - PTTO5 - 埠切換輸出
@ PDOR_PDO2
PDOR - PDO2 - 埠資料輸出
@ PDIR_PDI6
PDIR - PDI6 - 埠資料輸入
@ PIDR_PID19
PIDR - PID19 - 埠輸入禁用
@ ISFR_ISF5
ISFR - ISF5 - 中斷狀態標誌
@ PSOR_PTSO1
PSOR - PTSO1 - 埠設定輸出
@ GICHR_GIWE26
GICHR - GIWE26 - 全局中斷控制高
@ PDOR_PDO30
PDOR - PDO30 - 埠資料輸出
@ PTOR_PTTO6
PORT - PTTO6 - 埠切換輸出
@ ISFR_ISF22
ISFR - ISF22 - 中斷狀態標誌
@ GICLR_GIWE14
GICLR - GIWE14 - 全局中斷控制低
@ PDOR_PDO7
PDOR - PDO7 - 埠資料輸出
@ GICLR_GIWE10
GICLR - GIWE10 - 全局中斷控制低
GPIO
GPIO埠0引腳多功能選擇列舉
Definition core/mux/gpio0/GPIO.h:51
The GPIO pin configuration structure.
Definition PinConfig.h:39
GPIO 週邊暫存器存取層
Definition gpio/Register.h:45
__O uint32 ptor
埠切換輸出暫存器 (偏移: 0x4C,唯寫)
Definition gpio/Register.h:98
__IO uint32 isfr[1]
中斷狀態旗標暫存器 (偏移: 0x120,步長: 0x4,讀寫)
Definition gpio/Register.h:178
__O uint32 gichr
全域中斷控制高位暫存器 (偏移: 0x104,唯寫)
Definition gpio/Register.h:163
__O uint32 pcor
埠清除輸出暫存器 (偏移: 0x48,唯寫)
Definition gpio/Register.h:90
__IO uint32 icr[32]
中斷控制暫存器陣列 (偏移: 0x80,步長: 0x4,讀寫)
Definition gpio/Register.h:147
__I uint32 pdir
埠資料輸入暫存器 (偏移: 0x50,唯讀)
Definition gpio/Register.h:106
__O uint32 giclr
全域中斷控制低位暫存器 (偏移: 0x100,唯寫)
Definition gpio/Register.h:155
__IO uint32 pidr
埠輸入停用暫存器 (偏移: 0x58,讀寫)
Definition gpio/Register.h:124
__O uint32 psor
埠設定輸出暫存器 (偏移: 0x44,唯寫)
Definition gpio/Register.h:82
GPIO 週邊版本資訊結構體
Definition VersionInfo.h:38