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chip/gpio/GPIO.h
1
7#ifndef MCXA153_A3754241_08E1_4F86_B049_0FACC9D70DF5
8#define MCXA153_A3754241_08E1_4F86_B049_0FACC9D70DF5
9
10/* ***************************************************************************************
11 * Include
12 */
13#include "mframe.h"
14
15//----------------------------------------------------------------------------------------
16#include "./../gpio/Count.h"
17#include "./../gpio/InterruptConfig.h"
18#include "./../gpio/Mask.h"
19#include "./../gpio/PinConfig.h"
20#include "./../gpio/Register.h"
21#include "./../gpio/Shift.h"
22#include "./../gpio/VersionInfo.h"
23
24//----------------------------------------------------------------------------------------
25
26/* ***************************************************************************************
27 * Namespace
28 */
29namespace mcxa153::chip::gpio {
30 class GPIO;
31 extern Register& GPIO0;
32 extern Register& GPIO1;
33 extern Register& GPIO2;
34 extern Register& GPIO3;
35 extern Register* const GPIO[];
36} // namespace mcxa153::chip::gpio
37
38/* ***************************************************************************************
39 * Class/Interface/Struct/Enum
40 */
41
130 /* *************************************************************************************
131 * Variable
132 */
133
134 /* *************************************************************************************
135 * Abstract Method
136 */
137
138 /* *************************************************************************************
139 * Construct Method
140 */
141 protected:
146 virtual ~GPIO(void) override = default;
147
148 /* *************************************************************************************
149 * Operator Method
150 */
151
152 /* *************************************************************************************
153 * Override Method
154 */
155
156 /* *************************************************************************************
157 * Public Method
158 */
159
160 /* *************************************************************************************
161 * Protected Method
162 */
163
164 /* *************************************************************************************
165 * Private Method
166 */
167
168 /* *************************************************************************************
169 * Static Variable
170 */
171
172 /* *************************************************************************************
173 * Static Method
174 */
175 public:
202 static void pinInit(Register& base, uint32 pin, const PinConfig& config);
203
210 static void getVersionInfo(Register& base, VersionInfo& info);
211
218 static inline void portInputEnable(Register& base, uint32 mask) {
219 base.pidr &= static_cast<uint32>(~mask);
220 }
221
228 static inline void portInputDisable(Register& base, uint32 mask) {
229 base.pidr |= static_cast<uint32>(mask);
230 }
231
241 static inline void pinWrite(Register& base, uint32 pin, uint8 output) {
242 if (output == 0U) {
243 base.pcor = static_cast<uint32>(1UL << pin);
244 } else {
245 base.psor = static_cast<uint32>(1UL << pin);
246 }
247 }
248
255 static inline void portSet(Register& base, uint32 mask) {
256 base.psor = static_cast<uint32>(mask);
257 }
258
265 static inline void portClear(Register& base, uint32 mask) {
266 base.pcor = static_cast<uint32>(mask);
267 }
268
275 static inline void portToggle(Register& base, uint32 mask) {
276 base.ptor = static_cast<uint32>(mask);
277 }
278
288 static inline uint32 pinRead(Register& base, uint32 pin) {
289 return ((static_cast<uint32>(base.pdir) >> pin) & 0x01UL);
290 }
291
316 static inline void setPinInterruptConfig(Register& base,
317 uint32 pin,
318 InterruptConfig config) {
319 base.icr[pin] =
320 static_cast<uint32>((base.icr[pin] & ~+Mask::ICR_IRQC) | GPIO::ICR_IRQC(+config));
321 }
322
332 static uint32 gpioGetInterruptFlags(Register& base);
333
341 static uint8 pinGetInterruptFlag(Register& base, uint32 pin);
342
349 static void gpioClearInterruptFlags(Register& base, uint32 mask);
350
357 static void pinClearInterruptFlag(Register& base, uint32 pin);
358
364 static inline uint32 getPinsDMARequestFlags(Register& base) {
365 return (base.isfr[1]);
366 }
367
392 static inline void setMultipleInterruptPinsConfig(Register& base,
393 uint32 mask,
394 InterruptConfig config) {
395 if (0UL != (mask & 0xffffUL)) {
396 base.giclr = static_cast<uint32>((GPIO::ICR_IRQC(+config)) | (mask & 0xffffU));
397 }
398 mask = mask >> 16U;
399 if (mask != 0UL) {
400 base.gichr = static_cast<uint32>((GPIO::ICR_IRQC(+config)) | (mask & 0xffffU));
401 }
402 }
403
413 static inline constexpr uint32 VERID_FEATURE(uint32 value) {
414 return ((value << +Shift::VERID_FEATURE) & +Mask::VERID_FEATURE);
415 }
416
422 static inline constexpr uint32 VERID_MINOR(uint32 value) {
423 return ((value << +Shift::VERID_MINOR) & +Mask::VERID_MINOR);
424 }
425
431 static inline constexpr uint32 VERID_MAJOR(uint32 value) {
432 return ((value << +Shift::VERID_MAJOR) & +Mask::VERID_MAJOR);
433 }
434
440 static inline constexpr uint32 PARAM_IRQNUM(uint32 value) {
441 return ((value << +Shift::PARAM_IRQNUM) & +Mask::PARAM_IRQNUM);
442 }
443
453 static inline constexpr uint32 PDOR_PDO0(uint32 value) {
454 return ((value << +Shift::PDOR_PDO0) & +Mask::PDOR_PDO0);
455 }
456
466 static inline constexpr uint32 PDOR_PDO1(uint32 value) {
467 return ((value << +Shift::PDOR_PDO1) & +Mask::PDOR_PDO1);
468 }
469
479 static inline constexpr uint32 PDOR_PDO2(uint32 value) {
480 return ((value << +Shift::PDOR_PDO2) & +Mask::PDOR_PDO2);
481 }
482
492 static inline constexpr uint32 PDOR_PDO3(uint32 value) {
493 return ((value << +Shift::PDOR_PDO3) & +Mask::PDOR_PDO3);
494 }
495
505 static inline constexpr uint32 PDOR_PDO4(uint32 value) {
506 return ((value << +Shift::PDOR_PDO4) & +Mask::PDOR_PDO4);
507 }
508
518 static inline constexpr uint32 PDOR_PDO5(uint32 value) {
519 return ((value << +Shift::PDOR_PDO5) & +Mask::PDOR_PDO5);
520 }
521
531 static inline constexpr uint32 PDOR_PDO6(uint32 value) {
532 return ((value << +Shift::PDOR_PDO6) & +Mask::PDOR_PDO6);
533 }
534
544 static inline constexpr uint32 PDOR_PDO7(uint32 value) {
545 return ((value << +Shift::PDOR_PDO7) & +Mask::PDOR_PDO7);
546 }
547
557 static inline constexpr uint32 PDOR_PDO8(uint32 value) {
558 return ((value << +Shift::PDOR_PDO8) & +Mask::PDOR_PDO8);
559 }
560
570 static inline constexpr uint32 PDOR_PDO9(uint32 value) {
571 return ((value << +Shift::PDOR_PDO9) & +Mask::PDOR_PDO9);
572 }
573
583 static inline constexpr uint32 PDOR_PDO10(uint32 value) {
584 return ((value << +Shift::PDOR_PDO10) & +Mask::PDOR_PDO10);
585 }
586
596 static inline constexpr uint32 PDOR_PDO11(uint32 value) {
597 return ((value << +Shift::PDOR_PDO11) & +Mask::PDOR_PDO11);
598 }
599
609 static inline constexpr uint32 PDOR_PDO12(uint32 value) {
610 return ((value << +Shift::PDOR_PDO12) & +Mask::PDOR_PDO12);
611 }
612
622 static inline constexpr uint32 PDOR_PDO13(uint32 value) {
623 return ((value << +Shift::PDOR_PDO13) & +Mask::PDOR_PDO13);
624 }
625
635 static inline constexpr uint32 PDOR_PDO14(uint32 value) {
636 return ((value << +Shift::PDOR_PDO14) & +Mask::PDOR_PDO14);
637 }
638
648 static inline constexpr uint32 PDOR_PDO15(uint32 value) {
649 return ((value << +Shift::PDOR_PDO15) & +Mask::PDOR_PDO15);
650 }
651
661 static inline constexpr uint32 PDOR_PDO16(uint32 value) {
662 return ((value << +Shift::PDOR_PDO16) & +Mask::PDOR_PDO16);
663 }
664
674 static inline constexpr uint32 PDOR_PDO17(uint32 value) {
675 return ((value << +Shift::PDOR_PDO17) & +Mask::PDOR_PDO17);
676 }
677
687 static inline constexpr uint32 PDOR_PDO18(uint32 value) {
688 return ((value << +Shift::PDOR_PDO18) & +Mask::PDOR_PDO18);
689 }
690
700 static inline constexpr uint32 PDOR_PDO19(uint32 value) {
701 return ((value << +Shift::PDOR_PDO19) & +Mask::PDOR_PDO19);
702 }
703
713 static inline constexpr uint32 PDOR_PDO20(uint32 value) {
714 return ((value << +Shift::PDOR_PDO20) & +Mask::PDOR_PDO20);
715 }
716
726 static inline constexpr uint32 PDOR_PDO21(uint32 value) {
727 return ((value << +Shift::PDOR_PDO21) & +Mask::PDOR_PDO21);
728 }
729
739 static inline constexpr uint32 PDOR_PDO22(uint32 value) {
740 return ((value << +Shift::PDOR_PDO22) & +Mask::PDOR_PDO22);
741 }
742
752 static inline constexpr uint32 PDOR_PDO23(uint32 value) {
753 return ((value << +Shift::PDOR_PDO23) & +Mask::PDOR_PDO23);
754 }
755
765 static inline constexpr uint32 PDOR_PDO24(uint32 value) {
766 return ((value << +Shift::PDOR_PDO24) & +Mask::PDOR_PDO24);
767 }
768
778 static inline constexpr uint32 PDOR_PDO25(uint32 value) {
779 return ((value << +Shift::PDOR_PDO25) & +Mask::PDOR_PDO25);
780 }
781
791 static inline constexpr uint32 PDOR_PDO26(uint32 value) {
792 return ((value << +Shift::PDOR_PDO26) & +Mask::PDOR_PDO26);
793 }
794
804 static inline constexpr uint32 PDOR_PDO27(uint32 value) {
805 return ((value << +Shift::PDOR_PDO27) & +Mask::PDOR_PDO27);
806 }
807
817 static inline constexpr uint32 PDOR_PDO28(uint32 value) {
818 return ((value << +Shift::PDOR_PDO28) & +Mask::PDOR_PDO28);
819 }
820
830 static inline constexpr uint32 PDOR_PDO29(uint32 value) {
831 return ((value << +Shift::PDOR_PDO29) & +Mask::PDOR_PDO29);
832 }
833
843 static inline constexpr uint32 PDOR_PDO30(uint32 value) {
844 return ((value << +Shift::PDOR_PDO30) & +Mask::PDOR_PDO30);
845 }
846
856 static inline constexpr uint32 PDOR_PDO31(uint32 value) {
857 return ((value << +Shift::PDOR_PDO31) & +Mask::PDOR_PDO31);
858 }
859
869 static inline constexpr uint32 PSOR_PTSO0(uint32 value) {
870 return ((value << +Shift::PSOR_PTSO0) & +Mask::PSOR_PTSO0);
871 }
872
882 static inline constexpr uint32 PSOR_PTSO1(uint32 value) {
883 return ((value << +Shift::PSOR_PTSO1) & +Mask::PSOR_PTSO1);
884 }
885
895 static inline constexpr uint32 PSOR_PTSO2(uint32 value) {
896 return ((value << +Shift::PSOR_PTSO2) & +Mask::PSOR_PTSO2);
897 }
898
908 static inline constexpr uint32 PSOR_PTSO3(uint32 value) {
909 return ((value << +Shift::PSOR_PTSO3) & +Mask::PSOR_PTSO3);
910 }
911
921 static inline constexpr uint32 PSOR_PTSO4(uint32 value) {
922 return ((value << +Shift::PSOR_PTSO4) & +Mask::PSOR_PTSO4);
923 }
924
934 static inline constexpr uint32 PSOR_PTSO5(uint32 value) {
935 return ((value << +Shift::PSOR_PTSO5) & +Mask::PSOR_PTSO5);
936 }
937
947 static inline constexpr uint32 PSOR_PTSO6(uint32 value) {
948 return ((value << +Shift::PSOR_PTSO6) & +Mask::PSOR_PTSO6);
949 }
950
960 static inline constexpr uint32 PSOR_PTSO7(uint32 value) {
961 return ((value << +Shift::PSOR_PTSO7) & +Mask::PSOR_PTSO7);
962 }
963
973 static inline constexpr uint32 PSOR_PTSO8(uint32 value) {
974 return ((value << +Shift::PSOR_PTSO8) & +Mask::PSOR_PTSO8);
975 }
976
986 static inline constexpr uint32 PSOR_PTSO9(uint32 value) {
987 return ((value << +Shift::PSOR_PTSO9) & +Mask::PSOR_PTSO9);
988 }
989
999 static inline constexpr uint32 PSOR_PTSO10(uint32 value) {
1000 return ((value << +Shift::PSOR_PTSO10) & +Mask::PSOR_PTSO10);
1001 }
1002
1012 static inline constexpr uint32 PSOR_PTSO11(uint32 value) {
1013 return ((value << +Shift::PSOR_PTSO11) & +Mask::PSOR_PTSO11);
1014 }
1015
1025 static inline constexpr uint32 PSOR_PTSO12(uint32 value) {
1026 return ((value << +Shift::PSOR_PTSO12) & +Mask::PSOR_PTSO12);
1027 }
1028
1038 static inline constexpr uint32 PSOR_PTSO13(uint32 value) {
1039 return ((value << +Shift::PSOR_PTSO13) & +Mask::PSOR_PTSO13);
1040 }
1041
1051 static inline constexpr uint32 PSOR_PTSO14(uint32 value) {
1052 return ((value << +Shift::PSOR_PTSO14) & +Mask::PSOR_PTSO14);
1053 }
1054
1064 static inline constexpr uint32 PSOR_PTSO15(uint32 value) {
1065 return ((value << +Shift::PSOR_PTSO15) & +Mask::PSOR_PTSO15);
1066 }
1067
1077 static inline constexpr uint32 PSOR_PTSO16(uint32 value) {
1078 return ((value << +Shift::PSOR_PTSO16) & +Mask::PSOR_PTSO16);
1079 }
1080
1090 static inline constexpr uint32 PSOR_PTSO17(uint32 value) {
1091 return ((value << +Shift::PSOR_PTSO17) & +Mask::PSOR_PTSO17);
1092 }
1093
1103 static inline constexpr uint32 PSOR_PTSO18(uint32 value) {
1104 return ((value << +Shift::PSOR_PTSO18) & +Mask::PSOR_PTSO18);
1105 }
1106
1116 static inline constexpr uint32 PSOR_PTSO19(uint32 value) {
1117 return ((value << +Shift::PSOR_PTSO19) & +Mask::PSOR_PTSO19);
1118 }
1119
1129 static inline constexpr uint32 PSOR_PTSO20(uint32 value) {
1130 return ((value << +Shift::PSOR_PTSO20) & +Mask::PSOR_PTSO20);
1131 }
1132
1142 static inline constexpr uint32 PSOR_PTSO21(uint32 value) {
1143 return ((value << +Shift::PSOR_PTSO21) & +Mask::PSOR_PTSO21);
1144 }
1145
1155 static inline constexpr uint32 PSOR_PTSO22(uint32 value) {
1156 return ((value << +Shift::PSOR_PTSO22) & +Mask::PSOR_PTSO22);
1157 }
1158
1168 static inline constexpr uint32 PSOR_PTSO23(uint32 value) {
1169 return ((value << +Shift::PSOR_PTSO23) & +Mask::PSOR_PTSO23);
1170 }
1171
1181 static inline constexpr uint32 PSOR_PTSO24(uint32 value) {
1182 return ((value << +Shift::PSOR_PTSO24) & +Mask::PSOR_PTSO24);
1183 }
1184
1194 static inline constexpr uint32 PSOR_PTSO25(uint32 value) {
1195 return ((value << +Shift::PSOR_PTSO25) & +Mask::PSOR_PTSO25);
1196 }
1197
1207 static inline constexpr uint32 PSOR_PTSO26(uint32 value) {
1208 return ((value << +Shift::PSOR_PTSO26) & +Mask::PSOR_PTSO26);
1209 }
1210
1220 static inline constexpr uint32 PSOR_PTSO27(uint32 value) {
1221 return ((value << +Shift::PSOR_PTSO27) & +Mask::PSOR_PTSO27);
1222 }
1223
1233 static inline constexpr uint32 PSOR_PTSO28(uint32 value) {
1234 return ((value << +Shift::PSOR_PTSO28) & +Mask::PSOR_PTSO28);
1235 }
1236
1246 static inline constexpr uint32 PSOR_PTSO29(uint32 value) {
1247 return ((value << +Shift::PSOR_PTSO29) & +Mask::PSOR_PTSO29);
1248 }
1249
1259 static inline constexpr uint32 PSOR_PTSO30(uint32 value) {
1260 return ((value << +Shift::PSOR_PTSO30) & +Mask::PSOR_PTSO30);
1261 }
1262
1272 static inline constexpr uint32 PSOR_PTSO31(uint32 value) {
1273 return ((value << +Shift::PSOR_PTSO31) & +Mask::PSOR_PTSO31);
1274 }
1275
1285 static inline constexpr uint32 PCOR_PTCO0(uint32 value) {
1286 return ((value << +Shift::PCOR_PTCO0) & +Mask::PCOR_PTCO0);
1287 }
1288
1298 static inline constexpr uint32 PCOR_PTCO1(uint32 value) {
1299 return ((value << +Shift::PCOR_PTCO1) & +Mask::PCOR_PTCO1);
1300 }
1301
1311 static inline constexpr uint32 PCOR_PTCO2(uint32 value) {
1312 return ((value << +Shift::PCOR_PTCO2) & +Mask::PCOR_PTCO2);
1313 }
1314
1324 static inline constexpr uint32 PCOR_PTCO3(uint32 value) {
1325 return ((value << +Shift::PCOR_PTCO3) & +Mask::PCOR_PTCO3);
1326 }
1327
1337 static inline constexpr uint32 PCOR_PTCO4(uint32 value) {
1338 return ((value << +Shift::PCOR_PTCO4) & +Mask::PCOR_PTCO4);
1339 }
1340
1350 static inline constexpr uint32 PCOR_PTCO5(uint32 value) {
1351 return ((value << +Shift::PCOR_PTCO5) & +Mask::PCOR_PTCO5);
1352 }
1353
1363 static inline constexpr uint32 PCOR_PTCO6(uint32 value) {
1364 return ((value << +Shift::PCOR_PTCO6) & +Mask::PCOR_PTCO6);
1365 }
1366
1376 static inline constexpr uint32 PCOR_PTCO7(uint32 value) {
1377 return ((value << +Shift::PCOR_PTCO7) & +Mask::PCOR_PTCO7);
1378 }
1379
1389 static inline constexpr uint32 PCOR_PTCO8(uint32 value) {
1390 return ((value << +Shift::PCOR_PTCO8) & +Mask::PCOR_PTCO8);
1391 }
1392
1402 static inline constexpr uint32 PCOR_PTCO9(uint32 value) {
1403 return ((value << +Shift::PCOR_PTCO9) & +Mask::PCOR_PTCO9);
1404 }
1405
1415 static inline constexpr uint32 PCOR_PTCO10(uint32 value) {
1416 return ((value << +Shift::PCOR_PTCO10) & +Mask::PCOR_PTCO10);
1417 }
1418
1428 static inline constexpr uint32 PCOR_PTCO11(uint32 value) {
1429 return ((value << +Shift::PCOR_PTCO11) & +Mask::PCOR_PTCO11);
1430 }
1431
1441 static inline constexpr uint32 PCOR_PTCO12(uint32 value) {
1442 return ((value << +Shift::PCOR_PTCO12) & +Mask::PCOR_PTCO12);
1443 }
1444
1454 static inline constexpr uint32 PCOR_PTCO13(uint32 value) {
1455 return ((value << +Shift::PCOR_PTCO13) & +Mask::PCOR_PTCO13);
1456 }
1457
1467 static inline constexpr uint32 PCOR_PTCO14(uint32 value) {
1468 return ((value << +Shift::PCOR_PTCO14) & +Mask::PCOR_PTCO14);
1469 }
1470
1480 static inline constexpr uint32 PCOR_PTCO15(uint32 value) {
1481 return ((value << +Shift::PCOR_PTCO15) & +Mask::PCOR_PTCO15);
1482 }
1483
1493 static inline constexpr uint32 PCOR_PTCO16(uint32 value) {
1494 return ((value << +Shift::PCOR_PTCO16) & +Mask::PCOR_PTCO16);
1495 }
1496
1506 static inline constexpr uint32 PCOR_PTCO17(uint32 value) {
1507 return ((value << +Shift::PCOR_PTCO17) & +Mask::PCOR_PTCO17);
1508 }
1509
1519 static inline constexpr uint32 PCOR_PTCO18(uint32 value) {
1520 return ((value << +Shift::PCOR_PTCO18) & +Mask::PCOR_PTCO18);
1521 }
1522
1532 static inline constexpr uint32 PCOR_PTCO19(uint32 value) {
1533 return ((value << +Shift::PCOR_PTCO19) & +Mask::PCOR_PTCO19);
1534 }
1535
1545 static inline constexpr uint32 PCOR_PTCO20(uint32 value) {
1546 return ((value << +Shift::PCOR_PTCO20) & +Mask::PCOR_PTCO20);
1547 }
1548
1558 static inline constexpr uint32 PCOR_PTCO21(uint32 value) {
1559 return ((value << +Shift::PCOR_PTCO21) & +Mask::PCOR_PTCO21);
1560 }
1561
1571 static inline constexpr uint32 PCOR_PTCO22(uint32 value) {
1572 return ((value << +Shift::PCOR_PTCO22) & +Mask::PCOR_PTCO22);
1573 }
1574
1584 static inline constexpr uint32 PCOR_PTCO23(uint32 value) {
1585 return ((value << +Shift::PCOR_PTCO23) & +Mask::PCOR_PTCO23);
1586 }
1587
1597 static inline constexpr uint32 PCOR_PTCO24(uint32 value) {
1598 return ((value << +Shift::PCOR_PTCO24) & +Mask::PCOR_PTCO24);
1599 }
1600
1610 static inline constexpr uint32 PCOR_PTCO25(uint32 value) {
1611 return ((value << +Shift::PCOR_PTCO25) & +Mask::PCOR_PTCO25);
1612 }
1613
1623 static inline constexpr uint32 PCOR_PTCO26(uint32 value) {
1624 return ((value << +Shift::PCOR_PTCO26) & +Mask::PCOR_PTCO26);
1625 }
1626
1636 static inline constexpr uint32 PCOR_PTCO27(uint32 value) {
1637 return ((value << +Shift::PCOR_PTCO27) & +Mask::PCOR_PTCO27);
1638 }
1639
1649 static inline constexpr uint32 PCOR_PTCO28(uint32 value) {
1650 return ((value << +Shift::PCOR_PTCO28) & +Mask::PCOR_PTCO28);
1651 }
1652
1662 static inline constexpr uint32 PCOR_PTCO29(uint32 value) {
1663 return ((value << +Shift::PCOR_PTCO29) & +Mask::PCOR_PTCO29);
1664 }
1665
1675 static inline constexpr uint32 PCOR_PTCO30(uint32 value) {
1676 return ((value << +Shift::PCOR_PTCO30) & +Mask::PCOR_PTCO30);
1677 }
1678
1688 static inline constexpr uint32 PCOR_PTCO31(uint32 value) {
1689 return ((value << +Shift::PCOR_PTCO31) & +Mask::PCOR_PTCO31);
1690 }
1691
1701 static inline constexpr uint32 PTOR_PTTO0(uint32 value) {
1702 return ((value << +Shift::PTOR_PTTO0) & +Mask::PTOR_PTTO0);
1703 }
1704
1714 static inline constexpr uint32 PTOR_PTTO1(uint32 value) {
1715 return ((value << +Shift::PTOR_PTTO1) & +Mask::PTOR_PTTO1);
1716 }
1717
1727 static inline constexpr uint32 PTOR_PTTO2(uint32 value) {
1728 return ((value << +Shift::PTOR_PTTO2) & +Mask::PTOR_PTTO2);
1729 }
1730
1740 static inline constexpr uint32 PTOR_PTTO3(uint32 value) {
1741 return ((value << +Shift::PTOR_PTTO3) & +Mask::PTOR_PTTO3);
1742 }
1743
1753 static inline constexpr uint32 PTOR_PTTO4(uint32 value) {
1754 return ((value << +Shift::PTOR_PTTO4) & +Mask::PTOR_PTTO4);
1755 }
1756
1766 static inline constexpr uint32 PTOR_PTTO5(uint32 value) {
1767 return ((value << +Shift::PTOR_PTTO5) & +Mask::PTOR_PTTO5);
1768 }
1769
1779 static inline constexpr uint32 PTOR_PTTO6(uint32 value) {
1780 return ((value << +Shift::PTOR_PTTO6) & +Mask::PTOR_PTTO6);
1781 }
1782
1792 static inline constexpr uint32 PTOR_PTTO7(uint32 value) {
1793 return ((value << +Shift::PTOR_PTTO7) & +Mask::PTOR_PTTO7);
1794 }
1795
1805 static inline constexpr uint32 PTOR_PTTO8(uint32 value) {
1806 return ((value << +Shift::PTOR_PTTO8) & +Mask::PTOR_PTTO8);
1807 }
1808
1818 static inline constexpr uint32 PTOR_PTTO9(uint32 value) {
1819 return ((value << +Shift::PTOR_PTTO9) & +Mask::PTOR_PTTO9);
1820 }
1821
1831 static inline constexpr uint32 PTOR_PTTO10(uint32 value) {
1832 return ((value << +Shift::PTOR_PTTO10) & +Mask::PTOR_PTTO10);
1833 }
1834
1844 static inline constexpr uint32 PTOR_PTTO11(uint32 value) {
1845 return ((value << +Shift::PTOR_PTTO11) & +Mask::PTOR_PTTO11);
1846 }
1847
1857 static inline constexpr uint32 PTOR_PTTO12(uint32 value) {
1858 return ((value << +Shift::PTOR_PTTO12) & +Mask::PTOR_PTTO12);
1859 }
1860
1870 static inline constexpr uint32 PTOR_PTTO13(uint32 value) {
1871 return ((value << +Shift::PTOR_PTTO13) & +Mask::PTOR_PTTO13);
1872 }
1873
1883 static inline constexpr uint32 PTOR_PTTO14(uint32 value) {
1884 return ((value << +Shift::PTOR_PTTO14) & +Mask::PTOR_PTTO14);
1885 }
1886
1896 static inline constexpr uint32 PTOR_PTTO15(uint32 value) {
1897 return ((value << +Shift::PTOR_PTTO15) & +Mask::PTOR_PTTO15);
1898 }
1899
1909 static inline constexpr uint32 PTOR_PTTO16(uint32 value) {
1910 return ((value << +Shift::PTOR_PTTO16) & +Mask::PTOR_PTTO16);
1911 }
1912
1922 static inline constexpr uint32 PTOR_PTTO17(uint32 value) {
1923 return ((value << +Shift::PTOR_PTTO17) & +Mask::PTOR_PTTO17);
1924 }
1925
1935 static inline constexpr uint32 PTOR_PTTO18(uint32 value) {
1936 return ((value << +Shift::PTOR_PTTO18) & +Mask::PTOR_PTTO18);
1937 }
1938
1948 static inline constexpr uint32 PTOR_PTTO19(uint32 value) {
1949 return ((value << +Shift::PTOR_PTTO19) & +Mask::PTOR_PTTO19);
1950 }
1951
1961 static inline constexpr uint32 PTOR_PTTO20(uint32 value) {
1962 return ((value << +Shift::PTOR_PTTO20) & +Mask::PTOR_PTTO20);
1963 }
1964
1974 static inline constexpr uint32 PTOR_PTTO21(uint32 value) {
1975 return ((value << +Shift::PTOR_PTTO21) & +Mask::PTOR_PTTO21);
1976 }
1977
1987 static inline constexpr uint32 PTOR_PTTO22(uint32 value) {
1988 return ((value << +Shift::PTOR_PTTO22) & +Mask::PTOR_PTTO22);
1989 }
1990
2000 static inline constexpr uint32 PTOR_PTTO23(uint32 value) {
2001 return ((value << +Shift::PTOR_PTTO23) & +Mask::PTOR_PTTO23);
2002 }
2003
2013 static inline constexpr uint32 PTOR_PTTO24(uint32 value) {
2014 return ((value << +Shift::PTOR_PTTO24) & +Mask::PTOR_PTTO24);
2015 }
2016
2026 static inline constexpr uint32 PTOR_PTTO25(uint32 value) {
2027 return ((value << +Shift::PTOR_PTTO25) & +Mask::PTOR_PTTO25);
2028 }
2029
2039 static inline constexpr uint32 PTOR_PTTO26(uint32 value) {
2040 return ((value << +Shift::PTOR_PTTO26) & +Mask::PTOR_PTTO26);
2041 }
2042
2052 static inline constexpr uint32 PTOR_PTTO27(uint32 value) {
2053 return ((value << +Shift::PTOR_PTTO27) & +Mask::PTOR_PTTO27);
2054 }
2055
2065 static inline constexpr uint32 PTOR_PTTO28(uint32 value) {
2066 return ((value << +Shift::PTOR_PTTO28) & +Mask::PTOR_PTTO28);
2067 }
2068
2078 static inline constexpr uint32 PTOR_PTTO29(uint32 value) {
2079 return ((value << +Shift::PTOR_PTTO29) & +Mask::PTOR_PTTO29);
2080 }
2081
2091 static inline constexpr uint32 PTOR_PTTO30(uint32 value) {
2092 return ((value << +Shift::PTOR_PTTO30) & +Mask::PTOR_PTTO30);
2093 }
2094
2104 static inline constexpr uint32 PTOR_PTTO31(uint32 value) {
2105 return ((value << +Shift::PTOR_PTTO31) & +Mask::PTOR_PTTO31);
2106 }
2107
2117 static inline constexpr uint32 PDIR_PDI0(uint32 value) {
2118 return ((value << +Shift::PDIR_PDI0) & +Mask::PDIR_PDI0);
2119 }
2120
2130 static inline constexpr uint32 PDIR_PDI1(uint32 value) {
2131 return ((value << +Shift::PDIR_PDI1) & +Mask::PDIR_PDI1);
2132 }
2133
2143 static inline constexpr uint32 PDIR_PDI2(uint32 value) {
2144 return ((value << +Shift::PDIR_PDI2) & +Mask::PDIR_PDI2);
2145 }
2146
2156 static inline constexpr uint32 PDIR_PDI3(uint32 value) {
2157 return ((value << +Shift::PDIR_PDI3) & +Mask::PDIR_PDI3);
2158 }
2159
2169 static inline constexpr uint32 PDIR_PDI4(uint32 value) {
2170 return ((value << +Shift::PDIR_PDI4) & +Mask::PDIR_PDI4);
2171 }
2172
2182 static inline constexpr uint32 PDIR_PDI5(uint32 value) {
2183 return ((value << +Shift::PDIR_PDI5) & +Mask::PDIR_PDI5);
2184 }
2185
2195 static inline constexpr uint32 PDIR_PDI6(uint32 value) {
2196 return ((value << +Shift::PDIR_PDI6) & +Mask::PDIR_PDI6);
2197 }
2198
2208 static inline constexpr uint32 PDIR_PDI7(uint32 value) {
2209 return ((value << +Shift::PDIR_PDI7) & +Mask::PDIR_PDI7);
2210 }
2211
2221 static inline constexpr uint32 PDIR_PDI8(uint32 value) {
2222 return ((value << +Shift::PDIR_PDI8) & +Mask::PDIR_PDI8);
2223 }
2224
2234 static inline constexpr uint32 PDIR_PDI9(uint32 value) {
2235 return ((value << +Shift::PDIR_PDI9) & +Mask::PDIR_PDI9);
2236 }
2237
2247 static inline constexpr uint32 PDIR_PDI10(uint32 value) {
2248 return ((value << +Shift::PDIR_PDI10) & +Mask::PDIR_PDI10);
2249 }
2250
2260 static inline constexpr uint32 PDIR_PDI11(uint32 value) {
2261 return ((value << +Shift::PDIR_PDI11) & +Mask::PDIR_PDI11);
2262 }
2263
2273 static inline constexpr uint32 PDIR_PDI12(uint32 value) {
2274 return ((value << +Shift::PDIR_PDI12) & +Mask::PDIR_PDI12);
2275 }
2276
2286 static inline constexpr uint32 PDIR_PDI13(uint32 value) {
2287 return ((value << +Shift::PDIR_PDI13) & +Mask::PDIR_PDI13);
2288 }
2289
2299 static inline constexpr uint32 PDIR_PDI14(uint32 value) {
2300 return ((value << +Shift::PDIR_PDI14) & +Mask::PDIR_PDI14);
2301 }
2302
2312 static inline constexpr uint32 PDIR_PDI15(uint32 value) {
2313 return ((value << +Shift::PDIR_PDI15) & +Mask::PDIR_PDI15);
2314 }
2315
2325 static inline constexpr uint32 PDIR_PDI16(uint32 value) {
2326 return ((value << +Shift::PDIR_PDI16) & +Mask::PDIR_PDI16);
2327 }
2328
2338 static inline constexpr uint32 PDIR_PDI17(uint32 value) {
2339 return ((value << +Shift::PDIR_PDI17) & +Mask::PDIR_PDI17);
2340 }
2341
2351 static inline constexpr uint32 PDIR_PDI18(uint32 value) {
2352 return ((value << +Shift::PDIR_PDI18) & +Mask::PDIR_PDI18);
2353 }
2354
2364 static inline constexpr uint32 PDIR_PDI19(uint32 value) {
2365 return ((value << +Shift::PDIR_PDI19) & +Mask::PDIR_PDI19);
2366 }
2367
2377 static inline constexpr uint32 PDIR_PDI20(uint32 value) {
2378 return ((value << +Shift::PDIR_PDI20) & +Mask::PDIR_PDI20);
2379 }
2380
2390 static inline constexpr uint32 PDIR_PDI21(uint32 value) {
2391 return ((value << +Shift::PDIR_PDI21) & +Mask::PDIR_PDI21);
2392 }
2393
2403 static inline constexpr uint32 PDIR_PDI22(uint32 value) {
2404 return ((value << +Shift::PDIR_PDI22) & +Mask::PDIR_PDI22);
2405 }
2406
2416 static inline constexpr uint32 PDIR_PDI23(uint32 value) {
2417 return ((value << +Shift::PDIR_PDI23) & +Mask::PDIR_PDI23);
2418 }
2419
2429 static inline constexpr uint32 PDIR_PDI24(uint32 value) {
2430 return ((value << +Shift::PDIR_PDI24) & +Mask::PDIR_PDI24);
2431 }
2432
2442 static inline constexpr uint32 PDIR_PDI25(uint32 value) {
2443 return ((value << +Shift::PDIR_PDI25) & +Mask::PDIR_PDI25);
2444 }
2445
2455 static inline constexpr uint32 PDIR_PDI26(uint32 value) {
2456 return ((value << +Shift::PDIR_PDI26) & +Mask::PDIR_PDI26);
2457 }
2458
2468 static inline constexpr uint32 PDIR_PDI27(uint32 value) {
2469 return ((value << +Shift::PDIR_PDI27) & +Mask::PDIR_PDI27);
2470 }
2471
2481 static inline constexpr uint32 PDIR_PDI28(uint32 value) {
2482 return ((value << +Shift::PDIR_PDI28) & +Mask::PDIR_PDI28);
2483 }
2484
2494 static inline constexpr uint32 PDIR_PDI29(uint32 value) {
2495 return ((value << +Shift::PDIR_PDI29) & +Mask::PDIR_PDI29);
2496 }
2497
2507 static inline constexpr uint32 PDIR_PDI30(uint32 value) {
2508 return ((value << +Shift::PDIR_PDI30) & +Mask::PDIR_PDI30);
2509 }
2510
2520 static inline constexpr uint32 PDIR_PDI31(uint32 value) {
2521 return ((value << +Shift::PDIR_PDI31) & +Mask::PDIR_PDI31);
2522 }
2523
2533 static inline constexpr uint32 PDDR_PDD0(uint32 value) {
2534 return ((value << +Shift::PDDR_PDD0) & +Mask::PDDR_PDD0);
2535 }
2536
2546 static inline constexpr uint32 PDDR_PDD1(uint32 value) {
2547 return ((value << +Shift::PDDR_PDD1) & +Mask::PDDR_PDD1);
2548 }
2549
2559 static inline constexpr uint32 PDDR_PDD2(uint32 value) {
2560 return ((value << +Shift::PDDR_PDD2) & +Mask::PDDR_PDD2);
2561 }
2562
2572 static inline constexpr uint32 PDDR_PDD3(uint32 value) {
2573 return ((value << +Shift::PDDR_PDD3) & +Mask::PDDR_PDD3);
2574 }
2575
2585 static inline constexpr uint32 PDDR_PDD4(uint32 value) {
2586 return ((value << +Shift::PDDR_PDD4) & +Mask::PDDR_PDD4);
2587 }
2588
2598 static inline constexpr uint32 PDDR_PDD5(uint32 value) {
2599 return ((value << +Shift::PDDR_PDD5) & +Mask::PDDR_PDD5);
2600 }
2601
2611 static inline constexpr uint32 PDDR_PDD6(uint32 value) {
2612 return ((value << +Shift::PDDR_PDD6) & +Mask::PDDR_PDD6);
2613 }
2614
2624 static inline constexpr uint32 PDDR_PDD7(uint32 value) {
2625 return ((value << +Shift::PDDR_PDD7) & +Mask::PDDR_PDD7);
2626 }
2627
2637 static inline constexpr uint32 PDDR_PDD8(uint32 value) {
2638 return ((value << +Shift::PDDR_PDD8) & +Mask::PDDR_PDD8);
2639 }
2640
2650 static inline constexpr uint32 PDDR_PDD9(uint32 value) {
2651 return ((value << +Shift::PDDR_PDD9) & +Mask::PDDR_PDD9);
2652 }
2653
2663 static inline constexpr uint32 PDDR_PDD10(uint32 value) {
2664 return ((value << +Shift::PDDR_PDD10) & +Mask::PDDR_PDD10);
2665 }
2666
2676 static inline constexpr uint32 PDDR_PDD11(uint32 value) {
2677 return ((value << +Shift::PDDR_PDD11) & +Mask::PDDR_PDD11);
2678 }
2679
2689 static inline constexpr uint32 PDDR_PDD12(uint32 value) {
2690 return ((value << +Shift::PDDR_PDD12) & +Mask::PDDR_PDD12);
2691 }
2692
2702 static inline constexpr uint32 PDDR_PDD13(uint32 value) {
2703 return ((value << +Shift::PDDR_PDD13) & +Mask::PDDR_PDD13);
2704 }
2705
2715 static inline constexpr uint32 PDDR_PDD14(uint32 value) {
2716 return ((value << +Shift::PDDR_PDD14) & +Mask::PDDR_PDD14);
2717 }
2718
2728 static inline constexpr uint32 PDDR_PDD15(uint32 value) {
2729 return ((value << +Shift::PDDR_PDD15) & +Mask::PDDR_PDD15);
2730 }
2731
2741 static inline constexpr uint32 PDDR_PDD16(uint32 value) {
2742 return ((value << +Shift::PDDR_PDD16) & +Mask::PDDR_PDD16);
2743 }
2744
2754 static inline constexpr uint32 PDDR_PDD17(uint32 value) {
2755 return ((value << +Shift::PDDR_PDD17) & +Mask::PDDR_PDD17);
2756 }
2757
2767 static inline constexpr uint32 PDDR_PDD18(uint32 value) {
2768 return ((value << +Shift::PDDR_PDD18) & +Mask::PDDR_PDD18);
2769 }
2770
2780 static inline constexpr uint32 PDDR_PDD19(uint32 value) {
2781 return ((value << +Shift::PDDR_PDD19) & +Mask::PDDR_PDD19);
2782 }
2783
2793 static inline constexpr uint32 PDDR_PDD20(uint32 value) {
2794 return ((value << +Shift::PDDR_PDD20) & +Mask::PDDR_PDD20);
2795 }
2796
2806 static inline constexpr uint32 PDDR_PDD21(uint32 value) {
2807 return ((value << +Shift::PDDR_PDD21) & +Mask::PDDR_PDD21);
2808 }
2809
2819 static inline constexpr uint32 PDDR_PDD22(uint32 value) {
2820 return ((value << +Shift::PDDR_PDD22) & +Mask::PDDR_PDD22);
2821 }
2822
2832 static inline constexpr uint32 PDDR_PDD23(uint32 value) {
2833 return ((value << +Shift::PDDR_PDD23) & +Mask::PDDR_PDD23);
2834 }
2835
2845 static inline constexpr uint32 PDDR_PDD24(uint32 value) {
2846 return ((value << +Shift::PDDR_PDD24) & +Mask::PDDR_PDD24);
2847 }
2848
2858 static inline constexpr uint32 PDDR_PDD25(uint32 value) {
2859 return ((value << +Shift::PDDR_PDD25) & +Mask::PDDR_PDD25);
2860 }
2861
2871 static inline constexpr uint32 PDDR_PDD26(uint32 value) {
2872 return ((value << +Shift::PDDR_PDD26) & +Mask::PDDR_PDD26);
2873 }
2874
2884 static inline constexpr uint32 PDDR_PDD27(uint32 value) {
2885 return ((value << +Shift::PDDR_PDD27) & +Mask::PDDR_PDD27);
2886 }
2887
2897 static inline constexpr uint32 PDDR_PDD28(uint32 value) {
2898 return ((value << +Shift::PDDR_PDD28) & +Mask::PDDR_PDD28);
2899 }
2900
2910 static inline constexpr uint32 PDDR_PDD29(uint32 value) {
2911 return ((value << +Shift::PDDR_PDD29) & +Mask::PDDR_PDD29);
2912 }
2913
2923 static inline constexpr uint32 PDDR_PDD30(uint32 value) {
2924 return ((value << +Shift::PDDR_PDD30) & +Mask::PDDR_PDD30);
2925 }
2926
2936 static inline constexpr uint32 PDDR_PDD31(uint32 value) {
2937 return ((value << +Shift::PDDR_PDD31) & +Mask::PDDR_PDD31);
2938 }
2939
2949 static inline constexpr uint32 PIDR_PID0(uint32 value) {
2950 return ((value << +Shift::PIDR_PID0) & +Mask::PIDR_PID0);
2951 }
2952
2962 static inline constexpr uint32 PIDR_PID1(uint32 value) {
2963 return ((value << +Shift::PIDR_PID1) & +Mask::PIDR_PID1);
2964 }
2965
2975 static inline constexpr uint32 PIDR_PID2(uint32 value) {
2976 return ((value << +Shift::PIDR_PID2) & +Mask::PIDR_PID2);
2977 }
2978
2988 static inline constexpr uint32 PIDR_PID3(uint32 value) {
2989 return ((value << +Shift::PIDR_PID3) & +Mask::PIDR_PID3);
2990 }
2991
3001 static inline constexpr uint32 PIDR_PID4(uint32 value) {
3002 return ((value << +Shift::PIDR_PID4) & +Mask::PIDR_PID4);
3003 }
3004
3014 static inline constexpr uint32 PIDR_PID5(uint32 value) {
3015 return ((value << +Shift::PIDR_PID5) & +Mask::PIDR_PID5);
3016 }
3017
3027 static inline constexpr uint32 PIDR_PID6(uint32 value) {
3028 return ((value << +Shift::PIDR_PID6) & +Mask::PIDR_PID6);
3029 }
3030
3040 static inline constexpr uint32 PIDR_PID7(uint32 value) {
3041 return ((value << +Shift::PIDR_PID7) & +Mask::PIDR_PID7);
3042 }
3043
3053 static inline constexpr uint32 PIDR_PID8(uint32 value) {
3054 return ((value << +Shift::PIDR_PID8) & +Mask::PIDR_PID8);
3055 }
3056
3066 static inline constexpr uint32 PIDR_PID9(uint32 value) {
3067 return ((value << +Shift::PIDR_PID9) & +Mask::PIDR_PID9);
3068 }
3069
3079 static inline constexpr uint32 PIDR_PID10(uint32 value) {
3080 return ((value << +Shift::PIDR_PID10) & +Mask::PIDR_PID10);
3081 }
3082
3092 static inline constexpr uint32 PIDR_PID11(uint32 value) {
3093 return ((value << +Shift::PIDR_PID11) & +Mask::PIDR_PID11);
3094 }
3095
3105 static inline constexpr uint32 PIDR_PID12(uint32 value) {
3106 return ((value << +Shift::PIDR_PID12) & +Mask::PIDR_PID12);
3107 }
3108
3118 static inline constexpr uint32 PIDR_PID13(uint32 value) {
3119 return ((value << +Shift::PIDR_PID13) & +Mask::PIDR_PID13);
3120 }
3121
3131 static inline constexpr uint32 PIDR_PID14(uint32 value) {
3132 return ((value << +Shift::PIDR_PID14) & +Mask::PIDR_PID14);
3133 }
3134
3144 static inline constexpr uint32 PIDR_PID15(uint32 value) {
3145 return ((value << +Shift::PIDR_PID15) & +Mask::PIDR_PID15);
3146 }
3147
3157 static inline constexpr uint32 PIDR_PID16(uint32 value) {
3158 return ((value << +Shift::PIDR_PID16) & +Mask::PIDR_PID16);
3159 }
3160
3170 static inline constexpr uint32 PIDR_PID17(uint32 value) {
3171 return ((value << +Shift::PIDR_PID17) & +Mask::PIDR_PID17);
3172 }
3173
3183 static inline constexpr uint32 PIDR_PID18(uint32 value) {
3184 return ((value << +Shift::PIDR_PID18) & +Mask::PIDR_PID18);
3185 }
3186
3196 static inline constexpr uint32 PIDR_PID19(uint32 value) {
3197 return ((value << +Shift::PIDR_PID19) & +Mask::PIDR_PID19);
3198 }
3199
3209 static inline constexpr uint32 PIDR_PID20(uint32 value) {
3210 return ((value << +Shift::PIDR_PID20) & +Mask::PIDR_PID20);
3211 }
3212
3222 static inline constexpr uint32 PIDR_PID21(uint32 value) {
3223 return ((value << +Shift::PIDR_PID21) & +Mask::PIDR_PID21);
3224 }
3225
3235 static inline constexpr uint32 PIDR_PID22(uint32 value) {
3236 return ((value << +Shift::PIDR_PID22) & +Mask::PIDR_PID22);
3237 }
3238
3248 static inline constexpr uint32 PIDR_PID23(uint32 value) {
3249 return ((value << +Shift::PIDR_PID23) & +Mask::PIDR_PID23);
3250 }
3251
3261 static inline constexpr uint32 PIDR_PID24(uint32 value) {
3262 return ((value << +Shift::PIDR_PID24) & +Mask::PIDR_PID24);
3263 }
3264
3274 static inline constexpr uint32 PIDR_PID25(uint32 value) {
3275 return ((value << +Shift::PIDR_PID25) & +Mask::PIDR_PID25);
3276 }
3277
3287 static inline constexpr uint32 PIDR_PID26(uint32 value) {
3288 return ((value << +Shift::PIDR_PID26) & +Mask::PIDR_PID26);
3289 }
3290
3300 static inline constexpr uint32 PIDR_PID27(uint32 value) {
3301 return ((value << +Shift::PIDR_PID27) & +Mask::PIDR_PID27);
3302 }
3303
3313 static inline constexpr uint32 PIDR_PID28(uint32 value) {
3314 return ((value << +Shift::PIDR_PID28) & +Mask::PIDR_PID28);
3315 }
3316
3326 static inline constexpr uint32 PIDR_PID29(uint32 value) {
3327 return ((value << +Shift::PIDR_PID29) & +Mask::PIDR_PID29);
3328 }
3329
3339 static inline constexpr uint32 PIDR_PID30(uint32 value) {
3340 return ((value << +Shift::PIDR_PID30) & +Mask::PIDR_PID30);
3341 }
3342
3352 static inline constexpr uint32 PIDR_PID31(uint32 value) {
3353 return ((value << +Shift::PIDR_PID31) & +Mask::PIDR_PID31);
3354 }
3355
3365 static inline constexpr uint8 PDR_PD(uint8 value) {
3366 return static_cast<uint8>((value << static_cast<uint8>(+Shift::PDR_PD)) &
3367 static_cast<uint8>(+Mask::PDR_PD));
3368 }
3369
3411 static inline constexpr uint32 ICR_IRQC(uint32 value) {
3412 return ((value << +Shift::ICR_IRQC) & +Mask::ICR_IRQC);
3413 }
3414
3428 static inline constexpr uint32 ICR_ISF(uint32 value) {
3429 return ((value << +Shift::ICR_ISF) & +Mask::ICR_ISF);
3430 }
3431
3441 static inline constexpr uint32 GICLR_GIWE0(uint32 value) {
3442 return ((value << +Shift::GICLR_GIWE0) & +Mask::GICLR_GIWE0);
3443 }
3444
3454 static inline constexpr uint32 GICLR_GIWE1(uint32 value) {
3455 return ((value << +Shift::GICLR_GIWE1) & +Mask::GICLR_GIWE1);
3456 }
3457
3467 static inline constexpr uint32 GICLR_GIWE2(uint32 value) {
3468 return ((value << +Shift::GICLR_GIWE2) & +Mask::GICLR_GIWE2);
3469 }
3470
3480 static inline constexpr uint32 GICLR_GIWE3(uint32 value) {
3481 return ((value << +Shift::GICLR_GIWE3) & +Mask::GICLR_GIWE3);
3482 }
3483
3493 static inline constexpr uint32 GICLR_GIWE4(uint32 value) {
3494 return ((value << +Shift::GICLR_GIWE4) & +Mask::GICLR_GIWE4);
3495 }
3496
3506 static inline constexpr uint32 GICLR_GIWE5(uint32 value) {
3507 return ((value << +Shift::GICLR_GIWE5) & +Mask::GICLR_GIWE5);
3508 }
3509
3519 static inline constexpr uint32 GICLR_GIWE6(uint32 value) {
3520 return ((value << +Shift::GICLR_GIWE6) & +Mask::GICLR_GIWE6);
3521 }
3522
3532 static inline constexpr uint32 GICLR_GIWE7(uint32 value) {
3533 return ((value << +Shift::GICLR_GIWE7) & +Mask::GICLR_GIWE7);
3534 }
3535
3545 static inline constexpr uint32 GICLR_GIWE8(uint32 value) {
3546 return ((value << +Shift::GICLR_GIWE8) & +Mask::GICLR_GIWE8);
3547 }
3548
3558 static inline constexpr uint32 GICLR_GIWE9(uint32 value) {
3559 return ((value << +Shift::GICLR_GIWE9) & +Mask::GICLR_GIWE9);
3560 }
3561
3571 static inline constexpr uint32 GICLR_GIWE10(uint32 value) {
3572 return ((value << +Shift::GICLR_GIWE10) & +Mask::GICLR_GIWE10);
3573 }
3574
3584 static inline constexpr uint32 GICLR_GIWE11(uint32 value) {
3585 return ((value << +Shift::GICLR_GIWE11) & +Mask::GICLR_GIWE11);
3586 }
3587
3597 static inline constexpr uint32 GICLR_GIWE12(uint32 value) {
3598 return ((value << +Shift::GICLR_GIWE12) & +Mask::GICLR_GIWE12);
3599 }
3600
3610 static inline constexpr uint32 GICLR_GIWE13(uint32 value) {
3611 return ((value << +Shift::GICLR_GIWE13) & +Mask::GICLR_GIWE13);
3612 }
3613
3623 static inline constexpr uint32 GICLR_GIWE14(uint32 value) {
3624 return ((value << +Shift::GICLR_GIWE14) & +Mask::GICLR_GIWE14);
3625 }
3626
3636 static inline constexpr uint32 GICLR_GIWE15(uint32 value) {
3637 return ((value << +Shift::GICLR_GIWE15) & +Mask::GICLR_GIWE15);
3638 }
3639
3645 static inline constexpr uint32 GICLR_GIWD(uint32 value) {
3646 return ((value << +Shift::GICLR_GIWD) & +Mask::GICLR_GIWD);
3647 }
3648
3658 static inline constexpr uint32 GICHR_GIWE16(uint32 value) {
3659 return ((value << +Shift::GICHR_GIWE16) & +Mask::GICHR_GIWE16);
3660 }
3661
3671 static inline constexpr uint32 GICHR_GIWE17(uint32 value) {
3672 return ((value << +Shift::GICHR_GIWE17) & +Mask::GICHR_GIWE17);
3673 }
3674
3684 static inline constexpr uint32 GICHR_GIWE18(uint32 value) {
3685 return ((value << +Shift::GICHR_GIWE18) & +Mask::GICHR_GIWE18);
3686 }
3687
3697 static inline constexpr uint32 GICHR_GIWE19(uint32 value) {
3698 return ((value << +Shift::GICHR_GIWE19) & +Mask::GICHR_GIWE19);
3699 }
3700
3710 static inline constexpr uint32 GICHR_GIWE20(uint32 value) {
3711 return ((value << +Shift::GICHR_GIWE20) & +Mask::GICHR_GIWE20);
3712 }
3713
3723 static inline constexpr uint32 GICHR_GIWE21(uint32 value) {
3724 return ((value << +Shift::GICHR_GIWE21) & +Mask::GICHR_GIWE21);
3725 }
3726
3736 static inline constexpr uint32 GICHR_GIWE22(uint32 value) {
3737 return ((value << +Shift::GICHR_GIWE22) & +Mask::GICHR_GIWE22);
3738 }
3739
3749 static inline constexpr uint32 GICHR_GIWE23(uint32 value) {
3750 return ((value << +Shift::GICHR_GIWE23) & +Mask::GICHR_GIWE23);
3751 }
3752
3762 static inline constexpr uint32 GICHR_GIWE24(uint32 value) {
3763 return ((value << +Shift::GICHR_GIWE24) & +Mask::GICHR_GIWE24);
3764 }
3765
3775 static inline constexpr uint32 GICHR_GIWE25(uint32 value) {
3776 return ((value << +Shift::GICHR_GIWE25) & +Mask::GICHR_GIWE25);
3777 }
3778
3788 static inline constexpr uint32 GICHR_GIWE26(uint32 value) {
3789 return ((value << +Shift::GICHR_GIWE26) & +Mask::GICHR_GIWE26);
3790 }
3791
3801 static inline constexpr uint32 GICHR_GIWE27(uint32 value) {
3802 return ((value << +Shift::GICHR_GIWE27) & +Mask::GICHR_GIWE27);
3803 }
3804
3814 static inline constexpr uint32 GICHR_GIWE28(uint32 value) {
3815 return ((value << +Shift::GICHR_GIWE28) & +Mask::GICHR_GIWE28);
3816 }
3817
3827 static inline constexpr uint32 GICHR_GIWE29(uint32 value) {
3828 return ((value << +Shift::GICHR_GIWE29) & +Mask::GICHR_GIWE29);
3829 }
3830
3840 static inline constexpr uint32 GICHR_GIWE30(uint32 value) {
3841 return ((value << +Shift::GICHR_GIWE30) & +Mask::GICHR_GIWE30);
3842 }
3843
3853 static inline constexpr uint32 GICHR_GIWE31(uint32 value) {
3854 return ((value << +Shift::GICHR_GIWE31) & +Mask::GICHR_GIWE31);
3855 }
3856
3862 static inline constexpr uint32 GICHR_GIWD(uint32 value) {
3863 return ((value << +Shift::GICHR_GIWD) & +Mask::GICHR_GIWD);
3864 }
3865
3879 static inline constexpr uint32 ISFR_ISF0(uint32 value) {
3880 return ((value << +Shift::ISFR_ISF0) & +Mask::ISFR_ISF0);
3881 }
3882
3896 static inline constexpr uint32 ISFR_ISF1(uint32 value) {
3897 return ((value << +Shift::ISFR_ISF1) & +Mask::ISFR_ISF1);
3898 }
3899
3913 static inline constexpr uint32 ISFR_ISF2(uint32 value) {
3914 return ((value << +Shift::ISFR_ISF2) & +Mask::ISFR_ISF2);
3915 }
3916
3930 static inline constexpr uint32 ISFR_ISF3(uint32 value) {
3931 return ((value << +Shift::ISFR_ISF3) & +Mask::ISFR_ISF3);
3932 }
3933
3947 static inline constexpr uint32 ISFR_ISF4(uint32 value) {
3948 return ((value << +Shift::ISFR_ISF4) & +Mask::ISFR_ISF4);
3949 }
3950
3964 static inline constexpr uint32 ISFR_ISF5(uint32 value) {
3965 return ((value << +Shift::ISFR_ISF5) & +Mask::ISFR_ISF5);
3966 }
3967
3981 static inline constexpr uint32 ISFR_ISF6(uint32 value) {
3982 return ((value << +Shift::ISFR_ISF6) & +Mask::ISFR_ISF6);
3983 }
3984
3998 static inline constexpr uint32 ISFR_ISF7(uint32 value) {
3999 return ((value << +Shift::ISFR_ISF7) & +Mask::ISFR_ISF7);
4000 }
4001
4015 static inline constexpr uint32 ISFR_ISF8(uint32 value) {
4016 return ((value << +Shift::ISFR_ISF8) & +Mask::ISFR_ISF8);
4017 }
4018
4032 static inline constexpr uint32 ISFR_ISF9(uint32 value) {
4033 return ((value << +Shift::ISFR_ISF9) & +Mask::ISFR_ISF9);
4034 }
4035
4049 static inline constexpr uint32 ISFR_ISF10(uint32 value) {
4050 return ((value << +Shift::ISFR_ISF10) & +Mask::ISFR_ISF10);
4051 }
4052
4066 static inline constexpr uint32 ISFR_ISF11(uint32 value) {
4067 return ((value << +Shift::ISFR_ISF11) & +Mask::ISFR_ISF11);
4068 }
4069
4083 static inline constexpr uint32 ISFR_ISF12(uint32 value) {
4084 return ((value << +Shift::ISFR_ISF12) & +Mask::ISFR_ISF12);
4085 }
4086
4100 static inline constexpr uint32 ISFR_ISF13(uint32 value) {
4101 return ((value << +Shift::ISFR_ISF13) & +Mask::ISFR_ISF13);
4102 }
4103
4117 static inline constexpr uint32 ISFR_ISF14(uint32 value) {
4118 return ((value << +Shift::ISFR_ISF14) & +Mask::ISFR_ISF14);
4119 }
4120
4134 static inline constexpr uint32 ISFR_ISF15(uint32 value) {
4135 return ((value << +Shift::ISFR_ISF15) & +Mask::ISFR_ISF15);
4136 }
4137
4151 static inline constexpr uint32 ISFR_ISF16(uint32 value) {
4152 return ((value << +Shift::ISFR_ISF16) & +Mask::ISFR_ISF16);
4153 }
4154
4168 static inline constexpr uint32 ISFR_ISF17(uint32 value) {
4169 return ((value << +Shift::ISFR_ISF17) & +Mask::ISFR_ISF17);
4170 }
4171
4185 static inline constexpr uint32 ISFR_ISF18(uint32 value) {
4186 return ((value << +Shift::ISFR_ISF18) & +Mask::ISFR_ISF18);
4187 }
4188
4202 static inline constexpr uint32 ISFR_ISF19(uint32 value) {
4203 return ((value << +Shift::ISFR_ISF19) & +Mask::ISFR_ISF19);
4204 }
4205
4219 static inline constexpr uint32 ISFR_ISF20(uint32 value) {
4220 return ((value << +Shift::ISFR_ISF20) & +Mask::ISFR_ISF20);
4221 }
4222
4236 static inline constexpr uint32 ISFR_ISF21(uint32 value) {
4237 return ((value << +Shift::ISFR_ISF21) & +Mask::ISFR_ISF21);
4238 }
4239
4253 static inline constexpr uint32 ISFR_ISF22(uint32 value) {
4254 return ((value << +Shift::ISFR_ISF22) & +Mask::ISFR_ISF22);
4255 }
4256
4270 static inline constexpr uint32 ISFR_ISF23(uint32 value) {
4271 return ((value << +Shift::ISFR_ISF23) & +Mask::ISFR_ISF23);
4272 }
4273
4287 static inline constexpr uint32 ISFR_ISF24(uint32 value) {
4288 return ((value << +Shift::ISFR_ISF24) & +Mask::ISFR_ISF24);
4289 }
4290
4304 static inline constexpr uint32 ISFR_ISF25(uint32 value) {
4305 return ((value << +Shift::ISFR_ISF25) & +Mask::ISFR_ISF25);
4306 }
4307
4321 static inline constexpr uint32 ISFR_ISF26(uint32 value) {
4322 return ((value << +Shift::ISFR_ISF26) & +Mask::ISFR_ISF26);
4323 }
4324
4338 static inline constexpr uint32 ISFR_ISF27(uint32 value) {
4339 return ((value << +Shift::ISFR_ISF27) & +Mask::ISFR_ISF27);
4340 }
4341
4355 static inline constexpr uint32 ISFR_ISF28(uint32 value) {
4356 return ((value << +Shift::ISFR_ISF28) & +Mask::ISFR_ISF28);
4357 }
4358
4372 static inline constexpr uint32 ISFR_ISF29(uint32 value) {
4373 return ((value << +Shift::ISFR_ISF29) & +Mask::ISFR_ISF29);
4374 }
4375
4389 static inline constexpr uint32 ISFR_ISF30(uint32 value) {
4390 return ((value << +Shift::ISFR_ISF30) & +Mask::ISFR_ISF30);
4391 }
4392
4406 static inline constexpr uint32 ISFR_ISF31(uint32 value) {
4407 return ((value << +Shift::ISFR_ISF31) & +Mask::ISFR_ISF31);
4408 }
4409};
4410
4411/* ***************************************************************************************
4412 * End of file
4413 */
4414
4415#endif /* MCXA153_A3754241_08E1_4F86_B049_0FACC9D70DF5 */
MCXA153 通用輸入/輸出 (General Purpose Input/Output) 控制器靜態工具類別
Definition chip/gpio/GPIO.h:129
static constexpr uint32 PDDR_PDD12(uint32 value)
PDDR - PDD12.
Definition chip/gpio/GPIO.h:2689
static constexpr uint32 PDDR_PDD3(uint32 value)
PDDR - PDD3.
Definition chip/gpio/GPIO.h:2572
static constexpr uint32 PDIR_PDI2(uint32 value)
PDIR - PDI2.
Definition chip/gpio/GPIO.h:2143
static constexpr uint32 ISFR_ISF23(uint32 value)
ISFR - ISF23.
Definition chip/gpio/GPIO.h:4270
static constexpr uint32 PDOR_PDO8(uint32 value)
PDOR - PDO8.
Definition chip/gpio/GPIO.h:557
static constexpr uint32 GICLR_GIWE10(uint32 value)
GICLR - GIWE10.
Definition chip/gpio/GPIO.h:3571
static constexpr uint32 PDDR_PDD31(uint32 value)
PDDR - PDD31.
Definition chip/gpio/GPIO.h:2936
static constexpr uint32 PDIR_PDI17(uint32 value)
PDIR - PDI17.
Definition chip/gpio/GPIO.h:2338
static constexpr uint32 PDOR_PDO27(uint32 value)
PDOR - PDO27.
Definition chip/gpio/GPIO.h:804
static constexpr uint32 GICHR_GIWE18(uint32 value)
GICHR - GIWE18.
Definition chip/gpio/GPIO.h:3684
static void setMultipleInterruptPinsConfig(Register &base, uint32 mask, InterruptConfig config)
Sets the GPIO interrupt configuration in PCR register for multiple pins.
Definition chip/gpio/GPIO.h:392
static constexpr uint32 PSOR_PTSO21(uint32 value)
PSOR - PTSO21.
Definition chip/gpio/GPIO.h:1142
static constexpr uint32 GICHR_GIWE31(uint32 value)
GICHR - GIWE31.
Definition chip/gpio/GPIO.h:3853
static constexpr uint32 VERID_MAJOR(uint32 value)
VERID - MAJOR.
Definition chip/gpio/GPIO.h:431
static constexpr uint32 PDIR_PDI3(uint32 value)
PDIR - PDI3.
Definition chip/gpio/GPIO.h:2156
static constexpr uint32 PDDR_PDD28(uint32 value)
PDDR - PDD28.
Definition chip/gpio/GPIO.h:2897
static constexpr uint32 PIDR_PID11(uint32 value)
PIDR - PID11.
Definition chip/gpio/GPIO.h:3092
static constexpr uint32 ISFR_ISF4(uint32 value)
ISFR - ISF4.
Definition chip/gpio/GPIO.h:3947
static constexpr uint32 PDDR_PDD30(uint32 value)
PDDR - PDD30.
Definition chip/gpio/GPIO.h:2923
static constexpr uint32 PDDR_PDD7(uint32 value)
PDDR - PDD7.
Definition chip/gpio/GPIO.h:2624
static void portInputEnable(Register &base, uint32 mask)
Enable port input.
Definition chip/gpio/GPIO.h:218
static uint32 getPinsDMARequestFlags(Register &base)
Reads the GPIO DMA request flags. The corresponding flag will be cleared automatically at the complet...
Definition chip/gpio/GPIO.h:364
static constexpr uint32 PDOR_PDO21(uint32 value)
PDOR - PDO21.
Definition chip/gpio/GPIO.h:726
static void portSet(Register &base, uint32 mask)
Sets the output level of the multiple GPIO pins to the logic 1.
Definition chip/gpio/GPIO.h:255
static constexpr uint32 PDIR_PDI8(uint32 value)
PDIR - PDI8.
Definition chip/gpio/GPIO.h:2221
static constexpr uint32 GICHR_GIWE29(uint32 value)
GICHR - GIWE29.
Definition chip/gpio/GPIO.h:3827
static constexpr uint32 PDDR_PDD17(uint32 value)
PDDR - PDD17.
Definition chip/gpio/GPIO.h:2754
static constexpr uint32 GICLR_GIWD(uint32 value)
GICLR - GIWD.
Definition chip/gpio/GPIO.h:3645
static constexpr uint32 PSOR_PTSO6(uint32 value)
PSOR - PTSO6.
Definition chip/gpio/GPIO.h:947
static constexpr uint32 PCOR_PTCO15(uint32 value)
PCOR - PTCO15.
Definition chip/gpio/GPIO.h:1480
static constexpr uint32 ISFR_ISF11(uint32 value)
ISFR - ISF11.
Definition chip/gpio/GPIO.h:4066
static constexpr uint32 PSOR_PTSO7(uint32 value)
PSOR - PTSO7.
Definition chip/gpio/GPIO.h:960
static constexpr uint32 PDIR_PDI20(uint32 value)
PDIR - PDI20.
Definition chip/gpio/GPIO.h:2377
static constexpr uint32 PTOR_PTTO1(uint32 value)
PORT - PTTO1.
Definition chip/gpio/GPIO.h:1714
static constexpr uint32 PIDR_PID29(uint32 value)
PIDR - PID29.
Definition chip/gpio/GPIO.h:3326
static constexpr uint32 PDDR_PDD4(uint32 value)
PDDR - PDD4.
Definition chip/gpio/GPIO.h:2585
static constexpr uint32 PDIR_PDI15(uint32 value)
PDIR - PDI15.
Definition chip/gpio/GPIO.h:2312
static constexpr uint32 PCOR_PTCO1(uint32 value)
PCOR - PTCO1.
Definition chip/gpio/GPIO.h:1298
static constexpr uint32 ISFR_ISF15(uint32 value)
ISFR - ISF15.
Definition chip/gpio/GPIO.h:4134
static constexpr uint32 GICLR_GIWE7(uint32 value)
GICLR - GIWE7.
Definition chip/gpio/GPIO.h:3532
static constexpr uint32 PIDR_PID10(uint32 value)
PIDR - PID10.
Definition chip/gpio/GPIO.h:3079
static constexpr uint32 PDDR_PDD16(uint32 value)
PDDR - PDD16.
Definition chip/gpio/GPIO.h:2741
static constexpr uint32 PIDR_PID20(uint32 value)
PIDR - PID20.
Definition chip/gpio/GPIO.h:3209
static constexpr uint32 ISFR_ISF17(uint32 value)
ISFR - ISF17.
Definition chip/gpio/GPIO.h:4168
static constexpr uint32 PSOR_PTSO30(uint32 value)
PSOR - PTSO30.
Definition chip/gpio/GPIO.h:1259
static constexpr uint32 ISFR_ISF19(uint32 value)
ISFR - ISF19.
Definition chip/gpio/GPIO.h:4202
static constexpr uint32 PTOR_PTTO16(uint32 value)
PORT - PTTO16.
Definition chip/gpio/GPIO.h:1909
static constexpr uint32 PSOR_PTSO12(uint32 value)
PSOR - PTSO12.
Definition chip/gpio/GPIO.h:1025
static constexpr uint32 PDDR_PDD22(uint32 value)
PDDR - PDD22.
Definition chip/gpio/GPIO.h:2819
static constexpr uint32 PCOR_PTCO7(uint32 value)
PCOR - PTCO7.
Definition chip/gpio/GPIO.h:1376
static constexpr uint32 PDIR_PDI26(uint32 value)
PDIR - PDI26.
Definition chip/gpio/GPIO.h:2455
static constexpr uint32 GICHR_GIWE19(uint32 value)
GICHR - GIWE19.
Definition chip/gpio/GPIO.h:3697
static constexpr uint32 PCOR_PTCO17(uint32 value)
PCOR - PTCO17.
Definition chip/gpio/GPIO.h:1506
static constexpr uint32 PIDR_PID27(uint32 value)
PIDR - PID27.
Definition chip/gpio/GPIO.h:3300
static constexpr uint32 GICHR_GIWE20(uint32 value)
GICHR - GIWE20.
Definition chip/gpio/GPIO.h:3710
static constexpr uint32 PIDR_PID17(uint32 value)
PIDR - PID17.
Definition chip/gpio/GPIO.h:3170
static constexpr uint32 ISFR_ISF6(uint32 value)
ISFR - ISF6.
Definition chip/gpio/GPIO.h:3981
static constexpr uint32 PDOR_PDO25(uint32 value)
PDOR - PDO25.
Definition chip/gpio/GPIO.h:778
static uint8 pinGetInterruptFlag(Register &base, uint32 pin)
Read individual pin's interrupt status flag.
static constexpr uint32 PCOR_PTCO13(uint32 value)
PCOR - PTCO13.
Definition chip/gpio/GPIO.h:1454
static constexpr uint32 PDDR_PDD20(uint32 value)
PDDR - PDD20.
Definition chip/gpio/GPIO.h:2793
static constexpr uint32 PCOR_PTCO2(uint32 value)
PCOR - PTCO2.
Definition chip/gpio/GPIO.h:1311
static constexpr uint32 ISFR_ISF18(uint32 value)
ISFR - ISF18.
Definition chip/gpio/GPIO.h:4185
static constexpr uint32 PIDR_PID24(uint32 value)
PIDR - PID24.
Definition chip/gpio/GPIO.h:3261
static constexpr uint32 PTOR_PTTO14(uint32 value)
PORT - PTTO14.
Definition chip/gpio/GPIO.h:1883
static constexpr uint32 PDOR_PDO14(uint32 value)
PDOR - PDO14.
Definition chip/gpio/GPIO.h:635
static constexpr uint32 PDDR_PDD5(uint32 value)
PDDR - PDD5.
Definition chip/gpio/GPIO.h:2598
static constexpr uint32 PDDR_PDD13(uint32 value)
PDDR - PDD13.
Definition chip/gpio/GPIO.h:2702
static constexpr uint32 PTOR_PTTO5(uint32 value)
PORT - PTTO5.
Definition chip/gpio/GPIO.h:1766
static constexpr uint32 PSOR_PTSO1(uint32 value)
PSOR - PTSO1.
Definition chip/gpio/GPIO.h:882
static constexpr uint32 PDIR_PDI14(uint32 value)
PDIR - PDI14.
Definition chip/gpio/GPIO.h:2299
static constexpr uint32 PTOR_PTTO3(uint32 value)
PORT - PTTO3.
Definition chip/gpio/GPIO.h:1740
static constexpr uint32 ICR_ISF(uint32 value)
ICR - ISF.
Definition chip/gpio/GPIO.h:3428
virtual ~GPIO(void) override=default
Destroy the object.
static constexpr uint32 ISFR_ISF27(uint32 value)
ISFR - ISF27.
Definition chip/gpio/GPIO.h:4338
static constexpr uint32 PTOR_PTTO11(uint32 value)
PORT - PTTO11.
Definition chip/gpio/GPIO.h:1844
static constexpr uint32 PSOR_PTSO5(uint32 value)
PSOR - PTSO5.
Definition chip/gpio/GPIO.h:934
static constexpr uint32 PIDR_PID5(uint32 value)
PIDR - PID5.
Definition chip/gpio/GPIO.h:3014
static void pinClearInterruptFlag(Register &base, uint32 pin)
Clear GPIO individual pin's interrupt status flag.
static constexpr uint32 PTOR_PTTO23(uint32 value)
PORT - PTTO23.
Definition chip/gpio/GPIO.h:2000
static constexpr uint32 PTOR_PTTO15(uint32 value)
PORT - PTTO15.
Definition chip/gpio/GPIO.h:1896
static void setPinInterruptConfig(Register &base, uint32 pin, InterruptConfig config)
Configures the gpio pin interrupt/DMA request.
Definition chip/gpio/GPIO.h:316
static constexpr uint32 PSOR_PTSO15(uint32 value)
PSOR - PTSO15.
Definition chip/gpio/GPIO.h:1064
static constexpr uint32 PDDR_PDD9(uint32 value)
PDDR - PDD9.
Definition chip/gpio/GPIO.h:2650
static constexpr uint32 PDDR_PDD0(uint32 value)
PDDR - PDD0.
Definition chip/gpio/GPIO.h:2533
static constexpr uint32 PDOR_PDO20(uint32 value)
PDOR - PDO20.
Definition chip/gpio/GPIO.h:713
static constexpr uint32 PTOR_PTTO7(uint32 value)
PORT - PTTO7.
Definition chip/gpio/GPIO.h:1792
static constexpr uint32 PDOR_PDO15(uint32 value)
PDOR - PDO15.
Definition chip/gpio/GPIO.h:648
static constexpr uint32 PDOR_PDO18(uint32 value)
PDOR - PDO18.
Definition chip/gpio/GPIO.h:687
static constexpr uint32 PTOR_PTTO19(uint32 value)
PORT - PTTO19.
Definition chip/gpio/GPIO.h:1948
static constexpr uint32 PSOR_PTSO27(uint32 value)
PSOR - PTSO27.
Definition chip/gpio/GPIO.h:1220
static constexpr uint32 GICLR_GIWE12(uint32 value)
GICLR - GIWE12.
Definition chip/gpio/GPIO.h:3597
static constexpr uint32 PTOR_PTTO30(uint32 value)
PORT - PTTO30.
Definition chip/gpio/GPIO.h:2091
static constexpr uint32 PDDR_PDD11(uint32 value)
PDDR - PDD11.
Definition chip/gpio/GPIO.h:2676
static constexpr uint32 PDOR_PDO28(uint32 value)
PDOR - PDO28.
Definition chip/gpio/GPIO.h:817
static constexpr uint32 PIDR_PID21(uint32 value)
PIDR - PID21.
Definition chip/gpio/GPIO.h:3222
static constexpr uint32 PIDR_PID8(uint32 value)
PIDR - PID8.
Definition chip/gpio/GPIO.h:3053
static constexpr uint32 PTOR_PTTO21(uint32 value)
PORT - PTTO21.
Definition chip/gpio/GPIO.h:1974
static constexpr uint32 PDIR_PDI0(uint32 value)
PDIR - PDI0.
Definition chip/gpio/GPIO.h:2117
static constexpr uint32 PSOR_PTSO13(uint32 value)
PSOR - PTSO13.
Definition chip/gpio/GPIO.h:1038
static constexpr uint32 PDIR_PDI31(uint32 value)
PDIR - PDI31.
Definition chip/gpio/GPIO.h:2520
static constexpr uint32 PIDR_PID19(uint32 value)
PIDR - PID19.
Definition chip/gpio/GPIO.h:3196
static constexpr uint32 PDDR_PDD23(uint32 value)
PDDR - PDD23.
Definition chip/gpio/GPIO.h:2832
static constexpr uint32 PDOR_PDO9(uint32 value)
PDOR - PDO9.
Definition chip/gpio/GPIO.h:570
static constexpr uint32 GICLR_GIWE11(uint32 value)
GICLR - GIWE11.
Definition chip/gpio/GPIO.h:3584
static constexpr uint32 PDOR_PDO22(uint32 value)
PDOR - PDO22.
Definition chip/gpio/GPIO.h:739
static constexpr uint32 PDIR_PDI30(uint32 value)
PDIR - PDI30.
Definition chip/gpio/GPIO.h:2507
static void portClear(Register &base, uint32 mask)
Sets the output level of the multiple GPIO pins to the logic 0.
Definition chip/gpio/GPIO.h:265
static constexpr uint32 PDIR_PDI22(uint32 value)
PDIR - PDI22.
Definition chip/gpio/GPIO.h:2403
static constexpr uint32 PDDR_PDD6(uint32 value)
PDDR - PDD6.
Definition chip/gpio/GPIO.h:2611
static constexpr uint32 GICHR_GIWE22(uint32 value)
GICHR - GIWE22.
Definition chip/gpio/GPIO.h:3736
static constexpr uint32 ICR_IRQC(uint32 value)
ICR - IRQC.
Definition chip/gpio/GPIO.h:3411
static constexpr uint32 PIDR_PID13(uint32 value)
PIDR - PID13.
Definition chip/gpio/GPIO.h:3118
static constexpr uint32 ISFR_ISF31(uint32 value)
ISFR - ISF31.
Definition chip/gpio/GPIO.h:4406
static constexpr uint32 GICLR_GIWE5(uint32 value)
GICLR - GIWE5.
Definition chip/gpio/GPIO.h:3506
static constexpr uint32 PSOR_PTSO14(uint32 value)
PSOR - PTSO14.
Definition chip/gpio/GPIO.h:1051
static constexpr uint32 PCOR_PTCO5(uint32 value)
PCOR - PTCO5.
Definition chip/gpio/GPIO.h:1350
static constexpr uint32 PDIR_PDI25(uint32 value)
PDIR - PDI25.
Definition chip/gpio/GPIO.h:2442
static constexpr uint32 GICLR_GIWE1(uint32 value)
GICLR - GIWE1.
Definition chip/gpio/GPIO.h:3454
static constexpr uint32 PIDR_PID31(uint32 value)
PIDR - PID31.
Definition chip/gpio/GPIO.h:3352
static constexpr uint32 PCOR_PTCO18(uint32 value)
PCOR - PTCO18.
Definition chip/gpio/GPIO.h:1519
static constexpr uint8 PDR_PD(uint8 value)
PDR - PD.
Definition chip/gpio/GPIO.h:3365
static constexpr uint32 GICHR_GIWE27(uint32 value)
GICHR - GIWE27.
Definition chip/gpio/GPIO.h:3801
static constexpr uint32 PDIR_PDI4(uint32 value)
PDIR - PDI4.
Definition chip/gpio/GPIO.h:2169
static constexpr uint32 PCOR_PTCO16(uint32 value)
PCOR - PTCO16.
Definition chip/gpio/GPIO.h:1493
static void pinWrite(Register &base, uint32 pin, uint8 output)
Sets the output level of the multiple GPIO pins to the logic 1 or 0.
Definition chip/gpio/GPIO.h:241
static constexpr uint32 PDOR_PDO30(uint32 value)
PDOR - PDO30.
Definition chip/gpio/GPIO.h:843
static constexpr uint32 PIDR_PID12(uint32 value)
PIDR - PID12.
Definition chip/gpio/GPIO.h:3105
static constexpr uint32 GICLR_GIWE9(uint32 value)
GICLR - GIWE9.
Definition chip/gpio/GPIO.h:3558
static constexpr uint32 PDOR_PDO11(uint32 value)
PDOR - PDO11.
Definition chip/gpio/GPIO.h:596
static constexpr uint32 PCOR_PTCO14(uint32 value)
PCOR - PTCO14.
Definition chip/gpio/GPIO.h:1467
static constexpr uint32 PIDR_PID3(uint32 value)
PIDR - PID3.
Definition chip/gpio/GPIO.h:2988
static constexpr uint32 PIDR_PID22(uint32 value)
PIDR - PID22.
Definition chip/gpio/GPIO.h:3235
static uint32 gpioGetInterruptFlags(Register &base)
Read the GPIO interrupt status flags.
static constexpr uint32 GICLR_GIWE4(uint32 value)
GICLR - GIWE4.
Definition chip/gpio/GPIO.h:3493
static constexpr uint32 PTOR_PTTO29(uint32 value)
PORT - PTTO29.
Definition chip/gpio/GPIO.h:2078
static constexpr uint32 PDDR_PDD29(uint32 value)
PDDR - PDD29.
Definition chip/gpio/GPIO.h:2910
static constexpr uint32 GICHR_GIWD(uint32 value)
GICHR - GIWD.
Definition chip/gpio/GPIO.h:3862
static constexpr uint32 PDOR_PDO1(uint32 value)
PDOR - PDO1.
Definition chip/gpio/GPIO.h:466
static constexpr uint32 ISFR_ISF8(uint32 value)
ISFR - ISF8.
Definition chip/gpio/GPIO.h:4015
static constexpr uint32 PIDR_PID25(uint32 value)
PIDR - PID25.
Definition chip/gpio/GPIO.h:3274
static constexpr uint32 PDOR_PDO5(uint32 value)
PDOR - PDO5.
Definition chip/gpio/GPIO.h:518
static constexpr uint32 PDDR_PDD14(uint32 value)
PDDR - PDD14.
Definition chip/gpio/GPIO.h:2715
static constexpr uint32 PSOR_PTSO31(uint32 value)
PSOR - PTSO31.
Definition chip/gpio/GPIO.h:1272
static constexpr uint32 PDDR_PDD21(uint32 value)
PDDR - PDD21.
Definition chip/gpio/GPIO.h:2806
static constexpr uint32 PSOR_PTSO0(uint32 value)
PSOR - PTSO0.
Definition chip/gpio/GPIO.h:869
static constexpr uint32 PCOR_PTCO12(uint32 value)
PCOR - PTCO12.
Definition chip/gpio/GPIO.h:1441
static constexpr uint32 PDOR_PDO19(uint32 value)
PDOR - PDO19.
Definition chip/gpio/GPIO.h:700
static constexpr uint32 PDOR_PDO6(uint32 value)
PDOR - PDO6.
Definition chip/gpio/GPIO.h:531
static constexpr uint32 PCOR_PTCO21(uint32 value)
PCOR - PTCO21.
Definition chip/gpio/GPIO.h:1558
static constexpr uint32 GICHR_GIWE21(uint32 value)
GICHR - GIWE21.
Definition chip/gpio/GPIO.h:3723
static constexpr uint32 PDOR_PDO2(uint32 value)
PDOR - PDO2.
Definition chip/gpio/GPIO.h:479
static constexpr uint32 GICHR_GIWE16(uint32 value)
GICHR - GIWE16.
Definition chip/gpio/GPIO.h:3658
static constexpr uint32 PDOR_PDO16(uint32 value)
PDOR - PDO16.
Definition chip/gpio/GPIO.h:661
static constexpr uint32 PDOR_PDO29(uint32 value)
PDOR - PDO29.
Definition chip/gpio/GPIO.h:830
static constexpr uint32 PDOR_PDO26(uint32 value)
PDOR - PDO26.
Definition chip/gpio/GPIO.h:791
static constexpr uint32 ISFR_ISF14(uint32 value)
ISFR - ISF14.
Definition chip/gpio/GPIO.h:4117
static void getVersionInfo(Register &base, VersionInfo &info)
Get GPIO version information.
static constexpr uint32 PSOR_PTSO18(uint32 value)
PSOR - PTSO18.
Definition chip/gpio/GPIO.h:1103
static constexpr uint32 PDDR_PDD25(uint32 value)
PDDR - PDD25.
Definition chip/gpio/GPIO.h:2858
static constexpr uint32 PIDR_PID2(uint32 value)
PIDR - PID2.
Definition chip/gpio/GPIO.h:2975
static constexpr uint32 PIDR_PID15(uint32 value)
PIDR - PID15.
Definition chip/gpio/GPIO.h:3144
static constexpr uint32 PSOR_PTSO17(uint32 value)
PSOR - PTSO17.
Definition chip/gpio/GPIO.h:1090
static constexpr uint32 PARAM_IRQNUM(uint32 value)
PARAM - IRQNUM.
Definition chip/gpio/GPIO.h:440
static constexpr uint32 PSOR_PTSO22(uint32 value)
PSOR - PTSO22.
Definition chip/gpio/GPIO.h:1155
static constexpr uint32 PDIR_PDI24(uint32 value)
PDIR - PDI24.
Definition chip/gpio/GPIO.h:2429
static constexpr uint32 PDOR_PDO3(uint32 value)
PDOR - PDO3.
Definition chip/gpio/GPIO.h:492
static constexpr uint32 ISFR_ISF16(uint32 value)
ISFR - ISF16.
Definition chip/gpio/GPIO.h:4151
static constexpr uint32 PDDR_PDD8(uint32 value)
PDDR - PDD8.
Definition chip/gpio/GPIO.h:2637
static constexpr uint32 PCOR_PTCO10(uint32 value)
PCOR - PTCO10.
Definition chip/gpio/GPIO.h:1415
static void pinInit(Register &base, uint32 pin, const PinConfig &config)
Initializes a GPIO pin used by the board.
static constexpr uint32 PDDR_PDD15(uint32 value)
PDDR - PDD15.
Definition chip/gpio/GPIO.h:2728
static constexpr uint32 PIDR_PID23(uint32 value)
PIDR - PID23.
Definition chip/gpio/GPIO.h:3248
static constexpr uint32 PDOR_PDO31(uint32 value)
PDOR - PDO31.
Definition chip/gpio/GPIO.h:856
static constexpr uint32 PCOR_PTCO26(uint32 value)
PCOR - PTCO26.
Definition chip/gpio/GPIO.h:1623
static constexpr uint32 PSOR_PTSO16(uint32 value)
PSOR - PTSO16.
Definition chip/gpio/GPIO.h:1077
static constexpr uint32 GICLR_GIWE8(uint32 value)
GICLR - GIWE8.
Definition chip/gpio/GPIO.h:3545
static constexpr uint32 PCOR_PTCO31(uint32 value)
PCOR - PTCO31.
Definition chip/gpio/GPIO.h:1688
static constexpr uint32 PTOR_PTTO26(uint32 value)
PORT - PTTO26.
Definition chip/gpio/GPIO.h:2039
static constexpr uint32 ISFR_ISF5(uint32 value)
ISFR - ISF5.
Definition chip/gpio/GPIO.h:3964
static constexpr uint32 PIDR_PID6(uint32 value)
PIDR - PID6.
Definition chip/gpio/GPIO.h:3027
static constexpr uint32 ISFR_ISF7(uint32 value)
ISFR - ISF7.
Definition chip/gpio/GPIO.h:3998
static constexpr uint32 PDIR_PDI18(uint32 value)
PDIR - PDI18.
Definition chip/gpio/GPIO.h:2351
static constexpr uint32 PDOR_PDO17(uint32 value)
PDOR - PDO17.
Definition chip/gpio/GPIO.h:674
static constexpr uint32 PDIR_PDI6(uint32 value)
PDIR - PDI6.
Definition chip/gpio/GPIO.h:2195
static constexpr uint32 ISFR_ISF0(uint32 value)
ISFR - ISF0.
Definition chip/gpio/GPIO.h:3879
static constexpr uint32 PSOR_PTSO9(uint32 value)
PSOR - PTSO9.
Definition chip/gpio/GPIO.h:986
static void portToggle(Register &base, uint32 mask)
Reverses the current output logic of the multiple GPIO pins.
Definition chip/gpio/GPIO.h:275
static constexpr uint32 PDOR_PDO24(uint32 value)
PDOR - PDO24.
Definition chip/gpio/GPIO.h:765
static constexpr uint32 ISFR_ISF10(uint32 value)
ISFR - ISF10.
Definition chip/gpio/GPIO.h:4049
static constexpr uint32 PTOR_PTTO12(uint32 value)
PORT - PTTO12.
Definition chip/gpio/GPIO.h:1857
static constexpr uint32 GICHR_GIWE30(uint32 value)
GICHR - GIWE30.
Definition chip/gpio/GPIO.h:3840
static constexpr uint32 PCOR_PTCO30(uint32 value)
PCOR - PTCO30.
Definition chip/gpio/GPIO.h:1675
static constexpr uint32 GICLR_GIWE3(uint32 value)
GICLR - GIWE3.
Definition chip/gpio/GPIO.h:3480
static constexpr uint32 GICLR_GIWE13(uint32 value)
GICLR - GIWE13.
Definition chip/gpio/GPIO.h:3610
static constexpr uint32 PDIR_PDI19(uint32 value)
PDIR - PDI19.
Definition chip/gpio/GPIO.h:2364
static constexpr uint32 PDDR_PDD10(uint32 value)
PDDR - PDD10.
Definition chip/gpio/GPIO.h:2663
static constexpr uint32 PTOR_PTTO25(uint32 value)
PORT - PTTO25.
Definition chip/gpio/GPIO.h:2026
static constexpr uint32 PIDR_PID30(uint32 value)
PIDR - PID30.
Definition chip/gpio/GPIO.h:3339
static constexpr uint32 ISFR_ISF24(uint32 value)
ISFR - ISF24.
Definition chip/gpio/GPIO.h:4287
static constexpr uint32 PTOR_PTTO18(uint32 value)
PORT - PTTO18.
Definition chip/gpio/GPIO.h:1935
static constexpr uint32 ISFR_ISF21(uint32 value)
ISFR - ISF21.
Definition chip/gpio/GPIO.h:4236
static constexpr uint32 PCOR_PTCO8(uint32 value)
PCOR - PTCO8.
Definition chip/gpio/GPIO.h:1389
static constexpr uint32 PSOR_PTSO19(uint32 value)
PSOR - PTSO19.
Definition chip/gpio/GPIO.h:1116
static constexpr uint32 PDIR_PDI28(uint32 value)
PDIR - PDI28.
Definition chip/gpio/GPIO.h:2481
static constexpr uint32 ISFR_ISF25(uint32 value)
ISFR - ISF25.
Definition chip/gpio/GPIO.h:4304
static constexpr uint32 PIDR_PID18(uint32 value)
PIDR - PID18.
Definition chip/gpio/GPIO.h:3183
static constexpr uint32 PDIR_PDI11(uint32 value)
PDIR - PDI11.
Definition chip/gpio/GPIO.h:2260
static constexpr uint32 GICLR_GIWE15(uint32 value)
GICLR - GIWE15.
Definition chip/gpio/GPIO.h:3636
static constexpr uint32 PTOR_PTTO22(uint32 value)
PORT - PTTO22.
Definition chip/gpio/GPIO.h:1987
static constexpr uint32 PDDR_PDD19(uint32 value)
PDDR - PDD19.
Definition chip/gpio/GPIO.h:2780
static constexpr uint32 PDDR_PDD18(uint32 value)
PDDR - PDD18.
Definition chip/gpio/GPIO.h:2767
static constexpr uint32 PCOR_PTCO24(uint32 value)
PCOR - PTCO24.
Definition chip/gpio/GPIO.h:1597
static constexpr uint32 PIDR_PID1(uint32 value)
PIDR - PID1.
Definition chip/gpio/GPIO.h:2962
static constexpr uint32 PDOR_PDO12(uint32 value)
PDOR - PDO12.
Definition chip/gpio/GPIO.h:609
static constexpr uint32 ISFR_ISF28(uint32 value)
ISFR - ISF28.
Definition chip/gpio/GPIO.h:4355
static constexpr uint32 PSOR_PTSO10(uint32 value)
PSOR - PTSO10.
Definition chip/gpio/GPIO.h:999
static constexpr uint32 PCOR_PTCO23(uint32 value)
PCOR - PTCO23.
Definition chip/gpio/GPIO.h:1584
static constexpr uint32 PDIR_PDI13(uint32 value)
PDIR - PDI13.
Definition chip/gpio/GPIO.h:2286
static constexpr uint32 PDIR_PDI10(uint32 value)
PDIR - PDI10.
Definition chip/gpio/GPIO.h:2247
static constexpr uint32 PIDR_PID16(uint32 value)
PIDR - PID16.
Definition chip/gpio/GPIO.h:3157
static constexpr uint32 GICLR_GIWE0(uint32 value)
GICLR - GIWE0.
Definition chip/gpio/GPIO.h:3441
static void portInputDisable(Register &base, uint32 mask)
Disable port input.
Definition chip/gpio/GPIO.h:228
static constexpr uint32 GICHR_GIWE25(uint32 value)
GICHR - GIWE25.
Definition chip/gpio/GPIO.h:3775
static constexpr uint32 PDOR_PDO4(uint32 value)
PDOR - PDO4.
Definition chip/gpio/GPIO.h:505
static constexpr uint32 ISFR_ISF20(uint32 value)
ISFR - ISF20.
Definition chip/gpio/GPIO.h:4219
static constexpr uint32 PSOR_PTSO24(uint32 value)
PSOR - PTSO24.
Definition chip/gpio/GPIO.h:1181
static constexpr uint32 PTOR_PTTO0(uint32 value)
PORT - PTTO0.
Definition chip/gpio/GPIO.h:1701
static constexpr uint32 PSOR_PTSO26(uint32 value)
PSOR - PTSO26.
Definition chip/gpio/GPIO.h:1207
static constexpr uint32 ISFR_ISF1(uint32 value)
ISFR - ISF1.
Definition chip/gpio/GPIO.h:3896
static constexpr uint32 PSOR_PTSO28(uint32 value)
PSOR - PTSO28.
Definition chip/gpio/GPIO.h:1233
static constexpr uint32 GICHR_GIWE28(uint32 value)
GICHR - GIWE28.
Definition chip/gpio/GPIO.h:3814
static constexpr uint32 VERID_MINOR(uint32 value)
VERID - MINOR.
Definition chip/gpio/GPIO.h:422
static constexpr uint32 GICHR_GIWE24(uint32 value)
GICHR - GIWE24.
Definition chip/gpio/GPIO.h:3762
static constexpr uint32 PDOR_PDO0(uint32 value)
PDOR - PDO0.
Definition chip/gpio/GPIO.h:453
static constexpr uint32 ISFR_ISF12(uint32 value)
ISFR - ISF12.
Definition chip/gpio/GPIO.h:4083
static constexpr uint32 GICLR_GIWE6(uint32 value)
GICLR - GIWE6.
Definition chip/gpio/GPIO.h:3519
static constexpr uint32 PCOR_PTCO6(uint32 value)
PCOR - PTCO6.
Definition chip/gpio/GPIO.h:1363
static constexpr uint32 GICLR_GIWE14(uint32 value)
GICLR - GIWE14.
Definition chip/gpio/GPIO.h:3623
static constexpr uint32 PDOR_PDO13(uint32 value)
PDOR - PDO13.
Definition chip/gpio/GPIO.h:622
static constexpr uint32 ISFR_ISF2(uint32 value)
ISFR - ISF2.
Definition chip/gpio/GPIO.h:3913
static constexpr uint32 PDIR_PDI1(uint32 value)
PDIR - PDI1.
Definition chip/gpio/GPIO.h:2130
static constexpr uint32 PDOR_PDO23(uint32 value)
PDOR - PDO23.
Definition chip/gpio/GPIO.h:752
static constexpr uint32 PTOR_PTTO6(uint32 value)
PORT - PTTO6.
Definition chip/gpio/GPIO.h:1779
static constexpr uint32 PCOR_PTCO0(uint32 value)
PCOR - PTCO0.
Definition chip/gpio/GPIO.h:1285
static constexpr uint32 GICLR_GIWE2(uint32 value)
GICLR - GIWE2.
Definition chip/gpio/GPIO.h:3467
static constexpr uint32 PTOR_PTTO28(uint32 value)
PORT - PTTO28.
Definition chip/gpio/GPIO.h:2065
static constexpr uint32 PSOR_PTSO11(uint32 value)
PSOR - PTSO11.
Definition chip/gpio/GPIO.h:1012
static constexpr uint32 VERID_FEATURE(uint32 value)
VERID - FEATURE.
Definition chip/gpio/GPIO.h:413
static constexpr uint32 PDIR_PDI5(uint32 value)
PDIR - PDI5.
Definition chip/gpio/GPIO.h:2182
static constexpr uint32 ISFR_ISF29(uint32 value)
ISFR - ISF29.
Definition chip/gpio/GPIO.h:4372
static constexpr uint32 ISFR_ISF26(uint32 value)
ISFR - ISF26.
Definition chip/gpio/GPIO.h:4321
static constexpr uint32 PTOR_PTTO17(uint32 value)
PORT - PTTO17.
Definition chip/gpio/GPIO.h:1922
static constexpr uint32 PCOR_PTCO20(uint32 value)
PCOR - PTCO20.
Definition chip/gpio/GPIO.h:1545
static uint32 pinRead(Register &base, uint32 pin)
Reads the current input value of the GPIO port.
Definition chip/gpio/GPIO.h:288
static constexpr uint32 PTOR_PTTO10(uint32 value)
PORT - PTTO10.
Definition chip/gpio/GPIO.h:1831
static constexpr uint32 PDIR_PDI29(uint32 value)
PDIR - PDI29.
Definition chip/gpio/GPIO.h:2494
static constexpr uint32 PSOR_PTSO29(uint32 value)
PSOR - PTSO29.
Definition chip/gpio/GPIO.h:1246
static constexpr uint32 GICHR_GIWE26(uint32 value)
GICHR - GIWE26.
Definition chip/gpio/GPIO.h:3788
static constexpr uint32 PCOR_PTCO22(uint32 value)
PCOR - PTCO22.
Definition chip/gpio/GPIO.h:1571
static constexpr uint32 PDDR_PDD24(uint32 value)
PDDR - PDD24.
Definition chip/gpio/GPIO.h:2845
static constexpr uint32 PSOR_PTSO4(uint32 value)
PSOR - PTSO4.
Definition chip/gpio/GPIO.h:921
static constexpr uint32 PIDR_PID26(uint32 value)
PIDR - PID26.
Definition chip/gpio/GPIO.h:3287
static constexpr uint32 PIDR_PID28(uint32 value)
PIDR - PID28.
Definition chip/gpio/GPIO.h:3313
static constexpr uint32 PIDR_PID7(uint32 value)
PIDR - PID7.
Definition chip/gpio/GPIO.h:3040
static constexpr uint32 PCOR_PTCO4(uint32 value)
PCOR - PTCO4.
Definition chip/gpio/GPIO.h:1337
static constexpr uint32 PCOR_PTCO25(uint32 value)
PCOR - PTCO25.
Definition chip/gpio/GPIO.h:1610
static constexpr uint32 GICHR_GIWE23(uint32 value)
GICHR - GIWE23.
Definition chip/gpio/GPIO.h:3749
static void gpioClearInterruptFlags(Register &base, uint32 mask)
Clears GPIO pin interrupt status flags.
static constexpr uint32 PSOR_PTSO23(uint32 value)
PSOR - PTSO23.
Definition chip/gpio/GPIO.h:1168
static constexpr uint32 PTOR_PTTO2(uint32 value)
PORT - PTTO2.
Definition chip/gpio/GPIO.h:1727
static constexpr uint32 PDIR_PDI12(uint32 value)
PDIR - PDI12.
Definition chip/gpio/GPIO.h:2273
static constexpr uint32 GICHR_GIWE17(uint32 value)
GICHR - GIWE17.
Definition chip/gpio/GPIO.h:3671
static constexpr uint32 PIDR_PID9(uint32 value)
PIDR - PID9.
Definition chip/gpio/GPIO.h:3066
static constexpr uint32 PDIR_PDI7(uint32 value)
PDIR - PDI7.
Definition chip/gpio/GPIO.h:2208
static constexpr uint32 PDDR_PDD26(uint32 value)
PDDR - PDD26.
Definition chip/gpio/GPIO.h:2871
static constexpr uint32 PCOR_PTCO27(uint32 value)
PCOR - PTCO27.
Definition chip/gpio/GPIO.h:1636
static constexpr uint32 PSOR_PTSO3(uint32 value)
PSOR - PTSO3.
Definition chip/gpio/GPIO.h:908
static constexpr uint32 PDIR_PDI21(uint32 value)
PDIR - PDI21.
Definition chip/gpio/GPIO.h:2390
static constexpr uint32 PIDR_PID4(uint32 value)
PIDR - PID4.
Definition chip/gpio/GPIO.h:3001
static constexpr uint32 PDOR_PDO10(uint32 value)
PDOR - PDO10.
Definition chip/gpio/GPIO.h:583
static constexpr uint32 PTOR_PTTO31(uint32 value)
PORT - PTTO31.
Definition chip/gpio/GPIO.h:2104
static constexpr uint32 PSOR_PTSO2(uint32 value)
PSOR - PTSO2.
Definition chip/gpio/GPIO.h:895
static constexpr uint32 PTOR_PTTO8(uint32 value)
PORT - PTTO8.
Definition chip/gpio/GPIO.h:1805
static constexpr uint32 PTOR_PTTO27(uint32 value)
PORT - PTTO27.
Definition chip/gpio/GPIO.h:2052
static constexpr uint32 ISFR_ISF30(uint32 value)
ISFR - ISF30.
Definition chip/gpio/GPIO.h:4389
static constexpr uint32 PDDR_PDD27(uint32 value)
PDDR - PDD27.
Definition chip/gpio/GPIO.h:2884
static constexpr uint32 PTOR_PTTO9(uint32 value)
PORT - PTTO9.
Definition chip/gpio/GPIO.h:1818
static constexpr uint32 ISFR_ISF13(uint32 value)
ISFR - ISF13.
Definition chip/gpio/GPIO.h:4100
static constexpr uint32 PCOR_PTCO19(uint32 value)
PCOR - PTCO19.
Definition chip/gpio/GPIO.h:1532
static constexpr uint32 PDDR_PDD2(uint32 value)
PDDR - PDD2.
Definition chip/gpio/GPIO.h:2559
static constexpr uint32 PDOR_PDO7(uint32 value)
PDOR - PDO7.
Definition chip/gpio/GPIO.h:544
static constexpr uint32 PSOR_PTSO8(uint32 value)
PSOR - PTSO8.
Definition chip/gpio/GPIO.h:973
static constexpr uint32 PTOR_PTTO24(uint32 value)
PORT - PTTO24.
Definition chip/gpio/GPIO.h:2013
static constexpr uint32 PDDR_PDD1(uint32 value)
PDDR - PDD1.
Definition chip/gpio/GPIO.h:2546
static constexpr uint32 PTOR_PTTO4(uint32 value)
PORT - PTTO4.
Definition chip/gpio/GPIO.h:1753
static constexpr uint32 PDIR_PDI16(uint32 value)
PDIR - PDI16.
Definition chip/gpio/GPIO.h:2325
static constexpr uint32 PIDR_PID14(uint32 value)
PIDR - PID14.
Definition chip/gpio/GPIO.h:3131
static constexpr uint32 PTOR_PTTO13(uint32 value)
PORT - PTTO13.
Definition chip/gpio/GPIO.h:1870
static constexpr uint32 ISFR_ISF9(uint32 value)
ISFR - ISF9.
Definition chip/gpio/GPIO.h:4032
static constexpr uint32 PSOR_PTSO20(uint32 value)
PSOR - PTSO20.
Definition chip/gpio/GPIO.h:1129
static constexpr uint32 PTOR_PTTO20(uint32 value)
PORT - PTTO20.
Definition chip/gpio/GPIO.h:1961
static constexpr uint32 PCOR_PTCO11(uint32 value)
PCOR - PTCO11.
Definition chip/gpio/GPIO.h:1428
static constexpr uint32 PCOR_PTCO9(uint32 value)
PCOR - PTCO9.
Definition chip/gpio/GPIO.h:1402
static constexpr uint32 ISFR_ISF3(uint32 value)
ISFR - ISF3.
Definition chip/gpio/GPIO.h:3930
static constexpr uint32 PIDR_PID0(uint32 value)
PIDR - PID0.
Definition chip/gpio/GPIO.h:2949
static constexpr uint32 PCOR_PTCO3(uint32 value)
PCOR - PTCO3.
Definition chip/gpio/GPIO.h:1324
static constexpr uint32 PDIR_PDI9(uint32 value)
PDIR - PDI9.
Definition chip/gpio/GPIO.h:2234
static constexpr uint32 PCOR_PTCO28(uint32 value)
PCOR - PTCO28.
Definition chip/gpio/GPIO.h:1649
static constexpr uint32 PDIR_PDI27(uint32 value)
PDIR - PDI27.
Definition chip/gpio/GPIO.h:2468
static constexpr uint32 ISFR_ISF22(uint32 value)
ISFR - ISF22.
Definition chip/gpio/GPIO.h:4253
static constexpr uint32 PDIR_PDI23(uint32 value)
PDIR - PDI23.
Definition chip/gpio/GPIO.h:2416
static constexpr uint32 PCOR_PTCO29(uint32 value)
PCOR - PTCO29.
Definition chip/gpio/GPIO.h:1662
static constexpr uint32 PSOR_PTSO25(uint32 value)
PSOR - PTSO25.
Definition chip/gpio/GPIO.h:1194
Definition NonInstantiable.h:29
Definition gpio/Count.h:22
@ PTOR_PTTO2
PORT - PTTO2.
@ PCOR_PTCO8
PCOR - PTCO8.
@ PSOR_PTSO4
PSOR - PTSO4.
@ PSOR_PTSO22
PSOR - PTSO22.
@ PTOR_PTTO27
PORT - PTTO27.
@ PDDR_PDD19
PDDR - PDD19.
@ PTOR_PTTO14
PORT - PTTO14.
@ PDOR_PDO17
PDOR - PDO17.
@ PCOR_PTCO4
PCOR - PTCO4.
@ PIDR_PID10
PIDR - PID10.
@ PDOR_PDO10
PDOR - PDO10.
@ PSOR_PTSO24
PSOR - PTSO24.
@ GICLR_GIWE1
GICLR - GIWE1.
@ PTOR_PTTO26
PORT - PTTO26.
@ PIDR_PID17
PIDR - PID17.
@ ISFR_ISF29
ISFR - ISF29.
@ PDDR_PDD13
PDDR - PDD13.
@ GICLR_GIWE15
GICLR - GIWE15.
@ PSOR_PTSO21
PSOR - PTSO21.
@ PSOR_PTSO23
PSOR - PTSO23.
@ ISFR_ISF30
ISFR - ISF30.
@ PDIR_PDI18
PDIR - PDI18.
@ PDIR_PDI27
PDIR - PDI27.
@ PSOR_PTSO15
PSOR - PTSO15.
@ PSOR_PTSO2
PSOR - PTSO2.
@ ISFR_ISF28
ISFR - ISF28.
@ PCOR_PTCO18
PCOR - PTCO18.
@ PTOR_PTTO9
PORT - PTTO9.
@ ISFR_ISF10
ISFR - ISF10.
@ PDIR_PDI14
PDIR - PDI14.
@ PDDR_PDD27
PDDR - PDD27.
@ PDIR_PDI30
PDIR - PDI30.
@ PIDR_PID29
PIDR - PID29.
@ VERID_MINOR
VERID - MINOR.
@ PDIR_PDI17
PDIR - PDI17.
@ GICHR_GIWD
GICHR - GIWD.
@ PDDR_PDD20
PDDR - PDD20.
@ PSOR_PTSO30
PSOR - PTSO30.
@ PTOR_PTTO28
PORT - PTTO28.
@ GICLR_GIWE7
GICLR - GIWE7.
@ PSOR_PTSO20
PSOR - PTSO20.
@ PDDR_PDD25
PDDR - PDD25.
@ GICHR_GIWE21
GICHR - GIWE21.
@ ISFR_ISF31
ISFR - ISF31.
@ PCOR_PTCO3
PCOR - PTCO3.
@ PARAM_IRQNUM
PARAM - IRQNUM.
@ PDOR_PDO16
PDOR - PDO16.
@ PCOR_PTCO16
PCOR - PTCO16.
@ PSOR_PTSO13
PSOR - PTSO13.
@ PCOR_PTCO15
PCOR - PTCO15.
@ GICLR_GIWD
GICLR - GIWD.
@ PDDR_PDD15
PDDR - PDD15.
@ PTOR_PTTO1
PORT - PTTO1.
@ PTOR_PTTO10
PORT - PTTO10.
@ PIDR_PID26
PIDR - PID26.
@ PCOR_PTCO2
PCOR - PTCO2.
@ GICHR_GIWE23
GICHR - GIWE23.
@ PDDR_PDD26
PDDR - PDD26.
@ PSOR_PTSO11
PSOR - PTSO11.
@ GICHR_GIWE18
GICHR - GIWE18.
@ PDDR_PDD14
PDDR - PDD14.
@ PSOR_PTSO17
PSOR - PTSO17.
@ GICHR_GIWE28
GICHR - GIWE28.
@ PDIR_PDI19
PDIR - PDI19.
@ PDIR_PDI28
PDIR - PDI28.
@ PDOR_PDO18
PDOR - PDO18.
@ PSOR_PTSO19
PSOR - PTSO19.
@ PCOR_PTCO25
PCOR - PTCO25.
@ PSOR_PTSO16
PSOR - PTSO16.
@ PCOR_PTCO17
PCOR - PTCO17.
@ PCOR_PTCO28
PCOR - PTCO28.
@ ISFR_ISF12
ISFR - ISF12.
@ PDOR_PDO23
PDOR - PDO23.
@ PDIR_PDI29
PDIR - PDI29.
@ PCOR_PTCO5
PCOR - PTCO5.
@ PDIR_PDI21
PDIR - PDI21.
@ PDOR_PDO31
PDOR - PDO31.
@ PSOR_PTSO28
PSOR - PTSO28.
@ PCOR_PTCO24
PCOR - PTCO24.
@ PSOR_PTSO9
PSOR - PTSO9.
@ GICHR_GIWE22
GICHR - GIWE22.
@ PDIR_PDI13
PDIR - PDI13.
@ PTOR_PTTO20
PORT - PTTO20.
@ PTOR_PTTO21
PORT - PTTO21.
@ ISFR_ISF23
ISFR - ISF23.
@ PDIR_PDI25
PDIR - PDI25.
@ PTOR_PTTO22
PORT - PTTO22.
@ PIDR_PID20
PIDR - PID20.
@ GICHR_GIWE29
GICHR - GIWE29.
@ PTOR_PTTO25
PORT - PTTO25.
@ PCOR_PTCO9
PCOR - PTCO9.
@ PDDR_PDD21
PDDR - PDD21.
@ PDDR_PDD17
PDDR - PDD17.
@ PCOR_PTCO19
PCOR - PTCO19.
@ ISFR_ISF17
ISFR - ISF17.
@ PSOR_PTSO7
PSOR - PTSO7.
@ PCOR_PTCO7
PCOR - PTCO7.
@ PTOR_PTTO19
PORT - PTTO19.
@ PTOR_PTTO7
PORT - PTTO7.
@ PDOR_PDO22
PDOR - PDO22.
@ PSOR_PTSO31
PSOR - PTSO31.
@ PSOR_PTSO6
PSOR - PTSO6.
@ PDIR_PDI16
PDIR - PDI16.
@ PIDR_PID24
PIDR - PID24.
@ VERID_FEATURE
VERID - FEATURE.
@ PCOR_PTCO30
PCOR - PTCO30.
@ ISFR_ISF14
ISFR - ISF14.
@ PCOR_PTCO6
PCOR - PTCO6.
@ PSOR_PTSO3
PSOR - PTSO3.
@ PDOR_PDO28
PDOR - PDO28.
@ PIDR_PID22
PIDR - PID22.
@ PDOR_PDO29
PDOR - PDO29.
@ PTOR_PTTO8
PORT - PTTO8.
@ ISFR_ISF13
ISFR - ISF13.
@ PDIR_PDI12
PDIR - PDI12.
@ PDOR_PDO24
PDOR - PDO24.
@ GICHR_GIWE24
GICHR - GIWE24.
@ PDIR_PDI24
PDIR - PDI24.
@ PDDR_PDD12
PDDR - PDD12.
@ PSOR_PTSO14
PSOR - PTSO14.
@ PCOR_PTCO21
PCOR - PTCO21.
@ PIDR_PID28
PIDR - PID28.
@ PDOR_PDO19
PDOR - PDO19.
@ PIDR_PID14
PIDR - PID14.
@ GICLR_GIWE13
GICLR - GIWE13.
@ PDOR_PDO27
PDOR - PDO27.
@ PIDR_PID30
PIDR - PID30.
@ ISFR_ISF19
ISFR - ISF19.
@ GICLR_GIWE5
GICLR - GIWE5.
@ ISFR_ISF27
ISFR - ISF27.
@ PCOR_PTCO31
PCOR - PTCO31.
@ PTOR_PTTO24
PORT - PTTO24.
@ ISFR_ISF16
ISFR - ISF16.
@ PTOR_PTTO31
PORT - PTTO31.
@ ISFR_ISF24
ISFR - ISF24.
@ ISFR_ISF15
ISFR - ISF15.
@ PDIR_PDI23
PDIR - PDI23.
@ GICLR_GIWE4
GICLR - GIWE4.
@ PDIR_PDI26
PDIR - PDI26.
@ PSOR_PTSO0
PSOR - PTSO0.
@ PCOR_PTCO11
PCOR - PTCO11.
@ PDDR_PDD11
PDDR - PDD11.
@ PSOR_PTSO10
PSOR - PTSO10.
@ ISFR_ISF25
ISFR - ISF25.
@ ISFR_ISF21
ISFR - ISF21.
@ PDOR_PDO12
PDOR - PDO12.
@ PTOR_PTTO29
PORT - PTTO29.
@ PDIR_PDI11
PDIR - PDI11.
@ ISFR_ISF18
ISFR - ISF18.
@ PCOR_PTCO29
PCOR - PTCO29.
@ PCOR_PTCO13
PCOR - PTCO13.
@ PCOR_PTCO12
PCOR - PTCO12.
@ PDDR_PDD28
PDDR - PDD28.
@ PCOR_PTCO20
PCOR - PTCO20.
@ PDDR_PDD23
PDDR - PDD23.
@ GICHR_GIWE30
GICHR - GIWE30.
@ GICLR_GIWE3
GICLR - GIWE3.
@ PDIR_PDI31
PDIR - PDI31.
@ PTOR_PTTO0
PORT - PTTO0.
@ PDDR_PDD16
PDDR - PDD16.
@ PIDR_PID23
PIDR - PID23.
@ PTOR_PTTO23
PORT - PTTO23.
@ PDOR_PDO15
PDOR - PDO15.
@ PIDR_PID16
PIDR - PID16.
@ PSOR_PTSO27
PSOR - PTSO27.
@ PIDR_PID27
PIDR - PID27.
@ PSOR_PTSO29
PSOR - PTSO29.
@ PDDR_PDD30
PDDR - PDD30.
@ PDOR_PDO21
PDOR - PDO21.
@ ISFR_ISF11
ISFR - ISF11.
@ GICHR_GIWE16
GICHR - GIWE16.
@ GICLR_GIWE6
GICLR - GIWE6.
@ PDOR_PDO11
PDOR - PDO11.
@ PIDR_PID12
PIDR - PID12.
@ PDOR_PDO26
PDOR - PDO26.
@ PTOR_PTTO30
PORT - PTTO30.
@ VERID_MAJOR
VERID - MAJOR.
@ GICHR_GIWE31
GICHR - GIWE31.
@ PTOR_PTTO11
PORT - PTTO11.
@ PDOR_PDO25
PDOR - PDO25.
@ GICLR_GIWE9
GICLR - GIWE9.
@ PCOR_PTCO22
PCOR - PTCO22.
@ GICHR_GIWE27
GICHR - GIWE27.
@ PTOR_PTTO16
PORT - PTTO16.
@ PDDR_PDD31
PDDR - PDD31.
@ PIDR_PID25
PIDR - PID25.
@ PDIR_PDI22
PDIR - PDI22.
@ PDDR_PDD22
PDDR - PDD22.
@ PSOR_PTSO18
PSOR - PTSO18.
@ GICLR_GIWE11
GICLR - GIWE11.
@ PSOR_PTSO5
PSOR - PTSO5.
@ PIDR_PID18
PIDR - PID18.
@ PTOR_PTTO17
PORT - PTTO17.
@ PDDR_PDD10
PDDR - PDD10.
@ PDDR_PDD24
PDDR - PDD24.
@ ISFR_ISF26
ISFR - ISF26.
@ PDOR_PDO13
PDOR - PDO13.
@ PSOR_PTSO26
PSOR - PTSO26.
@ PDOR_PDO14
PDOR - PDO14.
@ GICHR_GIWE17
GICHR - GIWE17.
@ PDDR_PDD18
PDDR - PDD18.
@ PTOR_PTTO3
PORT - PTTO3.
@ PSOR_PTSO8
PSOR - PTSO8.
@ PDIR_PDI10
PDIR - PDI10.
@ PSOR_PTSO25
PSOR - PTSO25.
@ PIDR_PID11
PIDR - PID11.
@ PDIR_PDI15
PDIR - PDI15.
@ PCOR_PTCO26
PCOR - PTCO26.
@ GICLR_GIWE2
GICLR - GIWE2.
@ PIDR_PID15
PIDR - PID15.
@ PDIR_PDI20
PDIR - PDI20.
@ GICHR_GIWE19
GICHR - GIWE19.
@ ISFR_ISF20
ISFR - ISF20.
@ PSOR_PTSO12
PSOR - PTSO12.
@ GICLR_GIWE12
GICLR - GIWE12.
@ PIDR_PID21
PIDR - PID21.
@ PCOR_PTCO14
PCOR - PTCO14.
@ PCOR_PTCO0
PCOR - PTCO0.
@ GICHR_GIWE25
GICHR - GIWE25.
@ GICHR_GIWE20
GICHR - GIWE20.
@ PTOR_PTTO15
PORT - PTTO15.
@ PTOR_PTTO13
PORT - PTTO13.
@ GICLR_GIWE0
GICLR - GIWE0.
@ PDOR_PDO20
PDOR - PDO20.
@ GICLR_GIWE8
GICLR - GIWE8.
@ PCOR_PTCO1
PCOR - PTCO1.
@ PTOR_PTTO18
PORT - PTTO18.
@ PTOR_PTTO12
PORT - PTTO12.
@ PCOR_PTCO27
PCOR - PTCO27.
@ PTOR_PTTO4
PORT - PTTO4.
@ PIDR_PID31
PIDR - PID31.
@ PIDR_PID13
PIDR - PID13.
@ PDDR_PDD29
PDDR - PDD29.
@ PCOR_PTCO10
PCOR - PTCO10.
@ PCOR_PTCO23
PCOR - PTCO23.
@ PTOR_PTTO5
PORT - PTTO5.
@ PIDR_PID19
PIDR - PID19.
@ PSOR_PTSO1
PSOR - PTSO1.
@ GICHR_GIWE26
GICHR - GIWE26.
@ PDOR_PDO30
PDOR - PDO30.
@ PTOR_PTTO6
PORT - PTTO6.
@ ISFR_ISF22
ISFR - ISF22.
@ GICLR_GIWE14
GICLR - GIWE14.
@ GICLR_GIWE10
GICLR - GIWE10.
InterruptConfig
Definition InterruptConfig.h:33
@ ISFR_ISF8
ISFR - ISF8 - 中斷狀態標誌
@ PTOR_PTTO2
PORT - PTTO2 - 埠切換輸出
@ PCOR_PTCO8
PCOR - PTCO8 - 埠清除輸出
@ PSOR_PTSO4
PSOR - PTSO4 - 埠設定輸出
@ PDR_PD
PDR - PD - 引腳資料
@ PSOR_PTSO22
PSOR - PTSO22 - 埠設定輸出
@ PTOR_PTTO27
PORT - PTTO27 - 埠切換輸出
@ PDDR_PDD19
PDDR - PDD19 - 埠資料方向
@ PTOR_PTTO14
PORT - PTTO14 - 埠切換輸出
@ PDOR_PDO17
PDOR - PDO17 - 埠資料輸出
@ PCOR_PTCO4
PCOR - PTCO4 - 埠清除輸出
@ PIDR_PID10
PIDR - PID10 - 埠輸入禁用
@ PDOR_PDO10
PDOR - PDO10 - 埠資料輸出
@ PSOR_PTSO24
PSOR - PTSO24 - 埠設定輸出
@ GICLR_GIWE1
GICLR - GIWE1 - 全局中斷控制低
@ PIDR_PID9
PIDR - PID9 - 埠輸入禁用
@ PTOR_PTTO26
PORT - PTTO26 - 埠切換輸出
@ PIDR_PID17
PIDR - PID17 - 埠輸入禁用
@ PDOR_PDO9
PDOR - PDO9 - 埠資料輸出
@ ISFR_ISF29
ISFR - ISF29 - 中斷狀態標誌
@ PDDR_PDD13
PDDR - PDD13 - 埠資料方向
@ GICLR_GIWE15
GICLR - GIWE15 - 全局中斷控制低
@ PSOR_PTSO21
PSOR - PTSO21 - 埠設定輸出
@ PSOR_PTSO23
PSOR - PTSO23 - 埠設定輸出
@ ISFR_ISF30
ISFR - ISF30 - 中斷狀態標誌
@ PDIR_PDI18
PDIR - PDI18 - 埠資料輸入
@ PDIR_PDI27
PDIR - PDI27 - 埠資料輸入
@ PSOR_PTSO15
PSOR - PTSO15 - 埠設定輸出
@ PDDR_PDD4
PDDR - PDD4 - 埠資料方向
@ PDOR_PDO3
PDOR - PDO3 - 埠資料輸出
@ PSOR_PTSO2
PSOR - PTSO2 - 埠設定輸出
@ ISFR_ISF28
ISFR - ISF28 - 中斷狀態標誌
@ PCOR_PTCO18
PCOR - PTCO18 - 埠清除輸出
@ PTOR_PTTO9
PORT - PTTO9 - 埠切換輸出
@ ISFR_ISF10
ISFR - ISF10 - 中斷狀態標誌
@ PDIR_PDI14
PDIR - PDI14 - 埠資料輸入
@ PDDR_PDD27
PDDR - PDD27 - 埠資料方向
@ PDIR_PDI30
PDIR - PDI30 - 埠資料輸入
@ ICR_IRQC
ICR - IRQC - 中斷控制
@ PIDR_PID29
PIDR - PID29 - 埠輸入禁用
@ VERID_MINOR
VERID - MINOR - 版本ID次要版本號
@ PDIR_PDI17
PDIR - PDI17 - 埠資料輸入
@ GICHR_GIWD
GICHR - GIWD - 全局中斷控制高
@ PDDR_PDD20
PDDR - PDD20 - 埠資料方向
@ PSOR_PTSO30
PSOR - PTSO30 - 埠設定輸出
@ PTOR_PTTO28
PORT - PTTO28 - 埠切換輸出
@ GICLR_GIWE7
GICLR - GIWE7 - 全局中斷控制低
@ PSOR_PTSO20
PSOR - PTSO20 - 埠設定輸出
@ PDOR_PDO5
PDOR - PDO5 - 埠資料輸出
@ PDIR_PDI5
PDIR - PDI5 - 埠資料輸入
@ PDDR_PDD25
PDDR - PDD25 - 埠資料方向
@ GICHR_GIWE21
GICHR - GIWE21 - 全局中斷控制高
@ ISFR_ISF31
ISFR - ISF31 - 中斷狀態標誌
@ PCOR_PTCO3
PCOR - PTCO3 - 埠清除輸出
@ PARAM_IRQNUM
PARAM - IRQNUM - 參數中斷號
@ PDOR_PDO16
PDOR - PDO16 - 埠資料輸出
@ PCOR_PTCO16
PCOR - PTCO16 - 埠清除輸出
@ PSOR_PTSO13
PSOR - PTSO13 - 埠設定輸出
@ PDDR_PDD5
PDDR - PDD5 - 埠資料方向
@ PCOR_PTCO15
PCOR - PTCO15 - 埠清除輸出
@ GICLR_GIWD
GICLR - GIWD - 全局中斷控制低
@ PDDR_PDD15
PDDR - PDD15 - 埠資料方向
@ PTOR_PTTO1
PORT - PTTO1 - 埠切換輸出
@ PTOR_PTTO10
PORT - PTTO10 - 埠切換輸出
@ PIDR_PID26
PIDR - PID26 - 埠輸入禁用
@ PCOR_PTCO2
PCOR - PTCO2 - 埠清除輸出
@ GICHR_GIWE23
GICHR - GIWE23 - 全局中斷控制高
@ PDDR_PDD26
PDDR - PDD26 - 埠資料方向
@ PSOR_PTSO11
PSOR - PTSO11 - 埠設定輸出
@ GICHR_GIWE18
GICHR - GIWE18 - 全局中斷控制高
@ PDDR_PDD14
PDDR - PDD14 - 埠資料方向
@ PSOR_PTSO17
PSOR - PTSO17 - 埠設定輸出
@ GICHR_GIWE28
GICHR - GIWE28 - 全局中斷控制高
@ PDDR_PDD0
PDDR - PDD0 - 埠資料方向
@ PIDR_PID3
PIDR - PID3 - 埠輸入禁用
@ PDIR_PDI19
PDIR - PDI19 - 埠資料輸入
@ PDIR_PDI28
PDIR - PDI28 - 埠資料輸入
@ PDOR_PDO18
PDOR - PDO18 - 埠資料輸出
@ PSOR_PTSO19
PSOR - PTSO19 - 埠設定輸出
@ PCOR_PTCO25
PCOR - PTCO25 - 埠清除輸出
@ PSOR_PTSO16
PSOR - PTSO16 - 埠設定輸出
@ ISFR_ISF3
ISFR - ISF3 - 中斷狀態標誌
@ PCOR_PTCO17
PCOR - PTCO17 - 埠清除輸出
@ PDOR_PDO8
PDOR - PDO8 - 埠資料輸出
@ PCOR_PTCO28
PCOR - PTCO28 - 埠清除輸出
@ ISFR_ISF12
ISFR - ISF12 - 中斷狀態標誌
@ PDOR_PDO23
PDOR - PDO23 - 埠資料輸出
@ PIDR_PID8
PIDR - PID8 - 埠輸入禁用
@ PDIR_PDI29
PDIR - PDI29 - 埠資料輸入
@ PCOR_PTCO5
PCOR - PTCO5 - 埠清除輸出
@ PDIR_PDI21
PDIR - PDI21 - 埠資料輸入
@ PDDR_PDD8
PDDR - PDD8 - 埠資料方向
@ PDOR_PDO31
PDOR - PDO31 - 埠資料輸出
@ PSOR_PTSO28
PSOR - PTSO28 - 埠設定輸出
@ ISFR_ISF4
ISFR - ISF4 - 中斷狀態標誌
@ PCOR_PTCO24
PCOR - PTCO24 - 埠清除輸出
@ PSOR_PTSO9
PSOR - PTSO9 - 埠設定輸出
@ GICHR_GIWE22
GICHR - GIWE22 - 全局中斷控制高
@ PDIR_PDI13
PDIR - PDI13 - 埠資料輸入
@ PTOR_PTTO20
PORT - PTTO20 - 埠切換輸出
@ PIDR_PID0
PIDR - PID0 - 埠輸入禁用
@ PTOR_PTTO21
PORT - PTTO21 - 埠切換輸出
@ ISFR_ISF23
ISFR - ISF23 - 中斷狀態標誌
@ PDIR_PDI25
PDIR - PDI25 - 埠資料輸入
@ PTOR_PTTO22
PORT - PTTO22 - 埠切換輸出
@ PIDR_PID20
PIDR - PID20 - 埠輸入禁用
@ ISFR_ISF2
ISFR - ISF2 - 中斷狀態標誌
@ GICHR_GIWE29
GICHR - GIWE29 - 全局中斷控制高
@ PDOR_PDO6
PDOR - PDO6 - 埠資料輸出
@ PDDR_PDD3
PDDR - PDD3 - 埠資料方向
@ PTOR_PTTO25
PORT - PTTO25 - 埠切換輸出
@ PCOR_PTCO9
PCOR - PTCO9 - 埠清除輸出
@ PDDR_PDD21
PDDR - PDD21 - 埠資料方向
@ PDDR_PDD17
PDDR - PDD17 - 埠資料方向
@ PCOR_PTCO19
PCOR - PTCO19 - 埠清除輸出
@ ISFR_ISF17
ISFR - ISF17 - 中斷狀態標誌
@ PSOR_PTSO7
PSOR - PTSO7 - 埠設定輸出
@ PCOR_PTCO7
PCOR - PTCO7 - 埠清除輸出
@ PTOR_PTTO19
PORT - PTTO19 - 埠切換輸出
@ PTOR_PTTO7
PORT - PTTO7 - 埠切換輸出
@ PDOR_PDO22
PDOR - PDO22 - 埠資料輸出
@ PSOR_PTSO31
PSOR - PTSO31 - 埠設定輸出
@ ISFR_ISF9
ISFR - ISF9 - 中斷狀態標誌
@ PSOR_PTSO6
PSOR - PTSO6 - 埠設定輸出
@ PDIR_PDI16
PDIR - PDI16 - 埠資料輸入
@ PIDR_PID24
PIDR - PID24 - 埠輸入禁用
@ VERID_FEATURE
VERID - FEATURE - 版本ID特徵規格編號
@ PCOR_PTCO30
PCOR - PTCO30 - 埠清除輸出
@ ISFR_ISF14
ISFR - ISF14 - 中斷狀態標誌
@ PCOR_PTCO6
PCOR - PTCO6 - 埠清除輸出
@ PSOR_PTSO3
PSOR - PTSO3 - 埠設定輸出
@ PDOR_PDO28
PDOR - PDO28 - 埠資料輸出
@ PIDR_PID22
PIDR - PID22 - 埠輸入禁用
@ PDOR_PDO29
PDOR - PDO29 - 埠資料輸出
@ PTOR_PTTO8
PORT - PTTO8 - 埠切換輸出
@ ISFR_ISF13
ISFR - ISF13 - 中斷狀態標誌
@ PDIR_PDI12
PDIR - PDI12 - 埠資料輸入
@ PDOR_PDO24
PDOR - PDO24 - 埠資料輸出
@ GICHR_GIWE24
GICHR - GIWE24 - 全局中斷控制高
@ PDIR_PDI24
PDIR - PDI24 - 埠資料輸入
@ PDDR_PDD12
PDDR - PDD12 - 埠資料方向
@ PSOR_PTSO14
PSOR - PTSO14 - 埠設定輸出
@ PCOR_PTCO21
PCOR - PTCO21 - 埠清除輸出
@ PIDR_PID28
PIDR - PID28 - 埠輸入禁用
@ PDOR_PDO19
PDOR - PDO19 - 埠資料輸出
@ ICR_ISF
ICR - ISF - 中斷狀態標誌
@ PDIR_PDI8
PDIR - PDI8 - 埠資料輸入
@ PIDR_PID14
PIDR - PID14 - 埠輸入禁用
@ GICLR_GIWE13
GICLR - GIWE13 - 全局中斷控制低
@ PDOR_PDO27
PDOR - PDO27 - 埠資料輸出
@ PDOR_PDO1
PDOR - PDO1 - 埠資料輸出
@ PIDR_PID30
PIDR - PID30 - 埠輸入禁用
@ ISFR_ISF19
ISFR - ISF19 - 中斷狀態標誌
@ GICLR_GIWE5
GICLR - GIWE5 - 全局中斷控制低
@ ISFR_ISF27
ISFR - ISF27 - 中斷狀態標誌
@ PCOR_PTCO31
PCOR - PTCO31 - 埠清除輸出
@ PDIR_PDI7
PDIR - PDI7 - 埠資料輸入
@ PTOR_PTTO24
PORT - PTTO24 - 埠切換輸出
@ PDIR_PDI0
PDIR - PDI0 - 埠資料輸入
@ ISFR_ISF16
ISFR - ISF16 - 中斷狀態標誌
@ PDOR_PDO4
PDOR - PDO4 - 埠資料輸出
@ PTOR_PTTO31
PORT - PTTO31 - 埠切換輸出
@ ISFR_ISF24
ISFR - ISF24 - 中斷狀態標誌
@ ISFR_ISF15
ISFR - ISF15 - 中斷狀態標誌
@ PDIR_PDI23
PDIR - PDI23 - 埠資料輸入
@ GICLR_GIWE4
GICLR - GIWE4 - 全局中斷控制低
@ PDIR_PDI26
PDIR - PDI26 - 埠資料輸入
@ PSOR_PTSO0
PSOR - PTSO0 - 埠設定輸出
@ PDIR_PDI4
PDIR - PDI4 - 埠資料輸入
@ PIDR_PID4
PIDR - PID4 - 埠輸入禁用
@ PCOR_PTCO11
PCOR - PTCO11 - 埠清除輸出
@ PDDR_PDD11
PDDR - PDD11 - 埠資料方向
@ PSOR_PTSO10
PSOR - PTSO10 - 埠設定輸出
@ ISFR_ISF25
ISFR - ISF25 - 中斷狀態標誌
@ ISFR_ISF21
ISFR - ISF21 - 中斷狀態標誌
@ PDOR_PDO12
PDOR - PDO12 - 埠資料輸出
@ PTOR_PTTO29
PORT - PTTO29 - 埠切換輸出
@ PDIR_PDI11
PDIR - PDI11 - 埠資料輸入
@ ISFR_ISF18
ISFR - ISF18 - 中斷狀態標誌
@ ISFR_ISF0
ISFR - ISF0 - 中斷狀態標誌
@ PCOR_PTCO29
PCOR - PTCO29 - 埠清除輸出
@ PCOR_PTCO13
PCOR - PTCO13 - 埠清除輸出
@ PCOR_PTCO12
PCOR - PTCO12 - 埠清除輸出
@ PDDR_PDD28
PDDR - PDD28 - 埠資料方向
@ PCOR_PTCO20
PCOR - PTCO20 - 埠清除輸出
@ PDDR_PDD23
PDDR - PDD23 - 埠資料方向
@ PDDR_PDD6
PDDR - PDD6 - 埠資料方向
@ GICHR_GIWE30
GICHR - GIWE30 - 全局中斷控制高
@ GICLR_GIWE3
GICLR - GIWE3 - 全局中斷控制低
@ PDIR_PDI31
PDIR - PDI31 - 埠資料輸入
@ PTOR_PTTO0
PORT - PTTO0 - 埠切換輸出
@ PDDR_PDD16
PDDR - PDD16 - 埠資料方向
@ PIDR_PID23
PIDR - PID23 - 埠輸入禁用
@ PTOR_PTTO23
PORT - PTTO23 - 埠切換輸出
@ PDOR_PDO15
PDOR - PDO15 - 埠資料輸出
@ PIDR_PID16
PIDR - PID16 - 埠輸入禁用
@ PSOR_PTSO27
PSOR - PTSO27 - 埠設定輸出
@ PIDR_PID27
PIDR - PID27 - 埠輸入禁用
@ PDDR_PDD1
PDDR - PDD1 - 埠資料方向
@ PSOR_PTSO29
PSOR - PTSO29 - 埠設定輸出
@ PDDR_PDD30
PDDR - PDD30 - 埠資料方向
@ PIDR_PID7
PIDR - PID7 - 埠輸入禁用
@ PDOR_PDO21
PDOR - PDO21 - 埠資料輸出
@ ISFR_ISF11
ISFR - ISF11 - 中斷狀態標誌
@ PDOR_PDO0
PDOR - PDO0 - 埠資料輸出
@ GICHR_GIWE16
GICHR - GIWE16 - 全局中斷控制高
@ GICLR_GIWE6
GICLR - GIWE6 - 全局中斷控制低
@ PDDR_PDD2
PDDR - PDD2 - 埠資料方向
@ PDOR_PDO11
PDOR - PDO11 - 埠資料輸出
@ PIDR_PID12
PIDR - PID12 - 埠輸入禁用
@ PDOR_PDO26
PDOR - PDO26 - 埠資料輸出
@ PTOR_PTTO30
PORT - PTTO30 - 埠切換輸出
@ VERID_MAJOR
VERID - MAJOR - 版本ID主要版本號
@ GICHR_GIWE31
GICHR - GIWE31 - 全局中斷控制高
@ PTOR_PTTO11
PORT - PTTO11 - 埠切換輸出
@ PDOR_PDO25
PDOR - PDO25 - 埠資料輸出
@ GICLR_GIWE9
GICLR - GIWE9 - 全局中斷控制低
@ PCOR_PTCO22
PCOR - PTCO22 - 埠清除輸出
@ PIDR_PID2
PIDR - PID2 - 埠輸入禁用
@ GICHR_GIWE27
GICHR - GIWE27 - 全局中斷控制高
@ PDDR_PDD9
PDDR - PDD9 - 埠資料方向
@ PTOR_PTTO16
PORT - PTTO16 - 埠切換輸出
@ PDDR_PDD31
PDDR - PDD31 - 埠資料方向
@ PIDR_PID25
PIDR - PID25 - 埠輸入禁用
@ PDIR_PDI22
PDIR - PDI22 - 埠資料輸入
@ PDDR_PDD22
PDDR - PDD22 - 埠資料方向
@ PSOR_PTSO18
PSOR - PTSO18 - 埠設定輸出
@ PDIR_PDI1
PDIR - PDI1 - 埠資料輸入
@ GICLR_GIWE11
GICLR - GIWE11 - 全局中斷控制低
@ PSOR_PTSO5
PSOR - PTSO5 - 埠設定輸出
@ ISFR_ISF1
ISFR - ISF1 - 中斷狀態標誌
@ PIDR_PID1
PIDR - PID1 - 埠輸入禁用
@ PDDR_PDD7
PDDR - PDD7 - 埠資料方向
@ PIDR_PID18
PIDR - PID18 - 埠輸入禁用
@ PTOR_PTTO17
PORT - PTTO17 - 埠切換輸出
@ PDDR_PDD10
PDDR - PDD10 - 埠資料方向
@ PDDR_PDD24
PDDR - PDD24 - 埠資料方向
@ ISFR_ISF26
ISFR - ISF26 - 中斷狀態標誌
@ PDOR_PDO13
PDOR - PDO13 - 埠資料輸出
@ PDIR_PDI3
PDIR - PDI3 - 埠資料輸入
@ PSOR_PTSO26
PSOR - PTSO26 - 埠設定輸出
@ PDOR_PDO14
PDOR - PDO14 - 埠資料輸出
@ GICHR_GIWE17
GICHR - GIWE17 - 全局中斷控制高
@ PDDR_PDD18
PDDR - PDD18 - 埠資料方向
@ PTOR_PTTO3
PORT - PTTO3 - 埠切換輸出
@ PSOR_PTSO8
PSOR - PTSO8 - 埠設定輸出
@ PDIR_PDI10
PDIR - PDI10 - 埠資料輸入
@ PSOR_PTSO25
PSOR - PTSO25 - 埠設定輸出
@ PIDR_PID11
PIDR - PID11 - 埠輸入禁用
@ PDIR_PDI9
PDIR - PDI9 - 埠資料輸入
@ PDIR_PDI15
PDIR - PDI15 - 埠資料輸入
@ PCOR_PTCO26
PCOR - PTCO26 - 埠清除輸出
@ GICLR_GIWE2
GICLR - GIWE2 - 全局中斷控制低
@ PIDR_PID15
PIDR - PID15 - 埠輸入禁用
@ PDIR_PDI20
PDIR - PDI20 - 埠資料輸入
@ GICHR_GIWE19
GICHR - GIWE19 - 全局中斷控制高
@ ISFR_ISF20
ISFR - ISF20 - 中斷狀態標誌
@ PSOR_PTSO12
PSOR - PTSO12 - 埠設定輸出
@ GICLR_GIWE12
GICLR - GIWE12 - 全局中斷控制低
@ PIDR_PID5
PIDR - PID5 - 埠輸入禁用
@ PIDR_PID21
PIDR - PID21 - 埠輸入禁用
@ PCOR_PTCO14
PCOR - PTCO14 - 埠清除輸出
@ PCOR_PTCO0
PCOR - PTCO0 - 埠清除輸出
@ GICHR_GIWE25
GICHR - GIWE25 - 全局中斷控制高
@ GICHR_GIWE20
GICHR - GIWE20 - 全局中斷控制高
@ PTOR_PTTO15
PORT - PTTO15 - 埠切換輸出
@ PTOR_PTTO13
PORT - PTTO13 - 埠切換輸出
@ GICLR_GIWE0
GICLR - GIWE0 - 全局中斷控制低
@ ISFR_ISF6
ISFR - ISF6 - 中斷狀態標誌
@ PDIR_PDI2
PDIR - PDI2 - 埠資料輸入
@ PDOR_PDO20
PDOR - PDO20 - 埠資料輸出
@ ISFR_ISF7
ISFR - ISF7 - 中斷狀態標誌
@ GICLR_GIWE8
GICLR - GIWE8 - 全局中斷控制低
@ PCOR_PTCO1
PCOR - PTCO1 - 埠清除輸出
@ PTOR_PTTO18
PORT - PTTO18 - 埠切換輸出
@ PIDR_PID6
PIDR - PID6 - 埠輸入禁用
@ PTOR_PTTO12
PORT - PTTO12 - 埠切換輸出
@ PCOR_PTCO27
PCOR - PTCO27 - 埠清除輸出
@ PTOR_PTTO4
PORT - PTTO4 - 埠切換輸出
@ PIDR_PID31
PIDR - PID31 - 埠輸入禁用
@ PIDR_PID13
PIDR - PID13 - 埠輸入禁用
@ PDDR_PDD29
PDDR - PDD29 - 埠資料方向
@ PCOR_PTCO10
PCOR - PTCO10 - 埠清除輸出
@ PCOR_PTCO23
PCOR - PTCO23 - 埠清除輸出
@ PTOR_PTTO5
PORT - PTTO5 - 埠切換輸出
@ PDOR_PDO2
PDOR - PDO2 - 埠資料輸出
@ PDIR_PDI6
PDIR - PDI6 - 埠資料輸入
@ PIDR_PID19
PIDR - PID19 - 埠輸入禁用
@ ISFR_ISF5
ISFR - ISF5 - 中斷狀態標誌
@ PSOR_PTSO1
PSOR - PTSO1 - 埠設定輸出
@ GICHR_GIWE26
GICHR - GIWE26 - 全局中斷控制高
@ PDOR_PDO30
PDOR - PDO30 - 埠資料輸出
@ PTOR_PTTO6
PORT - PTTO6 - 埠切換輸出
@ ISFR_ISF22
ISFR - ISF22 - 中斷狀態標誌
@ GICLR_GIWE14
GICLR - GIWE14 - 全局中斷控制低
@ PDOR_PDO7
PDOR - PDO7 - 埠資料輸出
@ GICLR_GIWE10
GICLR - GIWE10 - 全局中斷控制低
GPIO
GPIO埠0引腳多功能選擇列舉
Definition core/mux/gpio0/GPIO.h:51
The GPIO pin configuration structure.
Definition PinConfig.h:39
GPIO 週邊暫存器存取層
Definition gpio/Register.h:45
__O uint32 ptor
埠切換輸出暫存器 (偏移: 0x4C,唯寫)
Definition gpio/Register.h:98
__IO uint32 isfr[1]
中斷狀態旗標暫存器 (偏移: 0x120,步長: 0x4,讀寫)
Definition gpio/Register.h:178
__O uint32 gichr
全域中斷控制高位暫存器 (偏移: 0x104,唯寫)
Definition gpio/Register.h:163
__O uint32 pcor
埠清除輸出暫存器 (偏移: 0x48,唯寫)
Definition gpio/Register.h:90
__IO uint32 icr[32]
中斷控制暫存器陣列 (偏移: 0x80,步長: 0x4,讀寫)
Definition gpio/Register.h:147
__I uint32 pdir
埠資料輸入暫存器 (偏移: 0x50,唯讀)
Definition gpio/Register.h:106
__O uint32 giclr
全域中斷控制低位暫存器 (偏移: 0x100,唯寫)
Definition gpio/Register.h:155
__IO uint32 pidr
埠輸入停用暫存器 (偏移: 0x58,讀寫)
Definition gpio/Register.h:124
__O uint32 psor
埠設定輸出暫存器 (偏移: 0x44,唯寫)
Definition gpio/Register.h:82
GPIO 週邊版本資訊結構體
Definition VersionInfo.h:38